Low emitter resistance GaAs based HBT's without InGaAs caps

Low emitter resistance is demonstrated for AlGaAs/GaAs heterojunction bipolar transistors using Pd/Ge contacts on a GaAs contact layer. The contact resistivity to 2-10×10¹⁸ cm ^-3 n-type GaAs is 4-1×10^-7 Ω-cm² . These are comparable to contact resistivities obtained with non-alloyed contacts on InGaAs layers. The non-spiking Pd/Ge contact demonstrates thermal stability and area independent resistivity suitable for scaled devices. The substitution of Pd/Ge for AuGe/Ni GaAs emitter and collector contacts reduced by an order of magnitude the emitter-base offset voltage at high current densities and increased f_t by more than 15% with significantly improved uniformity for devices with 2 and 2.6 μm wide emitters having lengths two, four and six times the width     

Interface characteristics of Ge3N4-(n-type) GaAs MIS devices

Passivation of GaAs surfaces was achieved by the deposition of Ge₃N₄ dielectric films at low temperatures. Electrical characteristics of MIS devices were measured to determine the interface parameters. From C-V-f and G-V-f measurements, density of interface states has been obtained as (4–6)×10¹¹ cm⁻² eV⁻¹ at the semiconductor mid-gap. Some inversion charge buildup was seen in the C-V plot although the strong inversion regime is absent. Thermally stimulated current measurements indicate a trap density of 5×10¹⁸−10¹⁹ cm⁻³ in the dielectric film, with their energy level at 0.59 eV.     

Simplified Surface Preparation for GaAs Passivation Using Atomic Layer-Deposited High- κ Dielectrics

Atomic layer deposition (ALD) provides a unique opportunity to integrate high-quality gate dielectrics on III-V compound semiconductors. The physics and chemistry of a III-V compound semiconductor surface or interface are problems so complex that even after three decades research understanding is still limited. We report a simplified surface preparation process using ammonium hydroxide (NH₄OH) to remove the native oxide and make the hydroxylated GaAs surface ready for ALD Al₂O₃ surface chemistry. The effectiveness of GaAs passivation with ALD is demonstrated with small hysteresis, 1%-2% frequency dispersion per decade at accumulation capacitance, and a mid-bandgap D _it of 8 times10¹¹ to 1times 10¹² cm^-2 ldr eV^-1determined by the Terman method. The results from ammonium sulfide [(NH₄)₂S-,and hydrofluoric acid (HF)-, and hydrochloric acid (HCl)-treated surfaces and a surface with native oxide are also presented to compare with the results from the ammonium-hydroxide-treated surface. Fermi-level unpinning is also easily demonstrated on the ALD HfO₂ and p-type GaAs interface.     

Metal–Oxide–High-$kappa$ Dielectric–Oxide–Semiconductor (MOHOS) Capacitors and Field-Effect Transistors for Memory Applications

Metal-oxide-high-kappa dielectric-oxide-silicon capacitors and transistors are fabricated using HfO₂ and Dy₂O₃ high-kappa dielectrics as the charge storage layer. The programming speed of Al/SiO₂/Dy₂O₃/ SiO₂/Si transistor is characterized by a DeltaV _th shift of 1.0 V with a programming voltage of 12 V applied for 10 ms. As for retention properties, the Al/SiO₂/Dy₂O₃/ SiO₂/Si transistors can keep a DeltaV _th window of 0.5 V for 2 times10⁸ s. The corresponding numbers for Al/ SiO₂/HfO₂/SiO₂/Si transistors are 100 ms and 2 times10⁴ s, respectively. The better performance of the Al/SiO₂/Dy₂O₃/ SiO₂/Si transistors is attributed to the larger conduction band offset at the Dy₂O₃/SiO₂ interface.     

Current gain dependence on subcollector and etch-stop doping inInGaP/GaAs HBTs

The DC current gain dependence of InGaP/GaAs heterojunction bipolar transistors (HBTs) on subcollector and etch-stop doping is examined. Samples of InGaP/GaAs HBTs having various combinations of subcollector doping and etch-stop doping are grown, and large area 60 μm×60 (μ) HBTs are then fabricated for DC characterization. It is found that the DC current gain has a strong dependence on the doping concentration in the subcollector and the subcollector etch-stop. Maximum gain is achieved when the subcollector is doped at 6~7×10 ¹⁸ cm^-3 while the subcollector etch-stop is doped either above 6×10¹⁸ cm^-3 (current gain/sheet resistance ratio, β/R_b=0.435 at I_c=1 mA) or below 3.5×10¹⁷ cm^-3 (β/R_b=0.426~0.438 at I_c=1 mA). The data show that it is not necessary to heavily dope the subcollector etch-stop to reduce the conduction barrier and to obtain high current gain. The high current gain obtained with the low InGaP etch-stop doping concentration is attributed to the reduction of the effective energy barrier thickness due to band bending at the heterojunction between the InGaP etch-stop and the GaAs subcollector. These results show that the β/R_b of InGaP/GaAs HBTs can improve as much as 69% with the optimized doping concentration in subcollector and subcollector etch-stop     

Sulfide treated GaAs MISFET's with gate insulator of photo-CVDgrown P3N5 film

Sulfide passivated GaAs MISFET's with the gate insulator of photo-CVD grown P₃N₅ films have been successfully fabricated. The device shows the drain current instability less than 22% for the period of 1.0 s ~1.0×10⁴ s, due to excellent properties of sulfide treated P₃N₅/GaAs interface. The effective electron mobility and extrinsic transconductance of the device are about 1300 cm²/V·sec and 1.33 mS, respectively, at room temperature. To estimate the effects of sulfide treatment on P₃N₅/GaAs interfacial properties, GaAs-MIS diodes are also fabricated     

Unpinned GaAs MOS capacitors and transistors

Metal-oxide-semiconductor (MOS) capacitors and field-effect transistors (MOSFETs) in the GaAs semiconductor system using an unpinned interface are described. The structures utilize plasma-enhanced chemical-vapor deposition (PECVD) for the silicon-dioxide insulator on GaAs that has been terminated with a few monolayers of silicon during growth by molecular beam epitaxy. Interface densities in the structures have been reduced to ~10¹² cm^-2·eV^-1 . High-frequency characteristics indicate strong inversion of both p-type and n-type GaAs. The excellent insulating quality of the oxide has allowed demonstration of quasi-static characteristics. MOSFETs operating in depletion mode with a transconductance of 60 mS/mm at 8.0-μm gate lengths have been fabricated     

Effective Work-Function Modulation by Aluminum-Ion Implantation for Metal-Gate Technology (Poly-Si/TiN/SiO2)

The impact of aluminum (Al) implantation into TiN/SiO₂ on the effective work function (EWF) of poly-Si/ TiN/SiO₂ is investigated. Al implanted at 5 keV with a dose of 5 times 10¹⁵ cm^-2 reduces the flatband voltage (V_FB) and the EWF of poly-Si/TiN/SiO₂ stack by ~150 mV compared with the unimplanted poly-Si/TiN/SiO₂ stack. This reduction of V_FB is found to be dose-dependent, which is correlated to the Al concentration at the TiN-SiO₂ interface as evidenced by secondary-ion-mass-spectrometry profiles. The interface dipole created due to the Al presence at the metal-dielectric interface is believed to contribute to the observed V_FB (or EWF) reduction (or increase). This technique for EWF modulation is promising for further threshold-voltage (V_t) tuning without any process complexities and is quite significant for planar and multiple gate field-effect transistors on fully depleted silicon on insulator.     

Determination of the LO-phonon and Γ→L intervalley scattering time in GaAs from hot electron luminescence spectroscopy

Both the LO-phonon scattering time and the Γ→L intervalley scattering time for electrons in the conduction band of GaAs are of fundamental importance, and they are needed for the modelling of devices. We measure the steady state distribution of hot electrons in lightly p-doped bulk GaAs under carrier densities of 10¹³–10¹⁴cm⁻³, which is orders of magnitude lower than in pulsed laser experiments. Using a 16×16 k.p Hamiltonian and taking into account the transition matrix elements in a dipole model, we determine the hot electron lifetime from comparison with the experimentally found lifetime broadening. For electrons with a kinetic energy of 100meV to 300meV we obtain τ_LO=(132±10)fs. We also determine the Γ→L intervalley separation as E_ΓL=(300±10)meV. We find Γ→L scattering times around 150fs to 200fs, corresponding to a value for the associated deformation potential of D_ΓL=(9.4±1.5)×10⁸eV/cm.     

Schottky barrier height of a new ohmic contact NiSi2 to n-type 6H-SiC

We present a new ohmic contact material NiSi₂ to n-type 6H-SiC with a low specific contact resistance. NiSi₂ films are prepared by annealing the Ni and Si films separately deposited on (0 0 0 1)-oriented 6H-SiC substrates with carrier concentrations (n) ranging from 5.8×10¹⁶ to 2.5×10¹⁹ cm⁻³. The deposited films are annealed at 900 °C for 10 min in a flow of Ar gas containing 5 vol.% H₂ gas. The specific contact resistance of NiSi₂ contact exponentially decreases with increasing carrier concentrations of substrates. NiSi₂ contacts formed on the substrates with n=2.5×10¹⁹ cm⁻³ show a relatively low specific contact resistance with 3.6×10⁻⁶ Ω cm². Schottky barrier height of NiSi₂ to n-type 6H-SiC is estimated to be 0.40±0.02 eV using a theoretical relationship for the carrier concentration dependence of the specific contact resistance.     

Fabrication of Self-Aligned Enhancement-Mode $ hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs With $ hbox{TaN/HfO}_{2}hbox{/AlN}$ Gate Stack

In this letter, we report the fabrication and characterization of self-aligned inversion-type enhancement-mode In_0.53Ga_0.47As metal-oxide-semiconductor field-effect transistors (MOSFETs). The In_0.53Ga_0.47As surface was passivated by atomic layer deposition of a 2.5-nm-thick AIN interfacial layer. In_0.53Ga_0.47As MOS capacitors showed an excellent frequency dispersion behavior. A maximum drive current of 18.5 muA/mum was obtained at a gate overdrive of 2 V for a MOSFET device with a gate length of 20 mum. An I_on/_off ratio of 104, a positive threshold voltage of 0.15 V, and a subthreshold slope of ~165 mV/dec were extracted from the transfer characteristics. The interface-trap density is estimated to be ~7-8 times 10¹² cm^-2 ldr eV^-1 from the subthreshold characteristics of the MOSFET.     

Low Dit, thermodynamically stable Ga2O3-GaAs interfaces: fabrication, characterization, and modeling

Thermodynamically stable, low D_it amorphous Ga₂ O₃-(100) GaAs interfaces have been fabricated by extending molecular beam epitaxy (MBE) related techniques. We have investigated both in situ and ex situ Ga₂O₃ deposition schemes utilizing molecular beams of gallium oxide. The in situ technique employs Ga₂O₃ deposition on freshly grown, atomically ordered (100) GaAs epitaxial films in ultrahigh vacuum (UHV); the ex situ approach is based on thermal desorption of native GaAs oxides in UHV prior to Ga₂O₃ deposition. Unique electronic interface properties have been demonstrated for in situ fabricated Ga₂O₃-GaAs interfaces including a midgap interface state density D_it in the low 10¹⁰ cm^-2 eV^-1 range and an interface recombination velocity S of 4000 cm/s. The existence of strong inversion in both n- and p-type GaAs has been clearly established. We will also discuss the excellent thermodynamic and photochemical interface stability. Ex situ fabricated Ga₂O₃-GaAs interfaces are inferior but still of a high quality with S=9000 cm/s and a corresponding D_it in the upper 10¹⁰ cm^-2 eV^-1 range. We also developed a new numerical heterostructure model for the evaluation of capacitance-voltage (C-V), conductance-voltage (G-V), and photoluminescence (PL) data. The model involves selfconsistent interface analysis of electrical and optoelectronic measurement data and is tailored to the specifics of GaAs such as band-to-band luminescence and long minority carrier response time τ_R. We will further discuss equivalent circuits in strong inversion considering minority carrier generation using low-intensity light illumination     

Selenium doped high-index GaAs epilayers grown by molecular beam epitaxy

Using elementary Se we grew Se-doped GaAs films on GaAs (111), (411), (711) and (100) substrates by molecular beam epitaxy. The films grown on all the high-index substrates showed n-type conduction and the maximum carrier concentration reached 2.1 × 10¹⁹ cm⁻³ for the film grown on the (411)B substrate. The carrier concentration began to saturate at a Se concentration near 10¹⁹ cm⁻³ but continued to increase up to a Se concentration of 2 × 10²⁰ cm⁻³. Above 2 × 10²⁰ cm⁻³ Se concentration, slow reduction of the carrier concentration was observed. We obtained excellent surface morphology when n-type GaAs films were grown on (411)A and (711)B substrates even at a Se concentration of 7 × 10²⁰ cm⁻³.     

Avalanche breakdown voltage of GaAs hyperabrupt junctions

The avalanche breakdown voltage of a GaAs hyperabrupt junction diode is calculated by using unequal ionization rates for electrons and holes, and shown graphically as a function of the parameters which characterize the impurity profile of the diode. The breakdown voltage decreases abruptly at the critical point of the characteristic length L_c which varies in accordance with the impurity concentration N₀ at X = 0. For example, the critical length L_c is 7.7 × 10⁻⁶ cm and 3.3 × 10⁻⁵ cm for N₀ = 1 × 10¹⁸ cm⁻³ and 1 × 10¹⁷ cm⁻³, respectively. The breakdown voltage of a diode with extremely short or long characteristic length can be estimated from the results for corresponding abrupt junctions. The experimental results agree well with the calculated ones.     

Nitrogen Implantation to Improve Electron Channel Mobility in 4H-SiC MOSFET

Normally off 4H-SiC MOSFET devices have been fabricated on a p-type semiconductor and electrically characterized at different temperatures. A gate oxide obtained by nitrogen ion implantation performed before the thermal oxidation of SiC has been implemented in n-channel MOSFET technology. Two samples with a nitrogen concentration at the SiO₂/SiC interface of 5 X 10¹⁸ and 1.5 X 10¹⁹ cm^-3 and one unimplanted sample have been manufactured. The sample with the highest N concentration at the interface presents the highest channel mobility and the lowest threshold voltage. For increasing temperature, in all the samples, the threshold voltage decreases, and the electron channel mobility increases. The latter case attains a maximum value of about 40 cm²/V ldr s at 200degC for the sample with the highest N concentration. These trends are explained by the reduction of interface electron traps in the upper half of the band gap toward the conduction band edge. These results demonstrate that N implantation can be effectively used to improve the electrical performances of an n-type surface channel 4H-SiC MOSFET.     

Density of States-Based DC $I$– $V$ Model of Amorphous Gallium–Indium–Zinc-Oxide Thin-Film Transistors

The density of states (DOS)-based DC I-V model of an amorphous gallium-indium-zinc oxide (a-GIZO) thin-film transistor (TFT) is proposed and demonstrated with self-consistent methodologies for extracting parameters. By combining the optical charge-pumping technique and the nonlinear relation between the surface potential (phiS) and gate voltage (V _GS), it is verified that the proposed DC model reproduces well both the measured V _GS-dependent mobility and the I _DS-V _GS characteristics. Finally, the extracted DOS parameters are N _TA = 4.4 times 10¹⁷ cm^-3 middot eV^-1, N _DA = 3 times 10¹⁵ cm^-3 middot eV^-1, kT _TA = 0.023 eV, kT _DGA = 1.5 eV, and EO = 1.8 eV, with the formulas of exponential tail states and Gaussian deep states.     

Molecular beam epitaxy growth of TmP/GaAs and transistor action inGaP/TmP/GaAs heterostructures

The growth of thulium phosphide (TmP) by molecular beam epitaxy (MBE) on GaAs substrate is reported. Good epilayer quality was demonstrated through X-ray diffraction (XRD), atomic force microscopy (AFM) and transmission electron microscopy (TEM) analysis. The closely lattice matched TmP layer was n-type with an electron concentration of 1.6×10²¹ cm^-3 and a room temperature mobility of 4.8 cm²V^-1s^-1. The Schottky barrier height determined from 1/capacitance² (1/C²) versus voltage (V) measurements is about 0.81 eV which agrees well with the value obtained through the current-voltage (I-V) measurements. In this work, we also report transistor action in a GaP/TmP/GaAs structure, for which chemical bonding techniques were employed. From I-V measurements, a common base current gain α≈0.55 at V_CB=0 was obtained at room temperature     

Yttrium oxide/silicon dioxide: a new dielectric structure forVLSI/ULSI circuits

Electrical characteristics of Al/yttrium oxide (~260 Å)/silicon dioxide (~40 Å)/Si and Al/yttrium oxide (~260 Å)/Si structures are described. The Al/Y₂O₃/SiO₂/Si (MYOS) and Al/Y₂ O₃/Si (MYS) capacitors show very well-behaved I-V characteristics with leakage current density <10^-10 A/cm² at 5 V. High-frequency C- V and quasistatic C-V characteristics show very little hysteresis for bias ramp rate ranging from 10 to 100 mV/s. The average interface charge density (Q_f+Q _it) is ~6×10¹¹/cm² and interface state density D_it is ~10¹¹ cm^-2-eV^-1 near the middle of the bandgap of silicon. The accumulation capacitance of this dielectric does not show an appreciable frequency dependence for frequencies varying from 10 kHz to 10 MHz. These electrical characteristics and dielectric constant of ~17-20 for yttrium oxide on SiO₂/Si make it a variable dielectric for DRAM storage capacitors and for decoupling capacitors for on-chip and off-chip applications     

Maximum Active Concentration of Ion-Implanted Phosphorus During Solid-Phase Epitaxial Recrystallization

In this paper, we showed that the maximum active P concentration of approximately 2 times10²⁰ cm^-3 exists during solid-phase epitaxial recrystallization (SPER). This maximum active concentration is close to the reported values for other active impurity concentrations during SPER. We introduced the concept of an isolated impurity that has no neighbor impurities with a certain lattice range. Assuming that impurities interact with three or four neighbor impurities, we can explain the activation phenomenon during SPER. According to our model, the isolated P concentration N _iso has a maximum value of approximately 2 times10²⁰ cm^-3 at a total impurity concentration of approximately 10²¹ cm^-3, and it decreases with a further increase in total impurity concentration. Deactivation occurs after the completion of SPER with increasing annealing time, and the active impurity concentration decreases with time but is always higher than the maximum diffusion concentration N _{Diff max}. We also observed that N _{Diff max} is independent of the annealing time despite nonthermal activation in the high-concentration region. We evaluated the dependence of N _{Diff max} on annealing temperatures. We think that this N _{Diff max} can be regarded as the electrical solid solubility N _Esol that the active impurity concentration reaches in thermal equilibrium. We observed the transient enhanced diffusion (TED) after the completion of SPER, and that, the deactivation process continues during and after TED, and the corresponding diffusion coefficient is still much higher than that in thermal equilibrium even after TED has finished, which suggests that the deactivation process releases point defects.     

Very-low-threshold current density 1.29 μm GaInNAs triple quantum well lasers grown by molecular beam epitaxy

Very-low-threshold Ga_0.62In_0.38N_0.007As_0.993/GaN_0.011 As_0.989/GaAs triple quantum well (QW) lasers emitting at 1.29 mum are demonstrated. The laser structure was grown by molecular beam epitaxy after extensive optimisations of growth and in situ annealing conditions. As-cleaved broad-area lasers with a cavity length of 1 mm under pulsed operation showed a record low-threshold current density of 400 A/cm² (~130A/cm²/QW), a high differential efficiency of 0.32 W/A/facet and a characteristic temperature of 94 K in the temperature range 10 to 110degC.