19% efficient n‐type Czochralski silicon solar cells with screen‐printed aluminium‐alloyed rear emitter

High and stable lifetimes recently reported for n‐type silicon materials are an important and promising prerequisite for innovative solar cells. To exploit the advantages of the excellent electrical properties of n‐type Si wafers for manufacturing simple and industrially feasible high‐efficiency solar cells, we focus on back junction n⁺np⁺ solar cells featuring an easy‐to‐fabricate full‐area screen‐printed aluminium‐alloyed rear p⁺ emitter. Independently confirmed record‐high efficiencies have been achieved on n‐type phosphorus‐doped Czochralski‐grown silicon material: 18·9% for laboratory‐type n⁺np⁺ solar cells (4 cm²) with shadow‐mask evaporated front contact grid and 17·0% for front and rear screen‐printed industrial‐type cells (100 cm²). The electrical cell parameters were found to be perfectly stable under illumination. Copyright © 2006 John Wiley & Sons, Ltd.     

Phosphorus gettering of iron by screen‐printed emitters in monocrystalline Czochralski silicon wafers

In this paper, we demonstrate single‐sided screen‐printed emitters in thin monocrystalline Czochralski silicon (Cz‐Si) wafers with an improved gettering of iron compared with conventional double‐sided POCl₃ emitters. The phosphorus dopant pastes used have to be chosen carefully to provide a sufficiently low emitter sheet resistance and to avoid iron contamination. The iron concentration is determined in a non‐destructive way from the minority carrier lifetime obtained by quasi‐steady‐state photoconductance measurements, down to levels not yet demonstrated for screen‐printed emitters. In addition, the well‐known metastable boron–oxygen complexes in Cz‐Si have been transferred into a stable state by light‐induced degradation prior to these measurements. Copyright © 2012 John Wiley & Sons, Ltd.     

Development of high‐efficiency large‐area screen‐printed solar cells on direct kerfless epitaxially grown monocrystalline Si wafer and structure

This paper demonstrates the potential of epitaxially grown Si wafers with doped layers for high‐efficiency solar cells. Boron‐doped 239 cm² 180–200 µm thick 2 Ω‐cm wafers were grown with and without 15 µm thick p⁺ layer, with a doping in the range of 10¹⁷~10¹⁸ cm⁻³. A layer transfer process involving porous Si layer to lift off epi‐Si wafers from the reusable substrate was used. The pp⁺ wafers were converted into n⁺pp⁺ passivated emitter rear totally diffused (PERT) cells by forming an oxide‐passivated POCl₃‐diffused n⁺ emitter at the front, and oxide/nitride‐passivated epitaxially grown p⁺ BSF at the entire back, with local screen‐printed contacts. To demonstrate and quantify the benefit of the epi‐grown p⁺ layer, standard passivated emitter and rear cells (PERCs) with local BSF and contacts were also fabricated on p‐type epi‐Si wafers as well on commercial‐grade Cz wafers. Sentaurus 2D device model was used to assess the impact of the epi‐grown p⁺ layer, which showed an efficiency gain of ~0.5% for this PERT structure over the traditional PERC. This was validated by the cell results, which showed an efficiency of ~20.1% for the PERC, and ~20.3% for the PERT cell using epi‐Si wafers. Experimental data showed higher FF in PERT cells, largely because of the decrease in lateral resistance on the rear side. Efficiency gain, a result of higher FF, was greater than the recombination loss in the p⁺ layer because of the lightly doped thick p⁺ epi‐grown region used in this study. Copyright © 2016 John Wiley & Sons, Ltd.     

Surface passivation of high‐efficiency silicon solar cells by atomic‐layer‐deposited Al2O3

Atomic‐layer‐deposited aluminium oxide (Al₂O₃) is applied as rear‐surface‐passivating dielectric layer to passivated emitter and rear cell (PERC)‐type crystalline silicon (c‐Si) solar cells. The excellent passivation of low‐resistivity p‐type silicon by the negative‐charge‐dielectric Al₂O₃ is confirmed on the device level by an independently confirmed energy conversion efficiency of 20·6%. The best results are obtained for a stack consisting of a 30 nm Al₂O₃ film covered by a 200 nm plasma‐enhanced‐chemical‐vapour‐deposited silicon oxide (SiO_x) layer, resulting in a rear surface recombination velocity (SRV) of 70 cm/s. Comparable results are obtained for a 130 nm single‐layer of Al₂O₃, resulting in a rear SRV of 90 cm/s. Copyright © 2008 John Wiley & Sons, Ltd.     

Series resistance characterization of industrial silicon solar cells with screen‐printed contacts using hotmelt paste

This work presents the results of a detailed series resistance characterization of silicon solar cells with screen‐printed front contacts using hotmelt silver paste. Applying the hotmelt technology energy conversion efficiencies up to 18·0% on monocrystalline wafers with a size of 12·5 cm × 12·5 cm have been achieved, an increase of 0·3% absolute compared to cells with conventional screen‐printed contacts. This is mainly due to the reduction in the finger resistance to values as low as 14 Ω/m, which reduces the series resistance of the solar cell significantly. To retrieve the lumped series resistance as accurately as possible under the operating condition, different determination methods have been analyzed. Methods under consideration were fitting of the two‐diode equation function to a dark IV‐curve, integration of the area A under an IV‐curve, comparison of a j_sc–V_oc with a one‐sun IV‐curve, comparison of the j_sc and V_oc points of a shaded curve with the one‐sun IV‐curve as well as comparison of a dark IV‐curve with a one‐sun IV‐curve, and comparison of IV‐curves measured at different light intensities. The performed investigations have shown that the latter four methods all resulted in reliable series resistance values. Copyright © 2007 John Wiley & Sons, Ltd.     

Screen‐print selective diffusions for high‐efficiency industrial silicon solar cells

Screen‐print diffusion pastes present an industrially applicable alternative to conventional techniques of dopant deposition. Several commercially available screen‐print dopant pastes are assessed for their suitability in forming heavy selective diffusions for use under metal contacts in silicon solar cells. Pastes are assessed in terms of their ease of application, their ability to form heavy diffusions with low sheet resistances, and their ability to maintain high post‐diffusion wafer lifetimes. Potential for the use of dopant pastes in high‐efficiency solar cell devices is investigated using photoconductance (PC) measurements and photoluminescence (PL) images. It is found that under certain conditions, screen‐print dopant pastes, particularly phosphorus paste, have potential to form effective selective diffusions without significantly compromising performance in high‐efficiency solar cells. Copyright © 2007 John Wiley & Sons, Ltd.     

High efficiency screen‐printed EFG Si solar cells through rapid thermal processing‐induced bulk lifetime enhancement

This paper shows that one second (1 s) firing of Si solar cells with screen‐printed Al on the back and SiN _x anti‐reflection coating on the front can produce a high quality Al‐doped back‐surface‐field (Al‐BSF) and significantly enhance SiN _x ‐induced defect hydrogenation in the bulk Si. Open‐circuit voltage, internal quantum efficiency measurements, and cross‐sectional scanning electron microscopy pictures on float‐zone silicon cells revealed that 1 s firing in rapid thermal processing at 750°C produces just as good a BSF as 60 s firing, indicating that the quality of Al‐BSF region is not a strong function of RTP firing time at 750°C. Analysis of edge‐defined film‐fed grown (EFG) Si cells showed that short‐term firing is much more effective in improving the hydrogen passivation of bulk defects in EFG Si. Average minority‐carrier lifetime in EFG wafers improved from ∼3 to ∼33 μs by 60 s firing but reached as high as 95μs with 1 s firing, resulting in 15·6% efficient screen‐printed cells on EFG Si. Copyright © 2004 John Wiley & Sons, Ltd.     

Process development and comparison of various boron emitter technologies for high‐efficiency (~21%) n‐type silicon solar cells

This paper shows for the first time a comparison of commercial‐ready n‐type passivated emitter , rear totally diffused solar cells with boron (B) emitters formed by spin‐on coating, screen printing, ion implantation, and atmospheric pressure chemical vapor deposition. All the B emitter technologies show nearly same efficiency of ~20%. The optimum front grid design (5 busbars and 100 gridlines), calculated by an analytical modeling, raised the baseline cell efficiency up to 20.5% because of reduced series resistance. Along with the five busbars, rear point contacts formed by laser ablation of dielectric and physical vapor deposition Al metallization resulted in another 0.4% improvement in efficiency. As a result, 20.9% efficient n‐type passivated emitter, rear totally diffused cell was achieved in this paper. Copyright © 2016 John Wiley & Sons, Ltd.     

SiOyNx/SiNx stack: a promising surface passivation layer for high‐efficiency and potential‐induced degradation resistant mc‐silicon solar cells

A thin SiO_yN_x film was inserted below a conventional SiN_x antireflection coating used in c‐Si solar cells in order to improve the surface passivation and the solar cell's resistance to potential‐induced degradation (PID). The effect of varying the flow ratio of the N₂O and SiH₄ precursors and the deposition temperature for the SiO_yN_x thin film upon material properties were systematically investigated. An excellent surface passivation was obtained on FZ p‐type polished silicon wafers, with the best results obtained with a SiO_yN_x film deposited at a very low temperature of 130 °C and with an optical refractive index of 1.8. In the SiO_yN_x/SiN_x stack structure, a SiO_yN_x film with ~6 nm thickness is sufficient to provide excellent surface passivation with an effective surface recombination velocity S_eff < 2 cm/s. Furthermore, we applied the optimized SiO_yN_x/SiN_x stack on multicrystalline Si solar cells as a surface passivation and antireflection coating, resulting in a 0.5% absolute average conversion efficiency gain compared with that of reference cells with conventional SiN_x coating. Moreover, the cells with the SiO_yN_x/SiN_x stack layers show a significant increase in their resistance to PID. Nearly zero degradation in shunt resistance was obtained after 24 h in a PID test, while a single SiN_x‐coated silicon solar cell showed almost 50% degradation after 24 h. Copyright © 2016 John Wiley & Sons, Ltd.     

Large‐area epitaxial silicon solar cells based on industrial screen‐printing processes

Thin‐film epitaxial silicon solar cells are an attractive future alternative for bulk silicon solar cells incorporating many of the process advantages of the latter, but on a potentially cheap substrate. Several challenges have to be tackled before this potential can be successfully exploited on a large scale. This paper describes the points of interest and how IMEC aims to solve them. It presents a new step forward towards our final objective: the development of an industrial cell process based on screen‐printing for > 15% efficient epitaxial silicon solar cells on a low‐cost substrate. Included in the discussion are the substrates onto which the epitaxial deposition is done and how work is progressing in several research institutes and universities on the topic of a high‐throughput epitaxial reactor. The industrial screen‐printing process sequence developed at IMEC for these epitaxial silicon solar cells is presented, with emphasis on plasma texturing and improvement of the quality of the epitaxial layer. Efficiencies between 12 and 13% are presented for large‐area (98 cm²) epitaxial layers on highly doped UMG‐Si, off‐spec and reclaim material. Finally, the need for an internal reflection scheme is explained. A realistically achievable internal reflection at the epi/substrate interface of 70% will result in a calculated increase of 3 mA/cm² in short‐circuit current. An interfacial stack of porous silicon layers (Bragg reflectors) is chosen as a promising candidate and the challenges facing its incorporation between the epitaxial layer and the substrate are presented. Experimental work on this topic is reported and concentrates on the extraction of the internal reflection at the epi/substrate interface from reflectance measurements. Initial results show an internal reflectance between 30 and 60% with a four‐layer porous silicon stack. Resistance measurements for majority carrier flow through these porous silicon stacks are also included and show that no resistance increase is measurable for stacks up to four layers. Copyright © 2005 John Wiley & Sons, Ltd.     

Industrially feasible,dopant‐free,carrier‐selective contacts for high‐efficiency silicon solar cells

Dopant‐free, carrier‐selective contacts (CSCs) on high efficiency silicon solar cells combine ease of deposition with potential optical benefits. Electron‐selective titanium dioxide (TiO₂) contacts, one of the most promising dopant‐free CSC technologies, have been successfully implemented into silicon solar cells with an efficiency over 21%. Here, we report further progress of TiO₂ contacts for silicon solar cells and present an assessment of their industrial feasibility. With improved TiO₂ contact quality and cell processing, a remarkable efficiency of 22.1% has been achieved using an n‐type silicon solar cell featuring a full‐area TiO₂ contact. Next, we demonstrate the compatibility of TiO₂ contacts with an industrial contact‐firing process, its low performance sensitivity to the wafer resistivity, its applicability to ultrathin substrates as well as its long‐term stability. Our findings underscore the great appeal of TiO₂ contacts for industrial implementation with their combination of high efficiency with robust fabrication at low cost. Copyright © 2017 John Wiley & Sons, Ltd.     

Heterojunction solar cells with 23% efficiency on n‐type epitaxial kerfless silicon wafers

We present a heterojunction (HJ) solar cell on n‐type epitaxially grown kerfless crystalline‐silicon with an in‐house‐measured conversion efficiency of 23%. The total cell area is 243.4 cm². The cell has a short‐circuit current density of 39.6 mA cm⁻², an open‐circuit voltage of 725 mV, and a fill factor of 0.799. The effect of stacking faults (SFs) is examined by current density (J) mapping measurements as well as by spectral response mapping. The J mapping images show that the localized lower J regions of the HJ solar cells are associated with recombination sites originating from SFs, independent of whether SFs are formed on the emitter or absorber side. The solar cell results and our analysis suggest that epitaxially grown wafers based on kerfless technology could be an alternative for low‐cost industrial production of Si HJ solar cells. Copyright © 2016 John Wiley & Sons, Ltd.     

Enhanced lateral current transport via the front N+ diffused layer of n‐type high‐efficiency back‐junction back‐contact silicon solar cells

N‐type back‐contact back‐junction solar cells were processed with the use of industrially relevant structuring technologies such as screen‐printing and laser processing. Application of the low‐cost structuring technologies in the processing of the high‐efficiency back‐contact back‐junction silicon solar cells results in a drastic increase of the pitch on the rear cell side. The pitch in the range of millimetres leads to a significant increase of the lateral base resistance. The application of a phosphorus doped front surface field (FSF) significantly reduces the lateral base resistance losses. This additional function of the phosphorus doped FSF in reducing the lateral resistance losses was investigated experimentally and by two‐dimensional device simulations. Enhanced lateral majority carrier's current transport in the front n⁺ diffused layer is a function of the pitch and the base resistivity. Experimental data show that the application of a FSF reduces the total series resistance of the measured cells with 3.5 mm pitch by 0.1 Ω cm² for the 1 Ω cm base resistivity and 1.3 Ω cm² for the 8 Ω cm base resistivity. Two‐dimensional simulations of the electron current transport show that the electron current density in the front n⁺ diffused layer is around two orders of magnitude higher than in the base of the solar cell. The best efficiency of 21.3% was obtained for the solar cell with a 1 Ω cm specific base resistivity and a front surface field with sheet resistance of 148 Ω/sq. Copyright © 2008 John Wiley & Sons, Ltd.     

Highly transparent modulated surface textured front electrodes for high‐efficiency multijunction thin‐film silicon solar cells

To further increase the efficiency of multijunction thin‐film silicon (TF‐Si) solar cells, it is crucial for the front electrode to have a good transparency and conduction, to provide efficient light trapping for each subcell, and to ensure a suitable morphology for the growth of high‐quality silicon layers. Here, we present the implementation of highly transparent modulated surface textured (MST) front electrodes as light‐trapping structures in multijunction TF‐Si solar cells. The MST substrates comprise a micro‐textured glass, a thin layer of hydrogenated indium oxide (IOH), and a sub‐micron nano‐textured ZnO layer grown by low‐pressure chemical vapor deposition (LPCVD ZnO). The bilayer IOH/LPCVD ZnO stack guarantees efficient light in‐coupling and light trapping for the top amorphous silicon (a‐Si:H) solar cell while minimizing the parasitic absorption losses. The crater‐shaped micro‐textured glass provides both efficient light trapping in the red and infrared wavelength range and a suitable morphology for the growth of high‐quality nanocrystalline silicon (nc‐Si:H) layers. Thanks to the efficient light trapping for the individual subcells and suitable morphology for the growth of high‐quality silicon layers, multijunction solar cells deposited on MST substrates have a higher efficiency than those on single‐textured state‐of‐the‐art LPCVD ZnO substrates. Efficiencies of 14.8% (initial) and 12.5% (stable) have been achieved for a‐Si:H/nc‐Si:H tandem solar cells with the MST front electrode, surpassing efficiencies obtained on state‐of‐the‐art LPCVD ZnO, thereby highlighting the high potential of MST front electrodes for high‐efficiency multijunction solar cells. Copyright © 2015 John Wiley & Sons, Ltd.     

Screen‐printed epitaxial silicon thin‐film solar cells with 13·8% efficiency

Amidst the different silicon thin‐film systems, the epitaxial thin‐film solar cell represents an approach with interesting potential. Consisting of a thin active c‐Si layer grown epitaxially on top of a low‐quality c‐Si substrate, it can be implemented into solar cell production lines without major changes in the current industrial process sequences. Within this work, ∼30‐μm‐thick epitaxial layers on non‐textured and highly doped monocrystalline Czochralski (Cz) and multicrystalline (mc) Si substrates have been prepared by CVD. Confirmed efficiencies of 13·8% on Cz and 12·3% on mc‐Si substrates have been achieved by applying an industrial process scheme based on tube and in‐line phosphorus diffusion, as well as screen‐printed front and back contacts fired through a SiN_x anti‐reflection coating. An extensive solar cell characterisation, including infrared lock‐in thermography and spectral response measurements is presented. Copyright © 2003 John Wiley & Sons, Ltd.     

Diffusion‐free high efficiency silicon solar cells

Traditional POCl₃ diffusion is performed in large diffusion furnaces heated to ~850 C and takes an hour long. This may be replaced by an implant and subsequent 90‐s rapid thermal annealing step (in a firing furnace) for the fabrication of p‐type passivated emitter rear contacted silicon solar cells. Implantation has long been deemed a technology too expensive for fabrication of silicon solar cells, but if coupled with innovative process flows as that which is mentioned in this paper, implantation has a fighting chance. An SiOx/SiN_y rear side passivated p‐type wafer is implanted at the front with phosphorus. The implantation creates an inactive amorphous layer and a region of silicon full of interstitials and vacancies. The front side is then passivated using a plasma‐enhanced chemical vapor deposited SiN_xH_y. The wafer is placed in a firing furnace to achieve dopant activation. The hydrogen‐rich silicon nitride releases hydrogen that is diffused into the Si, the defect rich amorphous front side is immediately passivated by the readily available hydrogen; all the while, the amorphous silicon recrystallizes and dopants become electrically active. It is shown in this paper that the combination of this particular process flow leads to an efficient Si solar cell. Cell results on 160‐µm thick, 148.25‐cm² Cz Si wafers with the use of the proposed traditional diffusion‐free process flow are up to 18.8% with a V_oc of 638 mV, J_sc of 38.5 mA/cm², and a fill factor of 76.6%. Copyright © 2012 John Wiley & Sons, Ltd.     

Electrochemical nature of contact firing reactions for screen‐printed silicon solar cells: origin of “gray finger” phenomenon

Fire‐through Ag thick‐film metallization of crystalline Si (c‐Si) solar cells often yields macroscopically non‐uniform contact quality over the cell area, degrading the cell performance and causing cell‐to‐cell variations of the conversion efficiency in a cell production line. This study analyzes the root cause of the “gray finger” phenomenon, in which part of the fire‐through Ag contact gridlines of a c‐Si solar cell appears in gray or dark contrast in the electroluminescence images owing to high contact resistance. Few Ag crystallites were formed on the corrugated emitter surface at the contact interfaces underneath the gray fingers. The present results revealed that the gray finger phenomenon was caused by a short‐circuit spot that formed between the Ag gridlines and underlying Si emitter during contact firing. The electrochemical reactions involved in fire‐through Ag contact formation established a potential difference between the sintered Ag gridlines and Si emitter separated by molten glass. The molten glass acted as an electrolyte containing mobile Ag⁺ and O²⁻ ions during contact firing. Therefore, the short‐circuiting between the sintered Ag gridlines and Si emitter produced a galvanic cell during contact firing, which inhibited Ag crystallite formation at the contact interface along the gridlines in a short circuit and produced the gray fingers. The firing reactions in Ag thick‐film contact formation could be interpreted in terms of the mixed potential theory of corrosion. The degradation of cell performance because of the gray finger phenomenon was also evaluated for 6‐in. screen‐printed c‐Si solar cells. Copyright © 2016 John Wiley & Sons, Ltd.     

Material requirements for the adoption of unconventional silicon crystal and wafer growth techniques for high‐efficiency solar cells

Silicon wafers comprise approximately 40% of crystalline silicon module cost and represent an area of great technological innovation potential. Paradoxically, unconventional wafer‐growth techniques have thus far failed to displace multicrystalline and Czochralski silicon, despite four decades of innovation. One of the shortcomings of most unconventional materials has been a persistent carrier lifetime deficit in comparison to established wafer technologies, which limits the device efficiency potential. In this perspective article, we review a defect‐management framework that has proven successful in enabling millisecond lifetimes in kerfless and cast materials. Control of dislocations and slowly diffusing metal point defects during growth, coupled to effective control of fast‐diffusing species during cell processing, is critical to enable high cell efficiencies. To accelerate the pace of novel wafer development, we discuss approaches to rapidly evaluate the device efficiency potential of unconventional wafers from injection‐dependent lifetime measurements. Copyright © 2015 John Wiley & Sons, Ltd.     

High‐efficiency (19%) screen‐printed textured cells on low‐resistivity float‐zone silicon with high sheet‐resistance emitters

High‐efficiency 4 cm² screen‐printed (SP) textured cells were fabricated on 100 Ω/sq emitters using a rapid single‐step belt furnace firing process. The high contact quality resulted in a low series resistance of 0·79 Ωcm², high shunt resistance of 48 836 Ωcm², a low junction leakage current of 18·5 nA/cm² (n₂ = 2) yielding a high fill factor (FF) of 0·784 on 100 Ω/sq emitter. A low resistivity (0·6 Ωcm) FZ Si was used for the base to enhance the contribution of the high sheet‐resistance emitter without appreciably sacrificing the bulk lifetime. This resulted in a 19% efficient (confirmed at NREL) SP 4 cm² cell on textured FZ silicon with SP contacts and single‐layer antireflection coating. This is apparently higher in performance than any other previously reported cell using standard screen‐printing approaches (i.e., single‐step firing and grid metallization). Detailed cell characterization and device modeling were performed to extract all the important device parameters of this 19% SP Si cell and provide guidelines for achieving 20% SP Si cells. Copyright © 2005 John Wiley & Sons, Ltd.