碳化硅量产新一代功率器件产业化加速

在电能的产生、输送和分配过程中,电力传送效率和使用效率至关重要。当前,电力传输功率器件主要是基于硅材料,由于发展了30年,硅材料的物理性能已经发掘殆尽。碳化硅作为半导体界公认的一种未来的材料,具有巨大的发展潜力。     

碳化硅MPS的功率损耗特性分析

采用解析模型模拟了 4 H-Si C混合 Pi N/Schottky二极管 (MPS)的功率损耗及反向恢复 ,研究了外延层掺杂浓度和厚度、PN结网格宽度等主要的结构参数对该器件功率损耗的影响。模拟结果表明 ,对文中所述的MPS,在 770 K左右具有最小功耗 ,且肖特基区所占的面积比越大 ,外延层掺杂浓度越高 ,厚度越小 ,最小功耗越低 ,最小功耗对应的温度也越高。论证了 MPS在一个较高的温度下具有很低的功耗 ,适合功率系统的应用     

功率肖特基二极管的优化设计

本文由描述功率肖特基势垒二极管电学特性的基本方程出发,结合对典型整流电路效率、器件正向压降、反向耐压及温度特性等参数的数值分析,给出器件设计折衷优化的理论依据.     

浮结型碳化硅肖特基势垒功率二极管的优化设计

SiC floating junction Schottky barrier diodes were simulated with software MEDICI 4.0 and their device structures were optimized based on forward and reverse electrical characteristics. Compared with the conventional power Schottky barrier diode, the device structure is featured by a highly doped drift region and embedded floating junction region, which can ensure high breakdown voltage while keeping lower specific on-state resistance, solved the contradiction between forward voltage drop and breakdown voltage. The simulation results show that with opti- mized structure parameter, the breakdown voltage can reach 4 kV and the specific on-resistance is 8.3 mΩ·cm2.     

SiC肖特基势垒二极管的研制

本文报道了采用电子束热蒸发的方法用铂（Ｐｔ）做肖特基接触在ｎ型６Ｈ-ＳｉＣ体材料上制作肖特基二极管的工艺过程和器件特性．对实验结果进行了比较分析,Ｉ-Ｖ特性测量说明Ｐｔ／６ＨＳｉＣ肖特基二极管有较好的整流特性,热电子发射是其主要的输运机理,理想因子为１.２３,肖特基势垒高度为１.０３ｅＶ,开启电压约为０.５Ｖ．     

功率肖特基势垒整流二极管性能及工艺特点

功率肖特基势垒整流二极管具有许多优越性的性能，在工艺制做中也有其一定的特殊性，本文就该类产品的主要技术性能及其工艺制做特点进行了概述。     

3C-SiC功率肖特基二极管特性的计算机分析

由描述功率肖特基二极管电学特性的基本方程出发，结合对典型整流电路效率、器件正向压降、反向耐压及温度特性等参数的数值分析，给出3C－SiC功率肖特基二极管折衷优化设计的理论依据。     

4500V碳化硅肖特基二极管研究

设计了一种阻断电压4 500V的碳化硅(SiC)结势垒肖特基(JBS)二极管。采用有限元仿真的方法对器件的外延掺杂浓度和厚度以及终端保护效率进行了优化。器件采用50μm厚、掺杂浓度为1.2×1015cm-3的N型低掺杂区。终端保护结构采用保护环结构。正向电压4V下导通电流密度为80A/cm2。     

Pt/6H-SiC肖特基势垒二极管特性分析

采用直流磁控溅射法、Pt作肖特基接触的工艺，制作了N型6H—SiC肖特基势垒二极管，对肖特基势垒二极管的电学特性及温度特性进行了研究。实验结果表明，该器件具有很好的整流特性，反向电流小、击穿电压高，且在高温下器件波动很小，能够稳定地工作，适合于在高温(600℃)等恶劣环境下长期可靠地工作。     

SiC肖特基势垒二极管

本文简要地介绍了半导体ＳｉＣ材料的特性，并与Ｓｉ、ＧａＡｓ，ＧａＰ等材料作了比较，同时介绍了ＳｉＣ９肖特基势垒及ＳｉＣ肖特基势垒二极管的伏－安特性。     

Influence of operation conditions on true-static DC characteristics and on electro-thermal transient states in silicon carbide Merged PiN Schottky diodes.

In this paper, measured and calculated non-isothermal DC characteristics of silicon carbide MPS devices are investigated, with special attention paid on critical parameters, such as maximum current and junction temperature at which a thermal runaway may occur. Electro-thermal transient states in single MPS devices (forward surge current tests) and in the simple Greatz rectifier are simulated and compared to measurements. Various electro-thermal models of SiC SBDs, with a simplified, effective procedure for calculations of junction temperature are proposed.     

碳化硅混合PiN/Schottky二极管的二维模拟

利用模拟软件MEDICI对碳化硅混合PiN/Schottky二极管(MPS)的输运机理及伏安特性进行了模拟.输运机理的模拟结果表明MPS的工作原理是正向肖特基起主要作用,而反向时PN结使漏电流大大减小.伏安特性的模拟结果表明MPS的正向压降小,电流密度大,在2V正向偏压下达10-5A/μm,反向漏电流小,击穿电压高(2000V左右),可以通过改变肖特基和PN结的面积比来调整MPS的性能,与硅MPS、碳化硅PN结以及碳化硅肖特基二极管相比具有明显的优势,是理想的功率整流器.     

The Correlation of Surface Defects and Reverse Breakdown of 4H-SiC Schottky Barrier Diodes

Surface defect characterization and the influence of selected surface defects on the reverse characteristics of 4H-SiC Schottky barrier diodes (SBDs) are investigated, with particular emphasis on comet and carrot defects. Premature breakdown caused by comets occurs at voltages below 250 V for an SBD with ideal parallel plane breakdown of 1,600 V. The location of comets relative to the Schottky contact ultimately determines the reverse characteristics of the device. The reverse breakdown voltage of SBDs with carrot defects can be more than 1,000 V, but the reverse leakage current is about two orders higher than that of a defect-free SBD. The SBDs of diodes with and without carrots are 1.01 eV and 1.44 eV, respectively. The SBDs, which catastrophically fail during reverse bias measurement, are investigated as well. The average breakdown voltage of SBDs, which failed catastrophically, is about 745 V. According to the experimental observations, catastrophic failures are not associated with obvious surface defects, crystallographic directions, or postimplant annealing time.     

Ti/4H-SiC SBD中子辐照效应的研究

采用1 MeV的中子对Ti/4H-SiC肖特基势垒二极管(SBD)的辐照效应进行研究,观察了常温下的退火效应.实验的最高中子剂量为1×1015 n/cm2,对应的γ射线累积总剂量为33 kGy (Si).经过1×1014 n/cm2的辐照后,Ti/SiC肖特基接触没有明显退化;剂量达到2.5×1014 n/cm2后,观察到势垒高度下降;剂量达到1×1015 n/cm2后,势垒高度从1.00 eV下降为0.93eV;经过常温下19 h的退火后,势垒高度有所恢复,表明肖特基接触的辐照损伤主要是由电离效应造成的.辐照后,器件的理想因子较辐照前有所上升;器件的正向电流(VF=2V)随着辐照剂量的上升而下降.     

6H-SiC高压肖特基势垒二极管

在可商业获得的 N型 6 H - Si C晶片上 ,通过化学气相淀积 ,进行同质外延生长 ,在此结构材料上 ,通过热蒸发 ,制作 Ni/6 H- Si C肖特基势垒二极管 .测量并分析了肖特基二极管的电学特性 ,结果表明 ,肖特基二极管具有较好的整流特性 :反向击穿电压约为 45 0 V,室温下 ,反向电压 VR=- 2 0 0 V时 ,反向漏电流 JL=5× 10 - 4 A· cm- 2 ;理想因子为 1.0 9,肖特基势垒高度为 1.2 4— 1.2 6 e V ,开启电压约为 0 .8V     

Partial dislocations and stacking faults in 4H-SiC PiN diodes

Using plan-view transmission electron microscopy (TEM), we have identified stacking faults (SFs) in 4H-SiC PiN diodes subjected to both light and heavy electrical bias. Our observations suggest that the widely expanded SFs seen after heavy bias are faulted dislocation loops that have expanded in response to strain of the 4H-SiC film, while faulted screw or 60° threading dislocations do not give rise to widely expanded SFs. Theoretical calculations show that the expansion of SFs depends on the Peach-Koehler (PK) forces on the partial dislocations bounding the SFs, indicating that strain plays a critical role in SF expansion.     

Defect Analysis of Barrier Height Inhomogeneity in Titanium 4H-SiC Schottky Barrier Diodes

Over 350 4H-SiC Schottky barrier diodes (SBDs) of varying size are characterized using current–voltage (I–V) measurements, with some also measured as a function of temperature. Devices display either a characteristic single-barrier height or atypical dual-barrier heights. Device yields are shown to decrease as device area increases. Molten KOH etching is used to highlight defects for analysis by optical microscopy and atomic force microscopy. The I–V characteristics are compared against the defect density. A positive correlation between effective barrier height and effective electrically active area of the SBDs is found. No correlation is found between threading dislocations and ideality factor or barrier height.     

Planar defects in 4H-SiC PiN diodes

Using plan-view transmission electron microscopy (PVTEM), we have identified stacking faults (SFs) and planar defects in 4H-SiC PiN diodes subjected to electrical bias. Our observations suggest that not all planar defects seen in the PiN diodes are SFs. By performing diffraction-contrast imaging experiments using TEM, we can distinguish SFs from other planar defects. In addition, high-resolution TEM (HRTEM) imaging and analytical TEM have revealed that some planar defects consist of a 3-nm-wide SiC amorphous layer. Many of these planar defects are orientated parallel to {1 00} planes, whereas others are roughly parallel to the (0001) plane. The appearance of these planar defects suggests that they are grain boundaries.     

SiC肖特基栅JFET功率特性的研究

提出了一种新型结构的SiC结型场效应晶体管,采用肖特基接触替代P+型栅区,以降低SiC JFET的工艺复杂度,并提高器件的功率特性。建立了器件的数值模型,对不同材料和结构参数下的功率特性进行了仿真。结果表明,与PN结栅相比,肖特基栅结构可以有效降低SiC JFET的开态电阻;与常规结构的双极模式SiC JFET相比,在SiC肖特基栅JFET的栅极正偏注入载流子,同样可以有效降低器件的开态电阻,折中器件的正反向特性,但不会延长开关时间。     

A High Power 320-356GHz Frequency Multipliers with Schottky Diodes

A 320-356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50μm thick quartz substrate.Influence of circuit channel width and thermal dissipation of the diode junctions are discussed for high multiplying effficiency.The doubler circuit is flip-chip mounted on gold electroplated oxygenfree copper film for grounding of RF and DC signals,and better thermal transportation.The whole multiplying circuit is optimized and established in Computer simulation technology (CST) suite.The highest measured multiplying efficiency is 8.0％ and its output power is 5.4mW at 328GHz.The measured typical output power is 4.0mW in 320-356GHz.