Two-Signal Method of Measuring the Large-Signal S-Parameters of Transistors

In this paper, large-signal S-parameters are reviewed, and transistors of Class-C are employed. Problems are encountered in obtaining large-signal parameters S/sub 12/ and S/sub 21/. A novel method is concisely developed based on theory presented herein. The acquired S-parameters are applied to amplifier design accordingly. The predicted and measured output power are compared, and suitable conclusions are duly recorded.     

Design of GaAs MESFET Oscillator Using Large-Signal S-Parameters

A design method of GaAs MESFET oscillator using large-signal S-parameters has been discussed. Together with the measurement results of the dependence of Iarge-signall S-parameters on power levels and bias conditions, computer analysis of the equivalent circuit for MESFET'S has qualitatively clarified the large signal properties of MESFET'S. On the basis of these findings, S-parameters have been designed for the MESFET oscillator over the frequency range of 6-10 GHz, which has resulted in power output of 45 mW at 10 GHz with 19-percent efficiency, and 350 mW at 6.5 GHz with 26-percent efficiency, respectively. Good agreements between predicted and obtained performances of MIC positive feedback oscillator have been ascertained, verifying the validity of the design method using large-signal S-parameters.     

Scalable Multi-harmonic Large-Signal Model for AlGaN/GaN HEMTs Including a Geometry-Dependent Thermal Resistance

A scalable large-signal model of AlGaN/GaN High electron mobility transistors (HEMTs) suitable for multi-harmonic characterizations is presented.This model is fulfilled utilizing an improved drain-source current (Ids) formulation with a geometry-dependent thermal resistance (Rth) and charge-trapping modification.The Ids model is capable of accurately modeling the highorder transconductance (gm),which is significant for the prediction of multi-harmonic characteristics.The thermal resistance is identified by the electro-thermal Finite element method (FEM) simulations,which are physically and easily scalable with the finger numbers,unit gate width and power dissipations of the device.Accurate predictions of the quiescent currents,S-parameters up to 40GHz,and large-signal harmonic performance for the devices with different gate peripheries have been achieved by the proposed model.     

A new empirical large-signal HEMT model

We propose an empirical large-signal model of high electron mobility transistors (HEMTs). The bias-dependent data of small-signal equivalent circuit elements are obtained from S-parameters measured at various bias settings. And C_gs, C_gd, g_m, and g_ds, are described as functions of V_gs and V_ds. We included our large-signal model in a commercially available circuit simulator as a user-defined model and designed a 30/60-GHz frequency doubler. The fabricated doubler's characteristics agreed well with the design calculations     

On the development of CAD techniques suitable for the design of high-power RF transistors

A full-wave modeling procedure was developed to simulate the package, bonding wires, and MOS capacitors used in the design of matching networks found within RF/microwave power transistors. The complex packaging environment was segmented into its constituent components and simulation techniques were developed for each component, as well as the inter-element coupling. An S-parameter test fixture and package was developed that permits measurements of these types of devices. The simulation and measurement procedures were used to model various circuits. Measured S-parameters and those obtained using the full-wave methodology were in good agreement. Simulation results using an inductance-only bonding-wire model were performed and differences between the S-parameters were observed. A detailed examination of the loss introduced by the matching network was performed and simulations and measurements matched closely.     

Large-signal capabilities and analysis of distributed amplifiers

In the letter experimental results are presented which show that distributed amplifiers can be used for power applications. These results are verified by comparing an analytic model predicted using SPICE 2 simulation with measurements between 0.3 and 12 GHz. It appears that a very broad band can be achieved and that the distributed amplifiers keep their self matching properties even under large-signal operation. Distributed-amplifier characteristics, under small-signal operations, are now well known.1?4 However, recent improvements in GaAs FET technology have created new prospects in large-signal and high-frequency conditions. To our knowledge, although some experimental results have been published3, no theoretical study has been carried out for large-signal conditions. The letter provides such a study.     

Improved large-signal GaN HEMT model suitable for intermodulation distortion analysis

In this article, a complete empirical large-signal model of GaN high electron-mobility transistors (HEMTs) is presented. The developed nonlinear model employs differentiable trigonometric function continuously to describe the drain-source current characteristic and its higher order derivatives, making itself suitable for the simulation of intermodulation distortion (IMD) in microwave circuits. Besides, an improved charge-conservative gate charge model is proposed to accurately trace the nonlinear gate-source and gate-drain capacitances. The model validity is demonstrated for different 0.25-µm gate-length GaN HEMTs. The simulation results of small-signal S-parameters, radio frequency (RF) large-signal power performances and two-tone IMD products show an excellent agreement with the measured data.     

Advances in Reversed Nested Miller Compensation

The use of two frequency compensation schemes for three-stage operational transconductance amplifiers, namely the reversed nested Miller compensation with nulling resistor (RN-MCNR) and reversed active feedback frequency compensation (RAFFC), is presented in this paper. The techniques are based on the basic RNMC and show an inherent advantage over traditional compensation strategies, especially for heavy capacitive loads. Moreover, they are implemented without entailing extra transistors, thus saving circuit complexity and power consumption. A well-defined design procedure, introducing phase margin as main design parameter, is also developed for each solution. To verify the effectiveness of the techniques, two amplifiers have been fabricated in a standard 0.5-mum CMOS process. Experimental measurements are found in good agreement with theoretical analysis and show an improvement in small-signal and large-signal amplifier performances. Finally, an analytical comparison with the nonreversed counterparts topologies, which shows the superiority of the proposed solutions, is also included.     

Microwave-transistor power-amplifier design by large-signal y parameters

The validity of large-signal y parameters for use in the design of microwave-transistor power amplifiers has been investigated, and simple design equations have been derived for the optimum source and load terminations. The predicted terminations are in good agreement with those experimentally obtained with a 1 GHz 1 W amplifier.     

Large signal modelling of GaAs/AlGaAs HBT's with separation of the surface recombination current

The effects of surface recombination on an AlGaAs/GaAs HBT have been investigated. Studies of Gummel-plots for devices with different sized base emitter junctions made it possible to separate the surface recombination from the bulk current. An extension of the Gummel–Poon model that includes this surface recombination current is suggested. The large-signal performance was evaluated by two methods, power spectrum characteristics and by design and characterization of a power amplifier. For these two measurement set-ups, measured data was compared with simulations of the model both including and excluding the surface recombination current. It is clearly seen that without including the surface recombination current, it is impossible to correctly represent the large-signal performance. The model is also verified with DC characteristics and S-parameters.     

A simplified procedure to calculate the power gain definitions ofFETs

A graphical method to easily derive the power gain definitions of field-effect transistors (FETs) is proposed in this paper. This method is applicable to MESFETs and high electron-mobility transistors described by the typical π model. A new set of simple expressions of the S-parameters, functions of the circuit elements of the FET complete model, is derived. These expressions are presented in graphic form to quickly compute the modules of the FET S-parameters and then the power gains. The accuracy of this approach has been proven by comparison with simulations of the FET complete model     

RF power transistor storage time: theory and measurements

Measurements on two types of UHF power transistors are given. The measured charge storage time constants (/spl tau//SUB s/) were 89 ns and 173 ns, effectively `infinite' for most applications. Then t/SUB s/ is essentially independent of /spl tau//SUB s/, and depends mainly on circuit properties: base drive and collector current waveforms. The measured dependence of t/SUB s/ on circuit and transistor parameters is in accordance with analytical predictions. Therefore storage time can be accounted for explicitly in a priori circuit design of RF power amplifiers.     

Prediction of IMD in LDMOS transistor amplifiers using a new large-signal model

In this paper, the intermodulation distortion (IMD) behavior of LDMOS transistors is treated. First, an analysis is performed to explain measured IMD characteristics in different classes of operation. It is shown that the turn-on region plays an important role in explaining measured IMD behavior, which may also give a clue to the excellent linearity of LDMOS transistors. Thereafter, with this knowledge, a new empirical large-signal model with improved capability of predicting IMD in LDMOS amplifiers is presented. The model is verified against various measurements at low as well as high frequency in a class-AB power amplifier circuit.     

A new insulated gate tetrode with high drain breakdown potential and low miller feedback capacitance

Insulated gate field effect transistors (IGFET's) with the gate offset from the drain electrode exhibit high drain breakdown potential and very low Miller feedback capacitance. The new insulated gate tetrode (IGT) described in this paper utilizes a second stacked gate to create the offset channel. The main advantage is the possibility of optimizing the device performance, especially the drain breakdown potential for bothP-andN-channel devices. Considered in the paper are design and fabrication problems,V-Icharacteristics, drain breakdown potential, dynamic drain resistance, small-signal equivalent circuit, and large-signal limitations.P-channel IGT's with drain breakdown potentials up to 300 V have been built. The design of the IGT depends mainly on the tradeoff between drain breakdown potential and the limited frequency response caused by the time constant of the offset channel. The results to date indicate that the IGT has a large drain voltage range and an extremely low Miller feedback capacitance and is adaptable to different operating conditions. The IGT appears very promising for use in power amplifiers and switching applications.     

Systematic approach for IG-FinFET amplifier design using gm/Id method

In this paper, a systematic approach has been used to apply gm/Id method for the design of Independent Gate (IG) FinFET amplifiers. The design of high-performance amplifiers using g_m/I_d method has been successfully applied to nanometer devices. IG-FinFETs have been widely used in digital circuit implementations. However, the application of IG-FinFETs in analog circuits is limited and brings many advantages including low power, low voltage operation of transistors. Independent gates of FinFET can receive different voltages that facilitate low voltage operation of the circuit. Simulation-based g_m/I_d method has been applied to IG-FinFET transistors and a systematic methodology has been developed for the design of IG-FinFET amplifiers. The Berkeley BSIM-IMG 55 nm technology parameters have been used for HSPICE simulations. The designed amplifier has a DC gain of about 45 dB while consuming 6.5 µW from single 1 V power supply.

     

On the large-signal behavior of transferred-electron amplifiers with a cathode notch

Transferred-electron amplifiers (TEA) are finding applications where medium powers are required as driving stages. Most work has been done up to now under small-signal conditions. The present paper describes theoretical results of a large-signal analysis. From this analysis, it appears that different large-signal behaviors of TEA devices can be associated with their corresponding dc field distribution. We compare, by computer analysis, the evolution of the large signal impedance with the RF driving signal for different doping profiles (different stationary fields) and give design figures to increase the device added power.     

Nonlinear design procedures for single-frequency and broad-bandGaAs MESFET power amplifiers

The design and optimization of MESFET power amplifiers are investigated using an intermediate-level (functional) device modeling approach. The approximations involved are discussed, together with considerations of required circuit terminations at harmonic frequencies. Three variations of the approach, based on large-signal admittance, scattering, and hybrid parameters, are compared in the design of a single-frequency amplifier, and the method is extended to broadband power amplifier design. In all cases, results are validated by comparison with a full time-domain large-signal amplifier analysis, involving realistic, distributed external circuits     

Global stability analysis and stabilization of a class-E/F amplifier with a distributed active transformer

Power amplifiers (PAs) often exhibit instabilities giving rise to frequency divisions or spurious oscillations. The prediction of these instabilities requires a large-signal stability analysis of the circuit. In this paper, oscillations, hysteresis, and chaotic solutions, experimentally encountered in a high-efficiency class-E/F/sub odd/ PA with four transistors combined using a distributed active transformer, are studied through the use of stability and bifurcation analysis tools. The tools have enabled an in-depth comprehension of the different phenomena, which have been observed in simulation with good agreement with experimental results. The study of the mechanism generating the instability has led to a simplified equivalent circuit from which the optimum stabilization network has been determined. The network enables a global stabilization of the circuit for all the expected operating values of the amplifier bias voltage and input power. This has been achieved with negligible degradation of the amplifier performance in terms of drain efficiency and output power. The stable behavior obtained in simulation has been experimentally confirmed.     

Design of Broad-Band Power GaAs FET Amplifiers

A model is presented for the drain-gate breakdown phenomenon of GaAs FET's, based on experimental results. this breakdown model is added to a previously published large-signal model and incorporated in a powerful computer-aided design program called LSFET. The program is capable of searching for the optimum power load for an FET and simulating the power performance of multistage amplifiers. The design of power amplifiers is discussed in detail, using the knowledge gained from LSFET. Data is presented from a fabricated monolithic broad-band power amplifier chip showing good agreement between measured results and simulated curves.