High-speed InAlAs/InGaAs heterojunction bipolar transistors

InAlAs/InGaAs heterojunction bipolar transistors fabricated from wafers grown by molecular beam epitaxy are discussed. A cutoff frequency of 32 GHz for a collector current of 20 mA is achieved in the emitter area of devices 6×10 μm². The use of heavily doped and nondoped InGaAs layers as the emitter cap and collector, respectively, results in a reduction of the emitter and collector charging times; this, in turn, leads to improved microwave performance     

InGaAs/InAlAs heterostructure diodes for application to high-speed semiconductor-gated FET's

We have investigated n⁺InGaAs/InAlAs/n^-InGaAs heterostructures suitable for application as SISFET gates through capacitance-voltage and current-voltage characteristics of mesa diodes at room temperature. Flat-band voltages are nearly ideal, indicating a low level of fixed charge in the barrier. Current-voltage characteristics are rectifying, due to the formation of a depletion layer in the lightly doped channel. Excess reverse current is attributed to back-diffusion of dopant from the gate into the barrier, and we have shown that it is controlled by the interposition of an undoped spacer layer between the barrier and the gate. Forward current scales with the electric field, rather than the potential, demonstrating the need for an improved theory of conduction at low bias. We have assessed prospects for application of these structures to high-speed FET's, and find that enhancement-mode operation to voltages above 1 V should be practical.     

InAlAs/InGaAs heterostructure FET's processed with selectivereactive-ion-etching gate-recess technology

A highly selective reactive-ion-etching process based on HBr plasma has been used as a gate-recess technique in fabrication of InAlAs/InGaAs heterostructure FETs. A typical 0.75-μm-gate-length transistor exhibited a threshold voltage of -1.0 V, a maximum extrinsic transconductance of 600 mS/mm, an extrinsic current-gain cutoff frequency of 37 GHz, and a maximum frequency of oscillation of 90 GHz. These DC and RF device parameters compare favorably with those of a corresponding device gate-recessed with a selective wet-etching technique     

Impact ionization in InAlAs/InGaAs/InAlAs HEMT's

The kink effect and excess gate current in InAlAs/InGaAs/InAlAs HEMT's have been linked to impact ionization in the high field region of the channel. In this letter, a relationship is established between experimentally measured excess gate current and the tunneling of holes from the quantum well formed in the channel. The channel hole current is then obtained as the quotient of the excess gate current to the gate-voltage-dependent transmission probability. This channel hole current follows the exponential dependence of the ionization constant on the inverse electric field     

Simulation of PNP InAlAs/InGaAs heterojunction bipolar transistors

The performance of single heterojunction InAlAs/InGaAs PNP heterojunction bipolar transistors is modeled numerically and good agreement is found with experimental measurements. Peak experimental values of f_T=14 GHz, f_Max=22 GHz, β=170 and U=38 dB are obtained near a collector current density of 10⁴ A/cm² for a nonoptimized device     

0.23 mu m gate length MODFETs on InAlAs/InGaAs/InP heterostructure grown by MOVPE

Modulation-doped field effect transistors (MODFETs) with 0.23 mu m gate lengths have been fabricated on an InAlAs/InGaAs/InP heterostructure grown by metal organic vapour phase epitaxy (MOVPE/MOCVD). Extrinsic DC transconductance as high as 800 mS/mm, and unity current gain cutoff frequency f/sub t/ of over 120 GHz at room temperature have been achieved. These g/sub m/ and f/sub t/ values compare favourably with the best devices of similar gate length grown by molecular-beam epitaxy (MBE) and are the highest values reported for any device grown by MOVPE.<>     

Mesa-sidewall gate leakage in InAlAs/InGaAs heterostructurefield-effect transistors

InAlAs/InGaAs HFETs fabricated by conventional mesa isolation have a potential parasitic gate-leakage path where the gate metallization overlaps the exposed channel edge at the mesa sidewall. The existence of this path has been proven by fabricating special heterojunction diodes with different mesa-sidewall gate-metal overlap lengths. It is found that sidewall leakage is a function of the crystallographic orientation of the sidewall, and increases with channel thicknesses, sidewall overlap area, and InAs mole fraction in the channel. In HFETs fabricated alongside the diodes, sidewall leakage increased the subthreshold and forward gate leakage currents, and reduced the breakdown voltage     

Simulation and design of InAlAs/InGaAs pnp heterojunction bipolartransistors

The performance capabilities of InP-based pnp heterojunction bipolar transistors (HBT's) have been investigated using a drift-diffusion transport model based on a commercial numerical simulator. The low hole mobility in the base is found to limit the current gain and the base transit time, which limits the device's cutoff frequency. The high electron majority carrier mobility in the n⁺ InGaAs base allows a reduction in the base doping and width while maintaining an adequately low base resistance. As a result, high current gain (>300) and power gain (>40 dB) are found to be possible at microwave frequencies. A cutoff frequency as high as 23 GHz and a maximum frequency of oscillation as high as 34 GHz are found to be possible without base grading. Comparison is made with the available, reported experimental results and good agreement is found. The analysis indicates that high-performance pnp InP-based HBT's are feasible, but that optimization of the transistor's multilayer structure is different than for the npn device     

Impact ionization in InAlAs/InGaAs HFET's

The presence of an energy barrier to the transfer of holes from the channel to the gate electrode of InAlAs/InGaAs HFET's prevents the gate current from being a reliable indicator of impact ionization. Consequently, we have used a specially designed sidegate structure to demonstrate that due to the narrow bandgap of InGaAs, impact ionization takes place in the channel of these devices under normal operating conditions. The ionization coefficient was found to follow a classic exponential dependence on the inverse electric field at the drain end of the gate, for over three orders of magnitude     

Low-frequency noise performance of self-aligned InAlAs/InGaAs heterojunction bipolar transistors

The first measurement of low-frequency noise performance for self-aligned InAlAs/InGaAs HBTs is reported. The 1/f noise obtained was around 20 dB lower than that for AlGaAs/GaAs HBTs at a fixed frequency, which is considered to be caused by the low surface recombination velocity of InGaAs.<>     

栅槽横向宽度对InAlAs/InGaAs HEMTsDC及RF特性的影响

我们制造出了栅长为88 nm的InP基InAlAs/InGaAs 高电子迁移率器件(HEMTs),该器件的频率特性为ft = 100 GHz, fmax = 185 GHz。本文对横向栅槽宽度分别为300 nm, 412 nm, 1070 nm的器件进行了实验。借助能带图的方式,定性分析了横向栅宽的增加会因为表面态和碰撞电离的作用,使得器件直流特性表现出kink效应,并得到减小横向栅槽宽度能减弱kink效应的结论,文中还讨论了横向栅槽宽度通过改变器件寄生电容及其源漏电阻,从而对频率特性产生影响。这些分析对制造出更高性能的HEMT器件有比较重要的意义。     

Drastic reduction of gate leakage in InAlAs/InGaAs HEMT's using apseudomorphic InAlAs hole barrier layer

Impact ionization in the channel of InAlAs/InGaAs HEMT's was shown to be a reason for excess gate leakage current. Hot electrons in the high field region of the channel under the gate generate electron-hole pairs. The generated holes can reach the gate (gate leakage) as well as the source, the electrons flow to the drain (kink effect). The number of holes reaching the gate strongly depends on the valence band discontinuity. In order to increase this valence band discontinuity a thin pseudomorphic InAlAs layer with high Al-content was inserted in the spacer of an InAlAs/InGaAs HEMT. The efficiency of this hole barrier was measured by photocurrent and DC measurements, while its influence on transport characteristics was measured by Hall and RF measurements. A reduction of gate leakage by a factor of 200 is demonstrated     

High performance double-doped InAlAs/InGaAs/InP heterojunction FET with potential for millimetre-wave power applications

Lattice matched InAlAs/InGaAs/InP heterojunction field-effect transistors (HJFETs), which have carrier supplying layers on and beneath the undoped InGaAs channel layer, have been successfully fabricated. A selective recess of the InGaAs channel edge at a mesa sidewall together with the use of a wide recess gate structure leads to a 5.7 V gate-drain breakdown voltage without kink effects. The fabricated HJFET with a 0.15*100 mu m/sup 2/ T-shaped gate exhibits a 700 mA/mm maximum drain current, a voltage gain of 14, and a 345 GHz maximum frequency of oscillation.<>     

Application of O+implantation in inverted InGaAs/InAlAs heterojunction bipolar transistors

Deep O+ implantation has been used to create a high-resistivity layer buried beneath the Be+ -implanted extrinsic base-emitter junction region of In0.52Al0.48As/In0.53Ga0.47As inverted (emitter-down) heterojunction bipolar transistors (HBT's). The O+ -implanted layer remains highly resistive even after a rapid thermal annealing step at 700°C to activate the Be+ implants. With the O+ implantation, the forward current of the extrinsic base-emitter diode is significantly reduced. HBT's with Be+ - and O+ -implanted extrinsic base regions exhibit current gains of ≃ 100 at a collector current density in excess of 10³A/cm². Another benefit from the deep O+ -implanted layer is a dramatic reduction in the junction capacitance of the extrinsic base-emitter diode.     

InAlAs/InGaAs/InP HEMTs with high breakdown voltages using double-recess gate process

The DC and RF performance of InAlAs/InGaAs/InP HEMTs fabricated using a double-recess gate process are reported. A gate-drain breakdown voltage as high as 16 V was observed. The HEMTs also exhibited a high source-drain breakdown voltage near pinchoff of 16 V and a low RF output conductance of 6 mS/mm. For a 1.4 mu m gate length, an intrinsic transconductance of 560 mS/mm and f/sub T/ and f/sub max/ values of 16 and 40 GHz, respectively, were achieved.<>     

A collector current model for InAlAs/InGaAsSb/InGaAs double heterojunction bipolar transistors with non-ideal effects

A collector current model incorporating electron diffusion in the base and thermionic emission at the abrupt B–E heterojunction is derived and applied to InGaAsSb heterojunction bipolar transistors (HBTs). Parameters extracted from the model include effective base doping concentration, conduction band discontinuity (ΔE_C) at the base-emitter junction, and emitter resistance. The calculated current from the model is consistent with the measured result. It is found that a high collector current ideality factor is resulted from a nonzero ΔE_C and a low effective base doping concentration. Moreover, a nonzero ΔE_C makes the high-injection effect almost invisible in collector current characteristics, even if it actually exists.     

Processing techniques for InGaAs/InAlAs/InGaAs spin field effect transistors

Wet etch processing techniques for InGaAs/InAl/As/InGaAs transistors are used to fabricate an N-channel HEMT (High Electron Mobility Transistor) with Fe contacts. These processing techniques can easily be extended for dilute magnetic semiconductor regrowth and for testing of various spin injection geometries.     

An analytical model for discretized doped InAlAs/InGaAs heterojunction HEMT for higher cut-off frequency and reliability

In the proposed work the model has been formulated for discretized doped HEMT, where the conventional uniformly doped, pulsed doped and delta doped structure are the special cases. An expression for sheet carrier density has been formulated considering the effect of doping-thickness product and has been extended to calculate drain current, transconductance, capacitance and cut-off frequency of the device. The model also takes into account the non-linear relationship between sheet carrier density and quasi Fermi energy level to validate it from subthreshold region to high conduction region. The results so obtained have been compared with pulsed doped structure to validate the model. The analysis concentrates on the distance of doping from the heterojunction and gate electrode. Different design criteria have been given to dope the carriers (amount and distance) in different regions to optimize the performance for higher sheet carrier density/parallel conduction voltage/effective parallel conduction voltage (V_c−V_off) to increase the transconductance, cut-off frequency and reliability of the device.     

Analysis of issues in gate recess etching in the InAlAs/InGaAs HEMT manufacturing process

We have developed an InAlAs/InGaAs metamorphic high electron mobility transistor device fabrication process where the gate length can be tuned within the range of 0.13 μm–0.16 μm to suit the intended application. The core processes are a two-step electron-beam lithography process using a three-layer resist and gate recess etching process using citric acid. An electron-beam lithography process was developed to fabricate a T-shaped gate electrode with a fine gate foot and a relatively large gate head. This was realized through the use of three-layered resist and two-step electron beam exposure and development. Citric acid-based gate recess etching is a wet etching, so it is very important to secure etching uniformity and process reproducibility. The device layout was designed by considering the electrochemical reaction involved in recess etching, and a reproducible gate recess etching process was developed by finding optimized etching conditions. Using the developed gate electrode process technology, we were able to successfully manufacture various monolithic microwave integrated circuits, including low noise amplifiers that can be used in the 28 GHz to 94 GHz frequency range.     

Low-frequency transconductance dispersion in InAlAs/InGaAs/InPHEMT's with single- and double-recessed gate structures

The effects of trapping mechanisms on the transconductance of single- and double-recessed InAlAs/InGaAs/InP HEMT's are examined. Measurements at room temperature indicate transconductance dispersion occurring primarily between 100 Hz and 1 MHz. A detailed examination of the dispersion yields two mechanisms with different activation energies which were determined by measuring the transition frequencies as functions of temperature. One mechanism, causing negative dispersion, has an activation energy of 0.17 eV and was found only in the double-recessed structure. The other mechanism, causing positive dispersion and common to both structures, has a dominant transition with an activation energy of 0.51 eV at low fields. The first mechanism appears to be associated with surface states, while the second is caused by electron traps in the InAlAs or its interface with the InGaAs channel. Transient response measurements were also used to examine the location of the traps and to study the field dependence of the characteristic times