Advances in Reversed Nested Miller Compensation

The use of two frequency compensation schemes for three-stage operational transconductance amplifiers, namely the reversed nested Miller compensation with nulling resistor (RN-MCNR) and reversed active feedback frequency compensation (RAFFC), is presented in this paper. The techniques are based on the basic RNMC and show an inherent advantage over traditional compensation strategies, especially for heavy capacitive loads. Moreover, they are implemented without entailing extra transistors, thus saving circuit complexity and power consumption. A well-defined design procedure, introducing phase margin as main design parameter, is also developed for each solution. To verify the effectiveness of the techniques, two amplifiers have been fabricated in a standard 0.5-mum CMOS process. Experimental measurements are found in good agreement with theoretical analysis and show an improvement in small-signal and large-signal amplifier performances. Finally, an analytical comparison with the nonreversed counterparts topologies, which shows the superiority of the proposed solutions, is also included.     

用于低功耗三级放大器的嵌套式密勒有源电容频率补偿技术

提出了一种新的用于低功耗,节省面积的三级放大器频率补偿技术.该技术将有源电容进行嵌套连接从而克服了传统的嵌套式密勒补偿与反嵌套式密勒补偿的缺点.当将这一技术用标准的0.35μm工艺设计成电路并负载150pF电容时,放大器实现了105dB直流增益,3.3M的增益带宽积,68°相位裕度以及2.56V/μs的平均转换速率.而这一切的实现是在2V电源电压仅消耗40μW的功耗以及使用了很小的补偿电容.     

用于低功耗三级放大器的嵌套式密勒有源电容频率补偿技术

提出了一种新的用于低功耗,节省面积的三级放大器频率补偿技术. 该技术将有源电容进行嵌套连接从而克服了传统的嵌套式密勒补偿与反嵌套式密勒补偿的缺点. 当将这一技术用标准的0.35μm工艺设计成电路并负载150pF电容时,放大器实现了105dB直流增益,3.3M的增益带宽积,68°相位裕度以及2.56V/μs的平均转换速率.而这一切的实现是在2V电源电压下仅消耗40μW的功耗以及使用了很小的补偿电容.     

片上低压降电源调节器的稳定性分析和频率补偿

分析了片上低压降(Low Dropout)电源调节器稳定性的极限条件,在此基础上,提出了一种实用的频率补偿技术。此技术无需额外电阻和偏置电压,即能为系统产生零点,实现系统的主、次极点分离(pole-splitting),从而增加相位裕量,使系统保持稳定。实验表明,采用该技术的电路结构简单、实现容易、占用面积小,能够使片上LDO在负载电阻、负载电容大范围变化的情况下保持稳定,特别适用于片上电源管理系统。LDO采用SMIC 0.18μm CMOS工艺实现。     

采用电阻补偿的高PSRR基准电压源设计

与传统的带隙基准电路完全使用p-n结达到高次温度补偿不同,提出利用标准CMOS工艺下不同电阻的不同温度系数,实现温度的高次补偿,大大减小了电路的复杂性和功耗.同时,通过增加电源电压耦合电路,提高电源抑制比,并在输出级利用低压差电压DC转换电路,实现电压转换,提供可调的多种参考电压.该电路采用Chartered 0.35 μm CMOS 工艺实现,采用3.3 V电源电压,在-40～100 ℃范围内,达到低于6 ppm/℃的温度系数,在1 kHz和27 ℃下,电源抑制比达到82 dB.     

LDO的三种频率补偿方案实现

从理论上分析了三种不同的LDO电压转换电路及各自的频率补偿方案,并基于sPEcTRE对此三种LDO的各项性能进行了仿真,仿真采用0．6μm 5 V CMOS工艺。在此基础上,对这三种LDO电路各自的优缺点进行了比较以便于在不同应用场合下能够选择合适的LDO结构。     

Comparison of the Frequency Compensation Techniques for CMOS Two-Stage Miller OTAs

Several design options are nowadays available for the frequency compensation of CMOS two-stage transconductance operational amplifiers, from the traditional Miller approach employing a nulling resistor or a voltage buffer, to a current buffer or the more modern current amplifier. However, designers have no results on the frequency performance achievable that allow to consciously choose the best approach to meet the prescribed specifications efficiently. In this paper, a comparison among the possible Miller approaches is carried out by exploiting an analytical figure of merit that expresses a tradeoff between gain--bandwidth product, load capacitance, and total transconductance for a given value of phase margin. Interesting and useful results, even unexpected, are found. The accuracy of the comparison is also validated through simulations.      

一种新颖的LDO频率补偿技术

通过对传统LDO频率补偿电路的零点、极点进行分析,提出了一种新颖的频率补偿技术.在原有频率补偿电路的基础上,增加一个电阻和电容以及一个PMOS管,构成新的补偿网络.此补偿网络产生一组零极点,且零点在带宽范围内,极点在带宽范围外.仿真结果显示,输出电流为100 mA时,相位裕度为87°;输出电流为1 μA时,相位裕度为46°.电路设计基于TSMC 0.18 μm CMOS工艺,采用Hspice进行仿真,电路工作电压为1.8 V.     

一种用于低压降稳压器频率补偿的压控电流源

利用小信号压控电流源(VCCS)电路产生所需零点,是一种先进的低压降稳压器(LDO)频率补偿方法。文章分析了VCCS频率补偿方法的原理和VCCS电路对LDO的瞬态响应及电源抑制(PSR)特性的改善作用,并提出了一种新的VCCS电路结构。该电路结构功耗低、占用面积小,在直到5 MHz的频率范围内,都有近乎理想的性能。采用这种结构的VCCS电路,基于0.5μm CMOS工艺,设计的一款300 mV压降,2.5 V输出电压,最大100 mA输出电流的LDO电路,具有很好的频率响应、瞬态响应和电源抑制特性。该LDO电路所用全部片上电容的总值不到1pF。     

一种隐埋缓冲掺杂层高压SBD器件新结构

提出了一种新型隐埋缓冲掺杂层(IBBD)高压SBD器件,对其工作特性进行了理论分析和模拟仿真验证.与常规高压SBD相比,该IBBD-SBD在衬底上方引入隐埋缓冲掺杂层,将反向击穿点从常规结构的PN结保护环区域转移到肖特基势垒区域,提升了反向静电释放(ESD)能力和抗反向浪涌能力,提高了器件的可靠性.与现有表面缓冲掺杂层...     

Novel Active Quasi-Circulator With Phase Compensation Technique

A novel active quasi-circulator using phase compensation technique for wideband isolation is proposed. It is formed by configuring three transistors with a complimenting phase shifter for equalization. It provides wideband frequency operation with sufficient return loss and isolation between ports without the need for passive filters. This compensation technique minimizes the circulator's size compared with conventional ferrite circulators and is compatible with monolithic microwave integrated circuit technology. Experimental results show that the proposed quasi-circulator has insertion losses around 0 dB, return losses better than 10 dB at each ports and minimum isolation around 15 dB from 0.8 to 2.2 GHz. Good agreement is obtained between simulation and experimental results.      

A Novel Frequency Compensation Technique for Three-Stage Amplifier

Multistage amplifiers are urgently needed with the advance in technology, due to the fact that single-stage cascode amplifier is no longer suitable in low-voltage designs. Moreover, the short-channel effects of the sub-micro CMOS transistor cause output-impedance degradation and hence the gain of an amplifier is reduced dramatically[1~6]. For multistage amplifiers, most of the compensation methods are based on pole splitting and pushing the right-half-plane zero to high frequencies or pole-ze…     

SRD倍频器自给偏压温度补偿研究

本文阐述了ＳＲＤ倍频器进行温度补偿的原理，采用“最小二乘法”建立的补偿网络，成功地对Ｓ波段微带六倍频器进行温度补偿。     

A Low Voltage Mixer With Improved Noise Figure

A 5.2 GHz low voltage mixer with improved noise figure using TSMC 0.18 $mu$m CMOS technology is presented in this letter. This mixer utilizes current reuse and ac-coupled folded switching to achieve low supply voltage. The noise figure of the mixer is strongly influenced by flicker noise. A resonating inductor is implemented for tuning out the parasitic components, which not only can improve noise figure but also enhance conversion gain. A low voltage mixer without resonating technique has also been fabricated and measured for comparison. Simulated results reveal that flicker corner frequency is lowered. The measured results show 4.5 dB conversion gain enhancement and 4 dB reduction of noise figure. The down-conversion mixer with resonating inductor achieves 5.8 dB conversion gain, ${-}16$ dBm ${rm P}_{{rm 1dB}},$ ${-}6$ dBm ${rm IIP}_{3}$ at power consumption of 3.8 mW and 1 V supply voltage.      

一种跟踪负载电流变化的LDO频率补偿方法

分析了低压差稳压芯片(LDO)的环路频率特性及其与负载电流的关系,提出了跟踪负载电流变化的LDO频率补偿思路和方法,并给出了具体的电路实现。在意法半导体公司的0.8μm BCD工艺下的仿真结果表明,该电路能显著提高LDO的频率稳定性和瞬态响应。     

Reversed nested Miller compensation with voltage buffer and ing resistor

This paper presents a new reversed nested Miller compensation technique for multistage operational amplifier (opamp) design. The new compensation technique inverts the sign of the right half complex plane zero and shifts the frequency of the complex conjugate poles to a higher frequency. Simulation results indicate that the gain-bandwidth product and settling time are improved by factors of two and three, respectively, without degrading stability and power consumption. To verify the proposed technique, a three-stage opamp is fabricated with 0.6-/spl mu/m CMOS technology. The measured results of the test circuit agree with the results that are obtained from theoretical analysis and circuit simulation.     

Deadbeat Feedforward Compensation With Frequency Shaping in Fast and Precise Positioning

This paper presents a novel deadbeat feedforward compensation technique for fast and precise positioning control in mechatronic systems. The proposed compensation provides the desired frequency shaping in control input to suppress the residual vibration, under the constraint of a specified step number in position reference. A 2-DOF positioning controller with the deadbeat feedforward compensation can ensure the required settling performance with the specified steps regardless of the positioning amplitude in reference. The effectiveness of the proposed approach has been verified by numerical simulations and experiments using a prototype of a galvano scanner.     

一种改进的THz-SAR高频振动误差补偿方法

将太赫兹波用于SAR成像可以解决常规SAR成像帧速低、慢动目标检测困难等问题。太赫兹合成孔径雷达(THz-SAR)与传统微波SAR成像最重要的区别在于运动补偿。因为THz-SAR的工作波长比传统微波SAR要短得多,平台的微小振动会影响成像质量,尤其是高频振动误差。平台的高频振动会在成像结果中引入成对回波,传统SAR成像算法无法实现成对回波的聚焦,也就无法准确估计振动参数,进而构造参考函数补偿高频振动带来的正弦调制相位。首先基于多普勒Keystone变换(DKT)的THz-SAR成像算法实现成对回波的聚焦成像;然后提出小波多分辨分析的方法估计高频振动频率,结合参数空间投影法完成振动幅相的估计,并实现高频振动误差的补偿;最后采用点目标的回波数据仿真验证了所提方法的有效性。     

LDO线性稳压器中动态频率补偿的研究

针对LDO稳定性的问题,在分析LDO的环路频率特性及其与负载电流关系的基础上,提出了一种跟踪负载电流变化的LDO频率补偿的新结构,使LDO的稳定性不受负载电容的等效串联电阻和负载电流的影响.采用SMIC0.5μm工艺进行仿真后表明,此款电路在整个负载范围内能显著提高LDO的频率稳定性和瞬态响应特性.     

A Low Voltage Quadrature VCO Implemented With Series Frequency Doublers

Using the transformer coupling technique, this letter presents a new quadrature voltage-controlled oscillator (QVCO) with bottom series-coupled transistors. The proposed CMOS QVCO has been implemented with the TSMC $0.13~mu{rm m}$ 1P8M CMOS process, and the die area is $1.03 times 0.914~{rm mm}^{2}$. At the supply voltage of 1.0 V, the total power consumption is 3.56 mW. The free-running frequency of the QVCO is tunable from 5.43 GHz to 5.92 GHz as the tuning voltage is varied from 0.0 V to 1.0 V. The measured phase noise at 1 MHz frequency offset is $-117.98~{rm dBc/Hz}$ at the oscillation frequency of 5.5 GHz and the figure of merit (FOM) of the proposed QVCO is $-187.27~{rm dBc/Hz}$.