Current programmed control of a single-phase two-switch buck-boost power factor correction circuit

This paper presents a new current programmed control (CPC) technique for a cascaded two-switch buck-boost converter suitable as a low-cost power factor correction (PFC) rectifier in a variable speed motor drive. This new CPC technique, which is an extension of the conventional CPC method, enables the variable output dc voltage, and is therefore suitable in a pulse amplitude modulated (PAM) motor drive or as a universal input-power supply. The CPC method is very simple and requires only a constant-current reference without any changes in the transition between boost and buck operating mode, and the line current is practically unaffected by the topology-mode shift. Simulations and experimental results verify the presented control technique. Compliance with IEC-61000-3-2 class A is achieved. The experimental setup is based on a commercial CPC integrated circuit (IC) for dc-dc converters. This new control technique enables a simple low-cost control circuit for the two-switch buck-boost converter, which complies with IEC-61000-3-2, and the PFC circuit has inherent in-rush and overcurrent protection.     

Analysis and Design for a Novel Single-Stage High Power Factor Correction Diagonal Half-Bridge Forward AC–DC Converter

By means of components placement, the buck-boost and diagonal half-bridge forward converters are combined to create a novel single-stage high power factor correction (HPFC) diagonal half-bridge forward converter. When both the PFC cell and dc–dc cell operate in DCM, the proposed converter can achieve HPFC and lower voltage stress of the bulk capacitor. The circuit analysis of the proposed converter operating in$ DCM+ DCM$mode is presented. In order to design controllers for the output voltage regulation, the ac small-signal model of the proposed converter is derived by the averaging method. Based on the derived model, the proportional integral (PI) controller and minor-loop controller are then designed. The simulation and experimental results show that the proposed converter with the minor-loop controller has faster output voltage regulation than that with the PI controller despite the variations of line voltage and load. Finally, a 100-W prototype of the proposed ac–dc converter is implemented and the theoretical result is experimentally verified.     

Design-Oriented Analysis and Performance Evaluation of Buck PFC Front End

In universal-line ac/dc converters that require power factor correction (PFC), maintaining a high efficiency across the entire line and load ranges poses a major challenge. Typically, a boost PFC front end exhibits 1%–3% lower efficiency at 100-V line compared to that at 230-V line. It is shown in this paper that a buck PFC front end with an output voltage in the 80-V range can maintain a high efficiency across the entire line and load ranges. A thorough analysis of the buck PFC converter operation and performance along with design optimization guidelines are presented. Experimental results obtained on a 90-W notebook adapter are provided. A loss analysis based on SIMPLIS and PSPICE simulations is also included. Major factors that contribute to the improved efficiency of the buck PFC versus the boost PFC are briefly explained.      

A parallel-connected single phase power factor correction approach with improved efficiency

In this paper, a new parallel-connected single phase power factor correction (PFC) topology using two flyback converters is proposed to improve the output voltage regulation with simultaneous input power factor correction and control. This approach offers lower cost and higher efficiency by parallel processing of the total power. Flyback converter-I primarily regulates output voltage with fast dynamic response and processes 55% of the power. Flyback converter-II with ac/dc PFC stage regulates input current shaping and PFC, and processes the remaining 45% of the power. This paper presents a design example and circuit analysis for 200 W power supply. A parallel-connected interleaved structure offers smaller passive components, less losses even in continuous conduction inductor current mode, and reduced volt-ampere rating of dc/dc stage converter. TI-DSP, TMS320LF2407, is used for implementation. Simulation and experimental results show the performance improvement.     

A new modulation strategy for a buck-boost input AC/DC converter

This paper presents a novel modulation strategy for a power factor corrected (PFC), isolated AC/DC converter derived from the integration of a nonisolated, two switch buck-boost AC/DC converter with an isolated dual active bridge DC/DC converter (2SBBDAB). This strategy, termed discontinuous leading/trailing edge (DLTE) modulation, serves to maximize the duty cycle of the input switch while keeping the current in the buck-boost inductor discontinuous. Hence, the crest factors of the currents in the switching devices are minimized, the input switch is turned on at zero current and the zero-voltage switching ranges of the bridge switches are unaffected by the integration. A conventional isolated, PFC AC/DC converter typically consists of a boost converter cascaded with a forward converter. The ratings required of the power switching devices of the 2SBBDAB employing the DLTE modulation strategy are similar to those required of the conventional design for wide line voltage operation. However, the 2SBBDAB converter has higher line voltage surge immunity than that of the conventional design and, unlike the conventional design, it has inherent inrush current limiting. The DLTE modulation strategy may be applied to the family of converters composed of the two switch buck-boost integrated with half and full-bridge forward converters     

Analysis and design of a single-stage single-switch bi-flyback ac/dc converter

An analysis and design of single-stage, single-switch bi-flyback ac/dc converter is presented. The main flyback stage controls the output power from the link capacitor voltage with Discontinuous Conduction Mode (DCM) or Continuous Conduction Mode (CCM) operation, while an auxiliary flyback stage supplies the power to the output directly from ac line input with DCM operation.

This scheme can effectively reduce the voltage stress on the link capacitor and can achieve the power factor correction (PFC) without a dead band at line zero-crossings, which reduces the harmonic distortion in ac line current. Theoretical analysis of the converter is presented and design guidelines to select circuit components are given. The experimental results on a 60?W (15?V, 4?A), 100?kHz ac/dc converter show that maximum link voltage and maximum efficiency are around 415?V and 82%, respectively. The power factor is above 0.96 under universal line input and load conditions.     

Performance Comparison of Single-Stage Three-Level Resonant AC/DC Converter Topologies

In this paper, the performance of different three-level resonant converters is studied for single-stage power factor correction operation. These converters are suitable for power ranges higher than that in the currently available single-stage converters, due to their high efficiency and reduced component stresses. All the converters presented here are characterized by their ability to regulate the output voltage as well as the dc bus voltage. This leads to lower voltage stresses, wider input voltage range, higher output power applications, and improved efficiencies compared to existing single-stage topologies. Due to the availability of more degrees of freedom in the presented converters, two types of control strategies can be used for this purpose: variable frequency asymmetrical pulsewidth modulation control and variable frequency phase-shift modulation control. Three resonant converters will be studied in this paper and their performances as well as the applicability of the aforementioned control methods for each converter are compared. A 2.3-kW, 48-V converter with input voltage range of 90-265 V_rms is used to study the performance of each case.     

几种新型的Buck—Boost变换器的合成

从传输机制说明单管升降压变换器（如Buck-Boost、SPEIC、Cuk）中元件承受的电压和电流应力高的原因,并根据这一机制,采用变换器合成的方式,提出了一系列的双管Buck-Boost变换器。这类变换器根据输入输出条件,可以分别工作于Boost模式和Buck模式,起到降低元件应力的作用。     

Flyboost power factor correction cell and a new family of single-stage AC/DC converters

A novel power factor correction (PFC) cell, called flyboost, is presented. The proposed PFC cell combines power conversion characteristics of conventional flyback and boost converters. Based on the flyboost PFC cell, a new family of single-stage (S/sup 2/) ac/dc converters can be derived. Prominent features of newly derived S/sup 2/ converters include: three power conversions, i.e., boost, flyback, and another isolated dc/dc power conversions are simultaneously realized that typically uses only one power switch and one simple controller; part of the power delivered to the load is processed only once; bulk capacitor voltage can be clamped to the desired level; and capable of operating under continuous current mode. Experimental results on example converters verify that while still achieving high power factor and tight output regulation, the flyboost PFC cell substantially improve the efficiency of the converter.     

Buck–Boost-Type Unity Power Factor Rectifier With Extended Voltage Conversion Ratio

A buck-boost-type unity power factor rectifier is proposed in this paper. The main advantage of the proposed rectifier over the conventional buck-boost type is that it can perform input power factor correction (PFC) over a wider voltage conversion range. With a single switch, a fast well-regulated output voltage is achieved with a zero-current switch at turn-on. Moreover, the switch voltage stress is independent of converter load variation. The proposed converter is well suited for universal offline PFC applications for a low power range (<150 W ). The feasibility of the converter is confirmed with results obtained from a computer simulation and from an experimental prototype.     

On the output voltage ripple in the ideal boost and buck-boost dc–dc converters

This paper re-examines the typical textbook analysis of the ideal boost and buck-boost dc–dc converters operating in the continuous conduction mode. It is shown that there is a range of valid average load currents for which the simple equation usually derived to relate output voltage ripple to output capacitor size in both converters is not strictly correct. An equation giving the correct relationship for the range of load currents in question is derived, using basic concepts. It is shown that the error introduced by using the original equation where the new one is appropriate is significant if both the switching duty cycle of the converter is relatively small (～0.3 or smaller) and the average load current is close to the continuous conduction cutoff. In such cases the size of the output capacitor needed to meet a maximum output voltage ripple specification will be significantly underestimated. The results are illustrated with an example and PSPICE verification.     

A Compensation Technique for Smooth Transitions in a Noninverting Buck–Boost Converter

With the advent of battery-powered portable devices and mandatory adoption of power factor correction, noninverting buck-boost converters are garnering lots of attention. Conventional two-switch or four-switch noninverting buck-boost converters choose their operation modes by measuring input and output voltage magnitude. The criterion for the selection of the operation mode can cause higher output voltage transients in the neighborhood, where input and output are close to each other. For the mode selection, due to the voltage drops raised by the parasitic components, it is not enough just to compare the magnitude of input and output voltages. In addition, the difference in the minimum and maximum effective duty cycles between controller output and switching device yields discontinuity at the instant of mode change. Moreover, the different properties of output voltage versus a given duty cycle of buck and boost operating modes contribute to the output voltage transients. In this paper, the effect of the discontinuity due to the effective duty cycle derived from the device switching time at the mode change is analyzed. A technique to compensate the output voltage transient due to this discontinuity is proposed. In order to attain additional mitigation of output transients and a linear input/output voltage characteristic in buck and boost modes, the linearization of DC gain of the large-signal model in boost operation is analyzed as well. Analytical, simulation, and experimental results are presented to validate the proposed theory.     

Input impedance analysis of single-phase PFC converters

The input impedance of single-phase boost power factor corrected (PFC) AC-DC converters is modeled and analyzed in this paper. A large-signal model is presented for the input impedance which overcomes the limitations of traditional piece-wise linearized models. The model is valid at frequencies ranging from the crossover frequency of the output voltage loop to half the switching frequency of the converter. Experimental results from a boost single-phase PFC converter are provided to validate the model. Input characteristics of typical boost PFC converters, such as input impedance dipping, leading phase of the input current, and responses to distorted input voltages are studied by using the model. A simple compensation technique to reduce the dipping in the input impedance, thereby improving converter performance and minimizing the potential for undesirable interactions with the input filter or the ac source, is also presented.     

A Unity Power Factor Correction Preregulator With Fast Dynamic Response Based on a Low-Cost Microcontroller

Low cost passive power factor correction (PFC) and single-stage PFC converters cannot draw a sinusoidal input current and are only suitable solutions to supply low power levels. PFC preregulators based on the use of a multiplier solve such drawbacks, but a second stage dc-dc converter is needed to obtain fast output voltage dynamics. The output voltage response of PFC preregulators can be improved by increasing the corner frequency of the output voltage feedback loop. The main drawback to obtaining a faster converter output response is the distortion of the input current. This paper describes a simple control strategy to obtain a sinusoidal input current. Based on the static analysis of output voltage ripple, a modified sinusoidal reference is created using a low cost microcontroller in order to obtain an input sinusoidal current. This reference replaces the traditional rectified sinusoidal input voltage reference in PFC preregulators with multiplier control. Using this circuitry, PFC preregulator topologies with galvanic isolation are suitable solutions to design a power supply with fast output voltage response (10 or 8.33 ms) and low line current distortion. Finally, theoretical and simulated results are validated using a 500 W prototype.     

基于伏秒平衡原理的Buck-Boost变换器分析

针对现有"电力电子技术"教材中普遍存在的对Buck-Boost变换器的分析不完整等问题,本文基于伏秒平衡原理对Buck-Boost变换器进行了全面分析,推导出变换器全范围的输入输出电压关系,电流连续模式(CCM)和断续模式(DCM)的临界工作条件以及电路各参数对电流纹波和电压纹波的影响等。本文一方面有助于更全面深入地理解Buck-Boost变换器的工作原理及特性,另一方面有助于DC-DC变换器分析方法的统一,具有一定的教学指导意义。     

Voltage-source active power filter based on multilevel converter and ultracapacitor DC link

A new topology for active power filters (APF) using an 81-level converter is analyzed. Each phase of the converter is composed of four three-state converters, all of them connected to the same capacitor dc link voltage and their output connected in series through output transformers. The main advantages of this kind of converter are the negligible harmonic distortion obtained and the very low switching frequency operation. The single-phase equivalent circuit is analyzed and their governing equations derived. The dc link voltage control, based on manipulating the converter's voltage phase, is analyzed together with the circuit's characteristics that determine the capability to draw or deliver active and reactive current. Simulation results for this application are compared with conventional pulsewidth-modulated (PWM) converters, showing that this filter can compensate load current harmonics, keeping better-quality sinusoidal currents from the source. The simulated configuration uses a 1-F ultracapacitor in the dc link, making it possible to store energy and deliver it during short voltage dips. This is achieved by applying a modulation control to maintain a stable ac voltage during dc voltage drops. A prototype of the filter was implemented and tested, and the obtained current waveforms showed to be as good as expected.     

Voltage and current stress reduction in single-stage power factorcorrection AC/DC converters with bulk capacitor voltage feedback

Single-stage power factor correction (PFC) AC/DC converters integrate a boost-derived input current shaper (ICS) with a flyback or forward DC/DC converter in one single stage. The ICS can be operated in either discontinuous current mode (DCM) or continuous current mode (CCM), while the flyback or forward DC/DC converter is operated in CCM. Almost all single-stage PFC AC/DC converters suffer from high bulk capacitor voltage stress and extra switch current stress. The bulk capacitor voltage feedback with a coupled winding structure is widely used to reduce both the voltage and current stresses in practical single-stage PFC AC/DC converters. This paper presents a detailed analysis of the bulk capacitor voltage feedback, including the relationship between bulk capacitor voltage, input current harmonics, voltage feedback ratio, and load condition. The maximum bulk capacitor voltage appears when the DC/DC converter operates at the boundary between CCM and DCM. This paper also reveals that only the voltage feedback ratio determines the input current harmonics under DCM ICS and CCM DC/DC operation. The theoretical prediction of the bulk capacitor voltage as well as the predicted input harmonic contents is verified experimentally on a 60 W AC/DC converter with universal-line input     

General Control Considerations for Input-Series Connected DC/DC Converters

This paper discusses the general control problems of dc/dc converters connected in series at the input. As the input voltage is shared by a number of dc/dc converters, the resulting converter relieves the voltage stresses of individual devices and hence is suitable for high input-voltage applications. At the output side, parallel connection provides current sharing and is suitable for high output-current applications. Moreover, series connection at the output side is also possible, resulting in output voltage sharing. Theoretically, from a power balance consideration, one can show that fulfillment of input-voltage sharing implies fulfillment of output-current or of output-voltage sharing, and vice versa. However, the presence of right-half-plane poles can cause instability when the sharing is implemented at the output side. As a consequence, control should be directed to input-voltage sharing in order to ensure a stable sharing of the input voltage and of the output current (parallel connection at output) or output voltage (series connection at output). In this paper, general problems in input-series connected converter systems are addressed. Minimal control structures are then derived and some practical design considerations are discussed in detail. Illustrative examples are given for addressing these general control considerations. Finally, experimental prototypes are built to validate these considerations.      

Switched-Capacitor/Switched-Inductor Structures for Getting Transformerless Hybrid DC–DC PWM Converters

A few simple switching structures, formed by either two capacitors and two-three diodes (C-switching), or two inductors and two-three diodes (L-switching) are proposed. These structures can be of two types: ldquostep-downrdquo and ldquostep-up.rdquo These blocks are inserted in classical converters: buck, boost, buck-boost, Cuk, Zeta, Sepic. The ldquostep-downrdquo C- or L-switching structures can be combined with the buck, buck-boost, Cuk, Zeta, Sepic converters in order to get a step-down function. When the active switch of the converter is on, the inductors in the L-switching blocks are charged in series or the capacitors in the C-switching blocks are discharged in parallel. When the active switch is off, the inductors in the L-switching blocks are discharged in parallel or the capacitors in the C-switching blocks are charged in series. The ldquostep-uprdquo C- or L-switching structures are combined with the boost, buck-boost, Cuk, Zeta, Sepic converters, to get a step-up function. The steady-state analysis of the new hybrid converters allows for determing their DC line-to-output voltage ratio. The gain formula shows that the hybrid converters are able to reduce/increase the line voltage more times than the original, classical converters. The proposed hybrid converters contain the same number of elements as the quadratic converters. Their performances (DC gain, voltage and current stresses on the active switch and diodes, currents through the inductors) are compared to those of the available quadratic converters. The superiority of the new, hybrid converters is mainly based on less energy in the magnetic field, leading to saving in the size and cost of the inductors, and less current stresses in the switching elements, leading to smaller conduction losses. Experimental results confirm the theoretical analysis.     

Large-signal modeling of hysteretic current-programmed converters

Large-signal dynamic models for hysteretic current-programmed buck, boost, and buck-boost converters are proposed. The model is expressed by a single differential equation. The small-signal transfer functions of these three converters are also derived, based on the large-signal model. The analysis shows that under the hysteretic current-programmed control, the output voltage of the buck converter is independent of the supply voltage, and there is a right-halfplane (RHP) zero in the control-to-output transfer function of boost and buck-boost converters. An experimental prototype is breadboarded to verify the analysis