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1.
针对应用于单光子探测的单光子雪崩二极管建立了EDA电路模型,讨论了模型参数设置及仿真方法,利用此模型分别完成了像素级被动淬火集成电路、像素级主动淬火及快速恢复集成电路的设计仿真,并利用CSMC公司的0.5μm CMOS工艺进行流片制作.结果表明,建立的探测器模型与CMOS电路设计相互兼容,通过合适的电路设计和参数设置,采用以上集成淬灭电路的单光子探测器的最小"盲时"可分别达到100 ns和4 ns.  相似文献   

2.
采用CAD技术和典型双极工艺完成模拟乘法器集成电路研制后建立了器件子电路模型,并添加到Pspice模型库中.在设计电路时,用户可以很方便地从模型库中调用子电路模型,提高了设计效率.以立方电路设计为例,介绍了模拟乘法器子电路的建模过程和调用方法.  相似文献   

3.
模拟集成电路的"自顶向下"设计方法能大大提高电路设计效率.提出了一种"混合宏模型",能高效、简便地完成模拟集成电路的建模,进而指导器件级电路设计.基于"混合宏模型"的设计方法,完成了一款基于HHNEC 0.25 μm标准CMOS工艺的无电容型LDO设计.  相似文献   

4.
高速数据采集系统的信号完整性分析   总被引:1,自引:1,他引:0  
郭霞  杨涛  张浩 《电子科技》2008,21(1):31-33
信号完整性已经成为了高速数字PCB设计所关心的主要问题.文中简述了基于IBIS模型的信号完整性仿真分析的基本概念及其流程,并分析了基于IBIS模型的高速数据采集系统的信号完整性问题,利用仿真结果对设计进行修改.说明高速电路设计中采用基于信号完整性仿真设计是必要的,也是可行的.  相似文献   

5.
针对抗辐照设计中特殊非规则条栅栅结构的CMOS/SOI器件,分析其SPICE模型参数,对源漏电阻、电容、体接触电阻等其他模型参数作出调整,建立非标准器件的完整精确模型.设计制作了多种不同非标准栅结构的PD CMOS/SOI 晶体管,并采用新的SPICE模型参数来模拟这些器件.模拟数据和试验数据具有很好的一致性,证明所建立的模型具有较高精度,适合抗辐照电路设计应用.  相似文献   

6.
许长喜 《微电子学》2006,36(2):154-158
在简要介绍高阶1位量化∑-△A/D转换器基本原理的基础上,分析了∑-△调制器的噪声特性;介绍了传统线性模型下的噪声传递函数的设计方法.同时,结合实际高阶模拟∑-△调制器的开关电容实现电路,重点对影响调制器性能的非理想因素进行了详细分析,并采用程序建模仿真的方法指导电路设计.与传统设计方法的结果对比表明,文中的方法可以为电路设计提供更加可靠的依据.  相似文献   

7.
主要介绍了C波段低噪声单片放大器的设计方法和电路设计指标.电路设计基于ADS微波设计环境,采用GaAs工艺技术实现.通过电路设计与电路版图电磁验证相结合的方法,准确设计出了电路.本单片采用两级放大,电路工作频率范围为5~6 GHz,噪声系数小于1.2 Db,增益大于24 Db,输入输出驻波比小于1.5:1,增益平坦度△Gp≤±0.1 Db,1 Db压缩点P-1≥12dBm,直流电流小于50 Ma.电路最终测试结果与设计结果吻合.  相似文献   

8.
提出了基于设计规范匹配的数模混合电路自动验证与自动优化工具.将数模混合电路的设计规范创建成可仿真的行为模型,并与实际电路设计进行功能和性能的自动匹配.当电路的性能与设计规范不匹配时,进行电路管子尺寸自动优化,以保证电路设计完全符合设计规范.基于波形比较的功能匹配算法和基于差异进化的电路管子尺寸优化算法,解决头了设计规范,行为模型和电路设计之间的功能和性能匹配验证.同时,电路自动优化大大节省了设计时间,并得到比人工优化更小的功耗和面积.  相似文献   

9.
提出了一个新的解析的适用于SOI MOSFET's的高频噪声模型.该模型通过耦合能量平衡方程克服了以往噪声模型所具有的缺点,并对短沟SOI器件的噪声给出精确地描述.同时,利用该模型可以容易地计算出相对于最小噪声值处的优化的栅源电压,为低噪声的电路设计提供优化的设计方向.由于该噪声模型的简单性,可以很方便地将模型植入电路模拟器如SPICE中完成电路设计.  相似文献   

10.
微弱光信号前置放大电路设计   总被引:9,自引:1,他引:9  
从光电检测电路设计方案入手,分析了其中的光电转换二极管、前置运算放大器、滤波电路的选取原则,给出了一个光电转换系统的设计模型.研究结果表明:采用该设计方案可以有效展宽频带并提高信噪比.  相似文献   

11.
The design and performance of an X-band amplifier with GaAs Schottky-gate field-effect transistors are described. The amplifier achieves 20 /spl plusmn/ 1.3-dB gain with a 5.5-dB typical noise figure (6.9 dB maximum) over the frequency range of 8.0-12.0 GHz. The VSWR at the input and output ports does not exceed 2.5:1. The minimum output power for 1-dB gain compression is +13 dBm, and the intercept point for third-order intermodulation products is +26 dBm. The design of practical wide-band coupling networks is discussed. These networks minimize the overall amplifier noise figure and maintain a constant gain in the band.  相似文献   

12.
本文应用数理统计中的正交表设计法研究并设计微波高成品率匹配网络和放大器。给出了Smith圆图上不同阻抗区域所对应的高成品率匹配网络结构,并应用高成品率匹配网络和正交表设计了一个微波FET放大器,其特性和文献[5]用简化实频技术设计的基本相同,但其成品率要比[5]高得多。  相似文献   

13.
A single-frequency analysis of radial and planar amplifier combiner circuits is presented and expresses the dependence of amplifier combiner performance on the scattering parameters of the amplifiers and combiner/divider networks. The analysis results in useful design guidelines to achieve optimum performance for small variations in amplifier parameters and graceful degradation under the condition of amplifier failure. Several examples are presented to verify the accuracy of the derived expressions. The scattering matrices of radial and planar combiner/ divider networks are derived in the Appendix.  相似文献   

14.
The continuous class-E power amplifier at sub-nominal condition is proposed in this paper. The class-E power amplifier at continuous mode means it can be high efficient on a series matching networks while at sub-nominal condition means it only requires the zero-voltage-switching condition. Comparing with the classical class-E power amplifier, the proposed design method releases two additional design freedoms, which increase the class-E power amplifier’s design flexibility. Also, the proposed continuous class-E power amplifier at sub-nominal condition can perform high efficiency over a broad bandwidth. The performance study of the continuous class-E power amplifier at sub-nominal condition is derived and the design procedure is summarised. The normalised switch voltage and current waveforms are investigated. Furthermore, the influences of different sub-nominal conditions on the power losses of the switch-on resistor and the output power capability are also discussed. A broadband continuous class-E power amplifier based on a Gallium Nitride (GaN) transistor is designed and testified to verify the proposed design methodology. The measurement results show, it can deliver 10–15 W output power with 64–73% power-added efficiency over 1.4–2.8 GHz.  相似文献   

15.
低噪声放大器包括输入匹配网络、微波晶体管放大器和输出匹配网络.微波晶体管放大器是设计中的核心部分.根据低噪声放大器设计的原理,提出技术指标要求,设计一个5GHz单级低噪声放大器,经过技术指标分析,采用Fujitsu公司的FHX35LG型HEMT场效应管晶体管.阐述了如何利用Agilent公司的ADS软件进行分析和优化设...  相似文献   

16.
The design of a 2-stage broadband X band amplifier using GaAs Schottky field-effect transistors is described. The performance of the intrinsic device and the amplifier are summarised. The amplifier gives 9.5±1 dB gain over the frequency range 6.5?12 GHz. The v.s.w.r. at the input and the output does not exceed 2.5:1. Practical wideband matching networks are described that minimise overall amplifier noise figure and maintain a constant gain over the design bandwidth, while including the effects of parasitics, loss and discontinuity capacitances.  相似文献   

17.
A technique for bandwidth enhancement of a given amplifier is presented. Adding several interstage passive matching networks enables the control of transfer function and frequency response behavior. Parasitic capacitances of cascaded gain stages are isolated from each other and absorbed into passive networks. A simplified design procedure, using well-known low-pass filter component values, is introduced. To demonstrate the feasibility of the method, a CMOS transimpedance amplifier (TIA) is implemented in a 0.18-/spl mu/m BiCMOS technology. It achieves 3 dB bandwidth of 9.2 GHz in the presence of a 0.5-pF photodiode capacitance. This corresponds to a bandwidth enhancement ratio of 2.4 over the amplifier without the additional passive networks. The transresistance gain is 54 dB/spl Omega/, while drawing 55 mA from a 2.5-V supply. The input sensitivity of the TIA is -18 dBm for a bit error rate of 10/sup -12/.  相似文献   

18.
Network synthesis is a powerful design tool when applied to the design of matching networks for wide-band microwave amplifiers. Significant design improvements have been made in the computer-aided synthesis process, which provides a powerful, efficient, and friendly tool for the microwave amplifier designer. Design methodologies are given, computer automation methods are outlined, and a complete amplifier design example is included.  相似文献   

19.
A systematic computer-aided synthesis (CAS) technique of lumped Iossy matching networks is presented in this paper. This exact synthesis procedure can take arbitrary finite quality factor Q for each lumped element in the matching network and therefore facilitate the circuit design for monolithic microwave integrated circuits (MMIC's) where the loss of the passive elements is too large to be neglected. The gain-band-width limitations of some useful lumped Iossy matching networks are discussed in detail and are summarized in a set of gain-bandwidth constraint plots. An interactive computer program LUMSYN is developed to solve this lumped Iossy synthesis problem. LUMSYN is a general-purpose CAS program which can be used by microwave circuit designers with limited background in network synthesis to carry out Iow-noise and power amplifier designs in MMIC's. Finally, a design example of broad-band monolithic microwave low-noise amplifier using a state-of-the-art low-noise submicron gate-length GaAs MESFET is presented to illustrate the computer-aided synthesis of MMIC amplifiers.  相似文献   

20.
A computer-aided design (CAD) procedure based on the real-frequency technique (RFT) is introduced for treating the matching of an arbitrary load to a complex generator. In this paper, the method has been applied to the design of interstage matching networks for microwave active circuits. The RFT provides several advantages over most of the usual techniques. It requires neither any transistor model because it directly includes measuring scattering- and noise-parameter data, nor a predetermined matching-circuit topology is necessary. A low-noise amplifier (LNA) design proceeding directly from experimental data is presented. Moreover, a new idea for treating the broadband matching problem leads to the use of an equalizer topology containing cascaded transmission lines with lossy junctions. Thus, gain-flatness and stability are satisfied by designing the input and the output matching circuits by the line-segment technique. An example is presented for the matching of a 0.1-5 GHz amplifier  相似文献   

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