High-Performance Twin Silicon Nanowire MOSFET (TSNWFET) on Bulk Si Wafer

A gate-all-around (GAA) twin silicon nanowire MOSFET (TSNWFET) with 5-nm-radius channels on a bulk Si wafer is successfully fabricated to achieve extremely high-drive currents of 2.37 mA/ mum for n-channel and 1.30 mA/ mum for p-channel TSNWFETs with mid-gap TiN metal gate that are normalized by a nanowire diameter. It also shows good short-channel effects immunity down to 30-nm gate length due to the GAA structure and the nanowire channel. The effect of bottom parasitic transistor in TSNWFET is also investigated.     

硅表面纳米图案化制作技术的研究进展

Si材料表面形成纳米化图案是制作新型硅基纳米电子器件、光电子器件等的基础和前提.根据不同需要,在纳米图案化Si衬底表面淀积不同功能纳米材料则能将成熟Si平面工艺技术的优势与纳米材料的新功能优势结合起来而制作出性能优良的Si基纳电子和光电子器件.介绍了具有纳米图案化表面Si材料在晶格失配较大Ⅲ-Ⅴ族材料外延制备上的应用,综述了各种Si衬底材料表面纳米图案化制作技术.     

Bi-based Nanowire and Nanojunction Arrays： Fabrication and Physical Properties

This article reviews the recent developments in the fabrication and properties of one-dimensional （1D） Bi-based nanostructures, including Bi, Sb, BixSb1-x and Bi2Te3 nanowire arrays, and Bi-Bi and Bi-Sb nanojunction arrays. In this article, we present an efiective method to fabricate Bi nanowire arrays with difierent diameters in anodic alumina membrane （AAM） with a single pore size by the pulsed electrodeposition. The fabrication of the high-filling and ordered Bi1-xSbx and Bi2Te3 single crystalline nanowire arrays, the Bi nanowire metalsemiconductor homojunction and Bi-Sb nanowire metal-semiconductor heterojunction arrays by the pulsed electrodeposition are reported. The factors controlling the composition, diameter, growth rate and orientation of the nanowires are analyzed, and the growth mechanism of the nanowire and nanojunction arrays are discussed together with the study of the electrical and thermal properties of Bi-based nanowires and nanojunctions.Finally, this review is concluded with some perspectives on the research directions and focuses in the Bi-based nanomaterials fields.     

氮化硅/聚苯乙烯复合电子基板材料制备及性能

以Si3N4粉末作为增强组元与颗粒状聚苯乙烯进行复合,用热模压法制备了氮化硅/聚苯乙烯复合电子基板材料。研究了Si3N4含量和聚苯乙烯颗粒大小对复合材料导热性能和介电性能的影响,通过理论分析确定了影响导热性能的主要因素。研究结果表明,随Si3N4含量的增加,复合材料中粉末形成导热网络,复合材料的热导率也随之增加,聚苯乙烯颗粒尺寸越大,复合材料热导率越大。热导率的增加与导热网络的形成有关,增加Si3N4含量和聚苯乙烯颗粒尺寸都有助于导热网络的形成。复合材料的介电常数取决于复合材料体系组元的体积含量。     

氮化硅-铼嬗变模拟靶材的制造和性能研究

采用无压烧结的方法(在1550℃保温3小时)添加5wt.％MgO,5wt.％Y2Oa和不同含量的Re制造出了Si3N4-Re嬗变模拟靶材.研究了Re含量的不同对嬗变靶材致密度和抗弯强度的影响,并通过物相分析,显微组织和断口形貌观察对相关机理进行了分析.     

A Triode Device with a Gate Controllable Schottky Barrier: Germanium Nanowire Transistors and Their Applications

Electrical contacts often dominate charge transport properties at the nanoscale because of considerable differences in nanoelectronic device interfaces arising from unique geometric and electrostatic features. Transistors with a tunable Schottky barrier between the metal and semiconductor interface might simplify circuit design. Here, germanium nanowire (Ge NW) transistors with Cu₃Ge as source/drain contacts formed by both buffered oxide etching treatments and rapid thermal annealing are reported. The transistors based on this Cu₃Ge/Ge/Cu₃Ge heterostructure show ambipolar transistor behavior with a large on/off current ratio of more than 10⁵ and 10³ for the hole and electron regimes at room temperature, respectively. Investigations of temperature‐dependent transport properties and low‐frequency current fluctuations reveal that the tunable effective Schottky barriers of the Ge NW transistors accounted for the ambipolar behaviors. It is further shown that this ambipolarity can be used to realize binary‐signal and data‐storage functions, which greatly simplify circuit design compared with conventional technologies.     

Semiconductor Nanowire Light‐Emitting Diodes Grown on Metal: A Direction Toward Large‐Scale Fabrication of Nanowire Devices

Bottom‐up nanowires are attractive for realizing semiconductor devices with extreme heterostructures because strain relaxation through the nanowire sidewalls allows the combination of highly lattice mismatched materials without creating dislocations. The resulting nanowires are used to fabricate light‐emitting diodes (LEDs), lasers, solar cells, and sensors. However, expensive single crystalline substrates are commonly used as substrates for nanowire heterostructures as well as for epitaxial devices, which limits the manufacturability of nanowire devices. Here, nanowire LEDs directly grown and electrically integrated on metal are demonstrated. Optical and structural measurements reveal high‐quality, vertically aligned GaN nanowires on molybdenum and titanium films. Transmission electron microscopy confirms the composition variation in the polarization‐graded AlGaN nanowire LEDs. Blue to green electroluminescence is observed from InGaN quantum well active regions, while GaN active regions exhibit ultraviolet emission. These results demonstrate a pathway for large‐scale fabrication of solid state lighting and optoelectronics on metal foils or sheets.     

High-Performance Solid-State Supercapacitors Fabricated by Pencil Drawing and Polypyrrole Depositing on Paper Substrate

Nano-Micro Letters - A solid-state powerful supercapacitor (SC) is fabricated with a substrate of Xerox paper. Its current collector based on a foldable electronic circuit is developed by simply...     

铝基表面超疏水材料的制备工艺、效果及耐蚀性

超疏水表面在自清洁材料、腐蚀防护及微流体运输等领域有着广阔的应用前景,目前对金属超疏水表面的研究较少,且制备方法较复杂,不能大面积制备。分别采用喷砂、阳极氧化、喷砂-阳极氧化等方法在铝基体表面构造粗糙结构并对其进行修饰,制备了超疏水表面,通过SEM、接触角及滚动角测定、腐蚀速率测定等分析了超疏水表面的微观形貌、疏水性能和耐海水腐蚀性能。结果表明:喷砂-阳极氧化法制备的铝金属表面具有微米-纳米二级结构,经氟化处理后,与水的接触角达158°,滚动角为1.5°,疏水性能良好;超疏水表面材料的腐蚀速率比铝材低1个数量级。     

金属锌表面超疏水薄膜的制备及其摩擦学性能

通过简单两步法在金属锌表面构筑超疏水薄膜, 锌片首先经N,N-二甲基甲酰胺(DMF)处理在表面构筑微纳结构薄膜, 然后在表面覆盖硬脂酸薄膜以实现超疏水. 采用扫描电子显微镜, 傅里叶红外光谱仪和接触角测量仪等手段表征了超疏水表面的形成机制和表面形貌, 并利用微纳米摩擦磨损试验机研究了超疏水薄膜的减摩耐磨特性. 研究结果发现, 在锌表面形成了一层纳米棒状结构的超疏水薄膜, 水的接触角可达155^o. 超疏水薄膜具有明显的减摩和耐磨特性, 这可归因于DMF处理导致的表面微织构化效应以及脂肪酸自组装薄膜的纳米润滑效应.     

A Simple Approach to the Fabrication of Graphene-Carbon Nanotube Hybrid Films on Copper Substrate by Chemical Vapor Deposition

In this study,graphene-carbon nanotube(CNT) hybrid films were directly synthesized on polycrystalline copper(Cu) substrates by thermal chemical vapor deposition(CVD) method.Graphene films were synthesized on Cu substrate at 1000 ℃ in mixture of gases:argon(Ar),hydrogen(H_2),and methane(CH4).Then,carbon nanotubes(CNTs) were grown uniformly on the surface of graphene/Cu films at 750 ℃ in mixture of Ar,H_2.and acetylene(C_2H_2) gases.Ferric salt FeCl_3 solution deposited onto the surface of graphene/Cu substrate by spin coating method was used as precursor for the growth of the CNTs.The density and quality of the CNTs on the surface of graphene/Cu films can be controlled by varying the concentration of FeCl_3 salt catalyst.