Software concept for checking engineering designs for conformance with codes and standards

As we progress toward formalizing models for the knowledge used in the design process, we must also consider the structure of systems that can utilize and operate on the knowledge models. Engineering systems of the future will be comprised of many separate but integrated components. In the systems of the 1970s tightly coupled system integration was achieved through hand coding and through the introduction of data base management. In the next generation of systems it will not be possible to express easily the interaction between systems in the form of handwritten codes. A rule-based approach may be a better way to achieve loose coupling of complex systems. A prototype system for checking designed components for conformance with applicable standards is described in this paper. The integrated system consists of a code conformance checking package, a structural analysis package, an engineering data base management system, a production rule processing system, and an appropriate user interface. The system structure and the representation of the knowledge is emphasized.     

Assuring property conformance of code generators via model checking

Automatic code generation is an essential cornerstone of today’s model-driven approaches to software engineering. Thus a key requirement for the success of this technique is the reliability and correctness of code generators. This article describes how we employ standard model checking-based verification to check that code generator models developed within our code generation framework Genesys conform to (temporal) properties. Genesys is a graphical framework for the high-level construction of code generators on the basis of an extensible library of well-defined building blocks along the lines of the Extreme Model-Driven Development paradigm. We will illustrate our verification approach by examining complex constraints for code generators, which even span entire model hierarchies. We also show how this leads to a knowledge base of rules for code generators, which we constantly extend by e.g. combining constraints to bigger constraints, or by deriving common patterns from structurally similar constraints. In our experience, the development of code generators with Genesys boils down to re-instantiating patterns or slightly modifying the graphical process model, activities which are strongly supported by verification facilities presented in this article.     

维哈柯文字库标准符合性检测研究

在调查和分析维哈柯文字库存在问题的基础上,依据国家制定的维哈柯文字符集标准与字形标准,明确了维哈柯文字库标准符合性检测的含义与内容,结合对TrueType字形技术,TrueType字库文件基本构成的详细研究,提出了完整的维哈柯文字库标准符合性检测的方案与算法,并实现了维哈柯文字库标准符合性检测工具的开发.实验结果表明检测方案完整、可行,能较好地解决维哈柯文字库标准符合性检测问题,对其它文字的字库标准符合性检测也具有一定的借鉴意义.     

A semantic framework for the abstract model checking of tccp programs

The Timed Concurrent Constraint programming language (tccp) introduces time aspects into the Concurrent Constraint paradigm. This makes tccp especially appropriate for analyzing timing properties of concurrent systems by model checking. However, even if very compact state representations are obtained thanks to the use of constraints in tccp, large state spaces can still be generated, which may prevent model-checking tools from verifying tccp programs completely. Model checking tccp programs is a difficult task due to the subtleties of the underlying operational semantics, which combines constraints, concurrency, non-determinism and time. Currently, there is no practical model-checking tool that is applicable to tccp. In this work, we introduce an abstract methodology which is based on over- and under-approximating tccp models and which mitigates the state explosion problem that is common to traditional model-checking algorithms. We ascertain the conditions for the correctness of the abstract technique and show that this preliminary abstract semantics does not correctly simulate the suspension behavior, which is a key feature of tccp. Then, we present a refined abstract semantics which correctly models suspension. Finally, we complete our methodology by approximating the temporal properties that must be verified.     

Heuristics for model checking Java programs

Model checking of software programs has two goals – the verification of correct software and the discovery of errors in faulty software. Some techniques for dealing with the most crucial problem in model checking, the state space explosion problem, concentrate on the first of these goals. In this paper we present an array of heuristic model checking techniques for combating the state space explosion when searching for errors. Previous work on this topic has mostly focused on property-specific heuristics closely related to particular kinds of errors. We present structural heuristics that attempt to explore the structure (branching structure, thread interdependency structure, abstraction structure) of a program in a manner intended to expose errors efficiently. Experimental results show the utility of this class of heuristics. In contrast to these very general heuristics, we also present very lightweight techniques for introducing program-specific heuristic guidance.     

A VLSI Support for GKS

This microprogrammed VLSI design places the GKS output functions on a single chip, leading the way to substantial enhancements in system performance.     

A verifier for real-time properties

The purpose of this paper is (a) to present a prototype verifier for real-time temporal logic properties, and (b) to improve the average efficiency of the verification procedures over past results where possible. A process control example is used to illustrate the use of the verifier. The verifier is applicable to real-time systems with finite state spaces.This work is supported by the Natural Sciences and Engineering Research Council of Canada.     

LTL model checking for communicating concurrent programs

Innovations in Systems and Software Engineering - We present in this paper a new approach to the static analysis of concurrent programs with procedures. To this end, we model multi-threaded...     

A practical strategy for certifying GKS implementations

The question of how to validate GKS implementations is crucial to the success of GKS as an international standard for computer graphics. This problem has been addressed by a series of certification workshops sponsored by the EEC. A basic strategy for testing GKS implementations is outlined and progress towards the development of a test suite is reported.     

Boolean and Cartesian abstraction for model checking C programs

We show how to attack the problem of model checking a C program with recursive procedures using an abstraction that we formally define as the composition of the Boolean and the Cartesian abstractions. It is implemented through a source-to-source transformation into a Boolean C program; we give an algorithm to compute the transformation with a cost that is exponential in its theoretical worst-case complexity but feasible in practice.     

An identity based universal designated verifier signature scheme secure in the standard model

Universal designated verifier signature was first introduced by Steinfeld, Bull, Wang and Pieprzyk in Asiacrypt 2003. In the universal designated verifier signature scheme, any holder of a signature can designate the signature to any desired designated verifier, such that only the designated verifier will believe that the signature holder holds a valid signature. In SecUbiq’05 [Zhang Fangguo, Susilo Willy, Mu Yi, Chen Xiaofeng, 2005. Identity-based universal designated verifier signatures. In: The First International Workshop on Security in Ubiquitous Computing Systems, Nagasaki, Japan, LNCS 3823. Springer-Verlag, Berlin, pp. 825-834] first extended this notion to the identity based setting and proposed two identity based universal designated verifier signature schemes. However, the security of their scheme is based on the random oracle model. Up to now, there is no provably secure identity based universal designated verifier signature scheme in the standard model. In this paper, we propose the first identity based universal designated verifier signature scheme whose security can be proven in the standard model based on the hardness of the computational Diffie-Hellman (CDH) problem.     

On an equivalence checking technique for algebraic models of programs

In the paper, the equivalence checking problem for program schemas in balanced semigroup models of programs is studied. A method for constructing algorithms to resolve this problem is proposed in the case where a semigroup model of programs possesses the left cancellation property h ₁ h ₂ = h ₁ h ₃ ? h ₂ = h ₃. The equivalence checking problem is shown to be decidable in time that polynomially depends on size of the schema being checked if the balanced semigroup model of programs possesses additionally the right cancellation property h ₂ h ₁ = h ₃ h ₁ ? h ₂ = h ₃.     

Towards scalable model checking of self-stabilizing programs

Existing approaches for verifying self-stabilization with a symbolic model checker have relied on the use of weak fairness. We point out that this approach has limited scalability. To overcome this limitation, first, we show that if self-stabilization is possible without fairness then the cost of verifying self-stabilization is substantially lower. In fact, we observe from several case studies that the cost of verification under weak fairness is more than 1000 times that of the cost without fairness.     

A VLSI Implementation of the Graphics Standard GKS

The main advantage when using a standardized graphics system is quite obvious: the application programs become portable. Integrating such a system - and GKS (Graphical Kernel System) is the only one being standardized internationally - into VLSI (Very Large Scale Integration) chips, this graphics system may become an integral part of graphical devices. This guarantees a uniform interface of such devices to GKS applications. Devices of many different kinds will become compatible not only with respect to plugging but even in their logical behaviour, eliminating all device dependencies from the host software.
We have started to design the GKS-chip which will be able to be used in a great variety of devices (vector and raster type). The GKS-chip will bring the computational power to support real time picture updates, limited only by the maximally attainable output data rate.     

Automatic equivalence checking of programs with uninterpreted functions and integer arithmetic

Proving equivalence of programs has several important applications, including algorithm recognition, regression checking, compiler optimization verification and validation, and information flow checking. Despite being a topic with so many important applications, program equivalence checking has seen little advances over the past decades due to its inherent (high) complexity. In this paper, we propose, to the best of our knowledge, the first semi-algorithm for the automatic verification of partial equivalence of two programs over the combined theory of uninterpreted function symbols and integer arithmetic (UF+IA). The proposed algorithm supports, in particular, programs with nested loops. The crux of the technique is a transformation of uninterpreted functions (UFs) applications into integer polynomials, which enables the precise summarization of loops with UF applications using recurrences. The equivalence checking algorithm then proceeds on loop-free, integer only programs. We implemented the proposed technique in CORK, a tool that automatically verifies the correctness of compiler optimizations, and we show that it can prove more optimizations correct than state-of-the-art techniques.