Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm

Novel gate stacks with epitaxial gadolinium oxide (Gd₂O₃) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10^–7 A cm^–2 are observed at a capacitance equivalent oxide thickness of CET=1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd₂O₃ thickness of 3.1 nm yield current densities down to 0.5 A cm⁻² at V_g=+1 V. The extracted dielectric constant for these gate stacks ranges from k=13 to 14. These results emphasize the potential of NiSi/Gd₂O₃ gate stacks for future material-based scaling of CMOS technology.     

Examination and evaluation of La2O3 as gate dielectric for sub-100 nm CMOS and DRAM technology

High-k gate dielectric La₂O₃ thin films have been deposited on Si(1 0 0) substrates by molecular beam epitaxy (MBE). Al/La₂O₃/Si metal-oxide–semiconductor capacitor structures were fabricated and measured. A leakage current of 3 × 10⁻⁹ A/cm² and dielectric constant between 20 and 25 has been measured for samples having an equivalent oxide thickness (EOT) 2.2 nm. The estimated interface state density D_it is around 1 × 10¹¹ eV⁻¹ cm⁻². EOT and flat-band voltage were calculated using the NCSU CVC program. The chemical composition of the La₂O₃ films was measured using X-ray photoelectron spectrometry and Rutherford backscattering. Current density vs. voltage curves show that the La₂O₃ films have a leakage current several orders of magnitude lower than SiO₂ at the same EOT. Thin La₂O₃ layers survive anneals of up to 900 °C for 30 s with no degradation in electrical properties.     

Epitaxial praseodymium oxide: a new high-K dielectric

We show results for molecular beam epitaxial growth of praseodymium oxide on Si. On Si(1 0 0) oriented surfaces, crystalline Pr₂O₃ grows as (1 1 0)-domains, with two orthogonal in-plane orientations. Epitaxial overgrowth with Si could not been realized so far. We obtain perfect epitaxial growth of hexagonal Pr₂O₃ on Si(1 1 1). These layers can also be overgrown epitaxially with Si leading to novel tunnel structures. Crystalline Pr₂O₃ on Si(0 0 1) is a promising candidate for highly scaled gate insulators, displaying sufficiently high-K value of around 30, ultra-low leakage current density, good reliability, and high electrical breakdown voltage. The Pr₂O₃/Si(0 0 1) interface exhibits the symmetric band alignment, desired for applying such material in both n- and p-type devices. The valence band as well as the conduction band offset to Si is above 1 eV. The electron masses can be assumed to be very heavy in the oxide. This effect together with the suitable band offsets leads to the unusually low leakage currents found experimentally. Finally, the integration of crystalline Pr₂O₃ high-K gate dielectrics into a conventional CMOS process will be demonstrated.     

Characterization of rare earth oxides based MOSFET gate stacks prepared by metal-organic chemical vapour deposition

We have prepared rare earth oxides based MOSFET gate stacks using metal-organic chemical vapour deposition, MOCVD. Gd₂O₃, La₂O₃, Nd₂O₃ and Pr₆O₁₁ films with thickness 3–20 nm were deposited on silicon substrate at 500 °C. The films were characterized by X-ray diffraction, X-ray reflectivity, transmission electron microscopy and X-ray photoelectron spectroscopy. As a next step, Ru films were grown on the dielectric films at 300 °C as a gate electrode. Electrical characterization of the MOS structures was performed by capacitance–voltage measurements. The structures annealed at 430 °C in forming gas (90% N₂+10% H₂) exhibited dielectric constant ranging from 12 to 14. Typically, the films showed high values of fixed oxide charge density, . Fixed oxide charges can be decreased by post-deposition annealing in forming gas and in oxygen.     

STUDY OF THE ANODIZATION OF Al FILM ON InP SUBSTRATE AND ITS PROPERTIES

The anodization of Al film on InP substrate and properties of anodic Al_2O_33/InPhave been investigated by AES,DLTS,I-V,C-V and ellipsometer.The results show that theanodic oxide Al_2O_3 has a permittivity of 11～12 and a resistivity of 1.3×10~(13) ohm-cm.Interfacestate density at Al_2O_3/InP is about 10~(11) cm~(-2)·eV~(-1).DLTS reveals that there is a continuouslydistributed interface electron traps at Al_2O_3/InP interface.Anodic Al_2O_3 exhibits good stabilityand electrical properties and could be used for passivation,diffusion mask and gate insulator,etc.     

Influence of the deposition conditions on the properties of titanium oxide produced by r.f. magnetron sputtering

This work refers to the electro-optical and structural characteristics of titanium oxide (TiO_x) thin films produced by radio frequency (r.f.) magnetron sputtering that present promising performances for gate dielectric applications, alone or in mixed tandem structures, such as with Al_yO_z films, taking advantage of its high dielectric constant. Films produced with a O₂/Ar ratio between 0.1 and 0.15 present an improved stochiometry and density where the resistivity overcomes 10¹¹ Ω cm and the fixed charge density decreases below 10¹² cm⁻². The deposition pressure influences greatly the growth rate that seems to be a determinant factor dictating the films properties.     

Growth of epitaxial Pr2O3 layers on Si(1 1 1)

The growth of Pr₂O₃ layers on Si(1 1 1) has been studied by X-ray diffraction, Low-energy electron diffraction (LEED) and atomic force microscopy (AFM). Pr₂O₃ starts to grow as a 0.6-nm thick layer corresponding to one unit cell of the hexagonal phase (1 ML). The X-ray results indicate that layers thicker than 0.6 nm do not grow with the hexagonal phase. Growth takes place at a sample temperature of 500–550 °C. Annealing of the monolayer in UHV at a temperature above 700 °C leads to the formation of Pr₂O₃ and PrSi₂ islands. Silicide islands are found only at annealing in UHV and do not occur at annealing in oxygen atmosphere of 10⁻⁸ mbar. The LEED pattern after heating to 730 °C shows a (2×2) and (√3×√3) superstructure and after heating to 1000 °C a (1×5) superstructure occurs. The superstructures seen in the LEED pattern arise from silicide structures in the area between the islands. The silicide remains on the surface and cannot be removed with flashing to 1100 °C. Further deposition of Pr₂O₃ on the surface covered with silicide phases does not lead to growth of ordered layers.     

Growth of lanthanum oxide films for application as a gate dielectric in CMOS technology

We have investigated properties of insulating lanthanum oxide (La₂O₃) films in connection with the replacement of silicon oxide (SiO₂) gate dielectrics in new generation of CMOS devices. The La₂O₃ layers were grown using metal organic chemical vapour deposition (MOCVD) at 500 °C. X-ray diffraction analysis revealed polycrystalline character of the films grown above 500 °C. The X-ray photoemission spectroscopy detected lanthanum carbonate as a principal impurity in the films and lanthanum silicate at the interface with silicon. Density of oxide charge, interface trap density, leakage currents and dielectric constant ( κ) were extracted from the C-V and I-V measurements. Electrical properties, in particular dielectric constant of the MOCVD grown La₂O₃ are discussed with regard to the film preparation conditions. The as grown film had κ11. Electrical measurements indicate possible presence of oxygen vacancies in oxide layer. The O₂-annealed La₂O₃ film had κ17.     

Study of dc conduction mechanisms in dysprosium–manganese oxide insulator thin films grown on Si substrates

Samples of amorphous and crystalline (Dy–Mn) oxide thin films have been prepared on Si(p) substrates. The crystal structure of the oxide film annealed under different conditions was investigated by the X-ray diffraction method (XRD). The percentage weight composition of the compound-oxide films was determined by the X-ray fluorescence (XRF) spectroscopy method. It was observed that Dy oxide and Mn oxide prevent each other to crystallize alone or making a solid solution even at 600 °C, but a compound of DyMnO₃ was formed through the solid-state reaction at T > 800 °C. Samples in form of Al/oxide/Si MOS structures were characterised by measuring their capacitance as a function of gate voltage C(V_g) in order to determine the fixed and interface charge densities as well as the oxide voltage in terms of gate voltage. The total surface charge density was in the device-grade of 10¹⁰–10¹¹ cm⁻². The dc measurements at room temperature show that the main mechanism controlling the current flow is the Richardson–Schottky (RS) mechanism. The parameters of the RS model like the field lowering coefficients and the dynamic relative permittivity were determined. The leakage current density of the samples was studied as a function of temperature in a range of (293–380 K). It was observed that the temperature dependence of crystalline (Dy–Mn) oxide films has a property that higher temperature reduces the current, which may be important in the application in circuits that operate under extreme conditions. Thermal activation energies of electrical conduction were determined.     

Full-band tunneling in high-κ dielectric MOS structures

High-κ oxides such as ZrO₂ and HfO₂ have attracted great interest, due to their physical properties, suitable to replacement of SiO₂ as gate dielectric materials. In this work, we investigate the tunneling properties of ZrO₂ and HfO₂ high-κ oxides, by applying quantum mechanical methods that include the full-band structure of Si and oxide materials. Semiempirical sp³s*d tight-binding parameters have been determined to reproduce ab initio band dispersions. Transmission coefficients and tunneling current have been calculated for Si/ZrO₂/Si and Si/HfO₂/Si MOS structures, showing a very low gate leakage current in comparison to SiO₂-based structures with equivalent oxide thickness.     

Praseodymium based high-k dielectrics grown on Si and SiC substrates

High-k polycrystalline Pr₂O₃ thin films have been deposited by metal organic chemical vapor deposition (MOCVD) technique on Si(0 0 1) and 4H–SiC(0 0 0 1) substrates. MOCVD processes have been carried out from the Pr(tmhd)₃ (H-tmhd= 2,2,6,6-tetramethyl-3,5-heptandione) precursor. Complete structural and morphological characterization of films has been carried out using several techniques (X-ray diffraction (XRD), scanning electron microscopy (SEM), transmission electron microscopy (TEM)). Polycrystalline Pr₂O₃ films have been obtained and at the interface a praseodymium silicate amorphous layer has been observed on both substrates. The electrical properties of the dielectric praseodymium films have been evaluated.     

Silicon dioxide deposited by ECR-PECVD for low-temperature Si devices processing

Silicon dioxide films have been deposited at temperatures less than 270 °C in an electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O₂, SiH₄ and He. The physical characterization of the material was carried out through pinhole density analysis as a function of substrate temperature for different μ-wave power (E_w). Higher E_w at room deposition temperature (RT) shows low defects densities (<7 pinhole/mm²) ensuring low-temperatures process integration on large area. From FTIR analysis and Thermal Desorption Spectroscopy we also evaluated very low hydrogen content if compared to conventional rf-PECVD SiO₂ deposited at 350 °C. Electrical properties have been measured in MOS devices, depositing SiO₂ at RT. No significant charge injection up to fields 6–7 MV/cm and average breakdown electric field >10 MV/cm are observed from ramps I–V. Moreover, from high frequency and quasi-static C–V characteristics we studied interface quality as function of annealing time and annealing temperature in N₂. We found that even for low annealing temperature (200 °C) is possible to reduce considerably the interface state density down to 5 × 10¹¹ cm⁻² eV⁻¹. These results show that a complete low-temperatures process can be achieved for the integration of SiO₂ as gate insulator in polysilicon TFTs on plastic substrates.     

Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric

Thin HfTiO gate dielectric is deposited by reactive co-sputtering method followed by wet or dry N₂ anneal. The effects of Ti content on the performance of HfTiO gate dielectric are investigated by using different sputtering powers for the Ti target. Experimental results indicate that as the Ti content increases, the dielectric constant (κ) can increase up to 40 for a Ti content of 28%. However, when the Ti content is too high, the interface properties and gate leakage properties are deteriorated. On the contrary, results show that owing to the hydrolyzable property of GeO_x, the wet-N₂ anneal can greatly suppress the growth of unstable low-κ GeO_x interlayer, resulting in lower interface-state density and gate leakage current, in addition to larger κ value. In this study, when the sputtering power of the Ti target is 80 W together with a 25-W power for the Hf target and a post-deposition anneal (PDA) in wet-N₂ ambient at 500 °C for 300 s, excellent device performance is achieved: equivalent oxide thickness of 0.72 nm, equivalent dielectric constant of 39, interface-state density of 6.5 × 10¹¹ eV⁻¹ cm⁻² and gate leakage current of 5.7 × 10⁻⁴ A/cm² at V_g = 1 V. Therefore, in order to obtain high-quality HfTiO gate dielectric for small-scaled Ge MOS devices, not only should the Ti content be optimized, the PDA should also be done in a wet-N₂ ambient.     

Thermal Ta2O5––alternative to SiO2 for storage capacitor application

Tantalum pentoxide thin layers (10–100 nm) obtained by thermal oxidation of rf sputtered Ta films on Si have been investigated with respect of their dielectric, structural and electric properties. It is established that stoichiometric Ta₂O₅ detected at the surface of the layers is reduced to tantalum suboxides in their depth. The oxide parameters are discussed in terms of a presence of an unavoidable ultrathin SiO₂ between Si and Ta₂O₅ and bond defects in both the oxide and the interface transition region. Conditions which guarantee obtaining high quality tantalum oxide with a dielectric constant of 32–35 and a leakage current less than 10⁻⁷–10⁻⁸ A/cm² at 1.5 V (SiO₂ equivalent thickness of 2.5–3 nm) are established. These specifications make the layers obtained suitable alternative to SiO₂ for high density DRAMs application.     

Role of Gate Oxide in AlGaN/GaN High-Electron-Mobility Transistor pH Sensors

We report on a comparison of different gate oxides for AlGaN/GaN high-electron-mobility transistor (HEMT) pH sensors. The HEMTs show a linear increase in drain-source current as the pH of the electrolyte solutions introduced to the gate region is decreased. Three different gate oxides were examined, namely the native oxide on the AlGaN surface, a UV-ozone-induced oxide and an Sc₂O₃ gate deposited by molecular beam epitaxy. The Sc₂O₃ produced superior results in terms of resolution in measuring small changes in pH. The devices with Sc₂O₃ in the gate region exhibited a linear change in current between pH 3 and 10 of 37 μA/pH with a resolution of <0.1 pH over the entire pH range. In contrast, the native oxide devices showed a larger change in current, ∼70 μA/pH, but with a degraded resolution of ∼0.4 pH. Results for the UV-ozone oxide were intermediate in resolution, 0.2 pH. These HEMTs have promise for detecting pH changes in biological samples and can be readily integrated into a standard package for wireless data transmission.     

Selection of rare earth silicates for highly scaled gate dielectrics

An aggressive equivalent oxide thickness (EOT) scaling with high-k gate dielectrics has been demonstrated by ultra-thin La₂O₃ gate dielectric with a proper selection of rare earth (La-, Ce- and Pr-) silicates as an interfacial layer. Among silicates, Ce-silicate has shown the lowest interface-state density as low as 10¹¹ cmv⁻²/eV with a high dielectric constant over 20. n-Type field-effect transistor (FET) with a small EOT of 0.51 nm has been successfully fabricated with a La₂O₃ gate dielectric on a Ce-silicate interfacial layer after annealing at 500 °C. Negative shift in threshold voltage and reduced effective electron mobility has indicated the presence of fixed charges in the dielectric. Nonetheless, the high dielectric constant and nice interfacial property of Ce-silicate can be advantageous for the interfacial layer in highly scaled gate dielectrics.     

dc-Conduction mechanism in lanthanum–manganese oxide films grown on p-Si substrate

Thin films of (La–Mn) double oxide were prepared on p-Si substrates for electrical investigations. The samples have been characterised by X-ray fluorescence (XRF) and X-ray diffraction (XRD) methods. The XRF spectrum was used to determine the weight fraction ratio of Mn to La in the prepared samples. The XRD study shows the formation of grains of LaMnO₃ compound through a solid-state reaction for annealing at 800 °C. Samples used to study the electrical characteristics of the prepared films were constructed in form of a metal–oxide–Si MOS structures. Those MOS structures were characterised by the measuring their capacitance as a function of gate voltage C(V_g) in order to determine the oxide charge density Q_ox, the surface density of states D_it at the oxide/Si interface, and to extract the oxide voltage in terms of gate voltage. The extracted dielectric constant of the double oxide film is lower than that of pure La₂O₃ film and larger than that of pure Mn₂O₃ film, but the formation of LaMnO₃ grains by a solid-state reaction at 800 °C increases the relative permittivity to 11.5. These experimental conclusions might be useful to be used in the field of Si-oxide alternative technique. The leakage dc current density vs. oxide field J(E_ox) relationship for crystalline films follow the mechanism of Richardson–Schottky (RS), from which the field-lowering coefficient and the dynamic relative permittivity were determined. Nevertheless, the leakage current density measured in a temperature range of (293–363 K) was not controlled by the RS mechanism. It was observed that the temperature dependence of the leakage current in crystalline (La–Mn) oxide insulating films has metallic-like temperature behaviour, which might be important in the technical applications.     

High Performance β-Ga2O3 Schottky Barrier Transistors with Large Work Function TMD Gate of NbS2 and TaS2

Gallium trioxide, β-Ga₂O₃, has been recently studied due to its promising semiconducting properties as active material in transistors or Schottky diodes. Transistors with β-Ga₂O₃ channels are mostly metal oxide field effect transistors (MOSFET), and they show very negative threshold voltages (V_th) in general. Metal semiconductor field effect transistors (MESFETs) with top gate are also reported with less negative V_th. Still, β-Ga₂O₃ MESFETs are only a few. Here, bottom gate architecture β-Ga₂O₃ MESFETs using transition metal dichalcogenide (TMD) NbS₂ and TaS₂ are reported. Due to the large work functions of those metallic TMDs, the MESFETs display minimum subthreshold swing of 61 mV dec⁻¹, small V_th of −1.2 V, minimum OFF I_D of ≈100 fA, and maximum ON/OFF current ratio of ≈10⁸. Both β-Ga₂O₃ Schottky diodes with TaS₂ and NbS₂ display good junction stability even after 300 °C measurements in 10 mTorr vacuum. When the β-Ga₂O₃ MESFET with TaS₂ gate is integrated as a switching FET into an organic light emitting diode (OLED) circuit, it demonstrates long-term leakage endurance performance, maintaining an OLED brightness higher than 58% of the initial intensity after 100 s passes since the ON-switching point, which is even superior to the performance of conventional a-IGZO MOSFET switch.     

Breakdown and reliability of p-MOS devices with stacked RPECVD oxide/nitride gate dielectric under constant voltage stress

In this work, the effects of voltage and temperature on the TDDB characteristics of 2.0 nm stacked oxide/nitride (O/N) dielectric, prepared by remote plasma enhanced CVD (RPECVD), has been investigated. The breakdown characteristics and time-to-breakdown (t_BD) are recorded from p⁺-poly/n-Si capacitors under constant voltage stress (CVS) at different temperatures. The t_BD cumulative distributions exhibit a single Weibull slope β of 1.9 for different applied voltages. The charge-to-breakdown (Q_BD) is integrated from the gate current as a function of stress times, and can be used to extract the defect generation rate. The activation energy of 0.39 eV is determined from the Arrhenius law, and the average temperature acceleration factor is about 45 between 25 and 125 °C for a constant gate voltage. The extrapolation of the TDDB lifetime with low percentile failure rate of 0.01% provides a 10-year projection for a total gate area of 0.1 cm² on a chip at 125 °C with the Poisson area-scaling law and a constant voltage acceleration factor of 14.83 V⁻¹. It is projected that the maximum safe operating voltage is 1.9 V for 2.07 nm O/N gate dielectric.     

Breakdown kinetics at nanometer scale of innovative MOS devices by conductive atomic force microscopy

The breakdown (BD) kinetics of dielectrics represent a crucial issue for the reliability of microelectronics devices. In this paper, we report on an innovative and practical approach based on Conductive Atomic Force Microscopy (C-AFM) for the determination of the BD kinetics on a bare insulator surface. This technique has been applied to Pr₂O₃ films grown by Metal-Organic Chemical Vapour Deposition (MOCVD) on Si(0 0 1) and to thermally grown SiO₂ on 4H-SiC substrates. C-AFM clearly visualizes single breakdown spots under constant voltage stresses. The stress time on the C-AFM tip was varied from 1 × 10⁻³ to 1 × 10⁻¹ s. The density of BD spots, upon increasing the stress time, exhibits in both cases an exponential trend. The Weibull slope of the dielectric BD statistics has been determined by direct measurements at nanometer scale on different dielectrics having different physical thicknesses. The comparison of the Weibull slopes obtained for different dielectric thicknesses with literature data points out intrinsic and extrinsic BD events in the SiO₂/SiC system and Pr₂O₃ based layers, respectively. In the case of the SiO₂/SiC system, BD kinetics have been demonstrated to follow the percolation model, while the role of extrinsic phenomena in the BD of Pr₂O₃ films has been proved.