Impact of partial element accuracy on PEEC model stability

This paper details the impact of partial element accuracy on quasi-static partial element equivalent circuit (PEEC) model stability in the time domain. The potential sources of inaccurate partial element values are found to be poor geometrical meshing and the use of unsuitable partial element calculation routines. The impact on PEEC model stability of erroneous partial element values, and the coefficients of potential and partial inductances, are shown as theoretical constraints and practical results. Projection meshing, which is a discretization strategy suitable for the PEEC method, is shown to improve calculated partial element values for the same number of unknowns, thus improving model stability.     

Speeding Up PEEC Partial Inductance Computations Using a QR-Based Algorithm

The partial element equivalent circuit (PEEC) approach has been used in different forms for the computation of equivalent circuit elements for quasi-static and full-wave electromagnetic models. In this paper, we focus on the topic of large scale inductance computations. For many problems as part of PEEC modeling, partial inductances need to be computed to model interactions between a large numbers of objects. These computations can be very time and memory consuming. To date, several techniques have been devised to reduce the memory and time required to compute the partial inductance entities, as well as the time required to use them in a circuit analysis compute step. Some of the existing methods use hierarchical compression while some others are based on issues like properties of the inverse of the partial inductance matrix. However, because of inherent limitations, most of these methods are less suitable for PEEC applications. In this paper, we present an approach which is based on the compression of the partial inductance matrix utilizing the QR decomposition of the far coefficients submatrices. The QR-decomposed form is represented as a compressed SPICE-compatible circuit. This yields an efficient and mathematically consistent approach for reducing the storage and time requirements     

Modelling of Microstrip Circuit Using a Hybrid PEEC/FDTD Approach

Currently available electromagnetic analysis methods are showing their limitations when large complex circuit structures, such as modern printed circuit boards and their environments, need to be analyzed. Two methods which may be used for the purpose are the partial element equivalent circuit (PEEC) approach and the finite-difference time-domain (FDTD) method. Each of these has their own advantages and limitations. In this paper, a hybrid method is described which overcomes many of the limitations of PEEC and FDTD while retaining their strengths. Results using the method for low-pass and bandpass microstrip filters are presented.     

Nonorthogonal PEEC formulation for time- and frequency-domain EM and circuit modeling

Electromagnetic solvers based on the partial element equivalent circuit (PEEC) approach have proven to be well suited for the solution of combined circuit and EM problems. The inclusion of all types of Spice circuit elements is possible. Due to this, the approach has been used in many different tools. Most of these solvers have been based on a rectangular or Manhattan representation of the geometries. In this paper, we systematically extend the PEEC formulation to nonorthogonal geometries since many practical EM problems require a more general formulation. Importantly, the model given in this paper is consistent with the classical PEEC model for rectangular geometries. Some examples illustrating the application of the approach are given for both the time and frequency domain.     

Broadband Macromodels for Retarded Partial Element Equivalent Circuit (rPEEC) Method

The partial element equivalent circuit (PEEC) method is, nowadays, widely used in electromagnetic compatibility and signal integrity problems in both the time and frequency domains. Similar to other integral-equation-based techniques, its time domain implementation may suffer from late time instabilities, especially when considering delays [(Lp,P,R,tau)PEEC] (rPEEC). The cause of the instabilities may be either the numerical technique used for the time integration or problems created by the discrete representation of the electromagnetic continuous problem. In this paper, we concentrate on the latter and show that frequency dispersion plays an important role and must be taken into account in order to preserve accuracy and mitigate instabilities issues. An enhanced formulation of the PEEC method is presented that is based on a more accurate computation of partial elements describing the electric and magnetic field couplings; broadband macromodels are generated incorporating the frequency dependence of such elements, thus, allowing us to obtain better stability properties of the resulting (Lp,P,R,tau)PEEC model. The proposed equivalent circuits resemble those of the standard PEEC formulation but are able to capture the dispersion that, when neglected, might contribute to inaccuracies and late time instabilities     

Analysis of 3-D interconnect structures with PEEC using SPICE

This paper discusses the possibilities of using the circuit simulation program, simulation program with integrated circuit emphasis (SPICE) for the simulation of partial element equivalent circuit (PEEC) models. After an introduction into the PEEC method, the simulation of quasi-stationary models is considered. An enhancement of SPICE is described, allowing the simulation of retarded PEEC models. This enables the computation of electric fields radiated from an interconnection structure. With the modified SPICE simulator it is possible to use existing SPICE models and combine them with full wave PEEC models     

An efficient PEEC algorithm for modeling of LTCC RF circuits with finite metal strip thickness

In this letter, a simple but effective method is introduced to facilitate the partial element equivalent circuit (PEEC) algorithm to model multilayered low-temperature co-fired ceramics (LTCC) embedded RF circuits with finite metal thickness. The method makes use of the quasistatic assumption that charges only reside on the surfaces of a conductor. In the calculation of the coefficient of potential matrix, one thick conductor plate is treated as two inter-connected zero-thickness plates. Recombining the two plates analytically can correctly account for the increase of plate-to-plate capacitance without adding extra elements to the resultant equivalent circuit model. Experimental results have verified the validation of the proposed method.     

Fast multipole and multifunction PEEC methods

A key use of the partial element equivalent circuit (PEEC) method is the solution of combined electromagnetic and circuit problems as they occur in many situations such as today's integrated circuit (VLSI) systems and as components in mobile devices. The method, which has been applied to a multitude of electrical interconnect and package problems, is very flexible since it is easy to add new features to the approach. However, faster solutions are of interest since the problems to be solved are continuously increasing size. A class of fast methods is evolving based on the faster evaluation of the matrix elements and the use of iterative or other matrix solvers of the resultant system for the frequency domain. Fast circuit matrix solvers are easier to obtain in the time domain than the frequency domain since the delay or retardation can be utilized to sparsify the circuit matrix. In this paper, we concentrate on techniques for the fast evaluation of the PEEC circuit element for both the frequency and time domain where possible since both are important for the solution of specific problems.     

Stable and Effective Full-Wave PEEC Models by Full-Spectrum Convolution Macromodeling

A novel technique for time domain partial element equivalent circuits (PEECs) modeling is presented. The PEEC method is a well-known numerical method for creating full-wave models of interconnection structures in the frequency and time domains, which are being used for modeling electromagnetic compatibility (EMC) problems. The time domain solutions by PEEC can show the so-called late-time instabilities. Several attempts to overcome this problem have been made in the literature. The cause for instability has been revealed, and a stable time domain model has been given, however, with a reduced computational efficiency. A stable full-wave PEEC model based on a convolution macromodeling with a faster computation time is developed and tested in this paper     

Inductance extraction for packages with adaptive non-orthogonal ground plane meshing

A method is presented in which a geometry and frequency dependent precalculation of large pin count flat package ground plane currents is performed. We use this precalculation to construct an adaptive nonorthogonal partial element equivalent circuit (PEEC) grid for the correct modeling of the inductance matrix of packages with minimal ground plane discretizations needed. The method is illustrated for a 40-pin flat package. Special attention is given to the convergence and accuracy of the results as a function of the number of PEEC filaments, demonstrating the superiority of the adaptive meshing.     

Stability of full-wave PEEC models: reason for instabilities and approach for correction

The partial element equivalent circuit (PEEC) method is a widespread numerical method for creating full-wave models of interconnection structures in the frequency and time domains for use in modeling EMC problems. The possible instabilities of time domain solutions-so-called late time instabilities-can complicate the use of the method. Several attempts to improve the stability of time domain solutions have been made in the literature. A new mathematically correct approach for analyzing the stability of PEEC circuits is presented in this paper. The reason for instabilities is discovered, and a method for stability improvement is developed and tested.     

PEEC Formulation Based on Dyadic Green's Functions for Layered Media in the Time and Frequency Domains

This paper presents a novel time- and frequency-domain concept of modeling with the partial element equivalent circuit (PEEC) method, which applies the mixed potential integral equation (MPIE) with dyadic Green's functions for layered media (DGFLM-PEEC). On the one hand, it represents an exact full-wave semianalytical solution for an arbitrary configuration of traces and via holes in multilayered printed circuit boards. On the other hand, the DGFLM-PEEC model is represented in a circuit form, and thus, may be included in general-purpose circuit simulators. The paper derives a general DGFLM-PEEC formulation, which may be applied to all types of the MPIE with dyadic Green's functions. Using this concept, a particular type of layered media, namely a lossy dielectric between two grounds (stripline region), is thoroughly investigated and used to set up a particular DGFLM-PEEC model. The closed-form expressions for partial inductances and potential coefficients have been derived for this case. The time- and frequency-domain DGFLM-PEEC models for the stripline region have been validated using the measurements and the simulation by the method of moments.      

高速双面共面结构印刷电路板电特性仿真

为了适应高速双面共面印刷电路板的不规则布线结构,本文采用三维电磁参数提取的部分元等效电路方法对任意形状接地/馈电板进行自动分割及单元建模,然后对包括I/O缓冲器在内的非线性电路进行时域信号响应分析.高速双面共面结构印刷电路板电特性的仿真与实际测试结果吻合较好,表明了方法的有效性.     

A PEEC with a new capacitance model for circuit simulation ofinterconnects and packaging structures

In this paper, a modified partial-element equivalent-circuit (PEEC) model, i.e., (L_p, A&oarr;, R, ϵf)PEEC, is introduced. In such a model, no equivalent circuit, but a set of state equations for the variables representing the function of circuit, are given to model a three-dimensional structure. Unlike the original (L_p, P, R, ϵf) PEEC model, the definition of vector potential A&oarr; with integral form and the Lorentz gauge are used in expanding the basic integral equation instead of the definition of the scalar potential φ with integral form. This can directly lead to the state equations, and the capacitance extraction can be replaced by the calculation of the divergence of A&oarr;, which is analytical. For analysis of most interconnect and packaging problems, generally containing complex dielectric structures, the new model can save a large part of computing time. The validity of the new model is verified by the analysis in time and frequency domain with several examples of typical interconnect and packaging structures, and the results with this new method agree well with those of other papers     

A scaling technique for partial element equivalent circuit analysis using SPICE

A scaling technique for partial element equivalent circuit (PEEC) analysis using SPICE is introduced in this letter. The perturbation series based scaling is applied to the component values extracted by the standard PEEC method to get up to an order of magnitude improvement in relative accuracy of scattering parameters with SPICE simulation. The effectiveness of the technique is verified by using the numerical example of a stripline structure and comparing the results with that of the method of moments (IE3D).     

基于三角面元剖分的全波信号完整性建模方法

推导了一种采用三角面元剖分和RWG(Rao-Wilton-Glisson)基函数的部分元等效电路(PEEC)方法,在此方法中采用了离散复镜像(DCIM)来计算格林函数。对于有拐角的印刷电路板(PCB)走线,同传统PEEC的四边形剖分方法相比,采用RWG基函数定义的三角形剖分方法有更高的计算精度和计算效率;不同于一般的使用准静格林函数的PEEC方法,在高频条件下,采用离散复镜像的PEEC方法的计算结果依然准确,并可以兼容HSPICE仿真信号完整性(SI)问题。给出了联合使用PEEC和HSPICE仿真得到信号眼图的结果,将实际PCB板走线S参数的仿真结果和测量结果进行了对比。实验结果表明:RWG-DCIM-PEEC是一种有效的SI仿真与分析方法。     

Fast multipole method for time domain PEEC analysis

High-speed electronic circuits are becoming more and more important in modern communication systems, thus leading to an increasing interest in printed circuit boards, interconnect, and packaging. Nowadays, full-wave numerical methods are widely used in order to investigate both signal integrity and electromagnetic compatibility issues arising in PCBs design. When broadband information is desired and transient effects dominate, it is more efficient using time domain numerical techniques, which may scale better than corresponding frequency-domain methods. This paper presents the derivation of the time domain partial element equivalent circuit (PEEC) method enhanced by the three-dimensional (3D) fast multipole method (FMM). It is shown that combining the full-wave time domain PEEC method with the FMM allows performing the analysis of electrically large electronic systems, which reduces both memory and CPU-time requirements. Several examples are presented confirming the capability of the proposed approach to provide a significant reduction of the computational complexity associated with the transient analysis of large systems.     

Circuit models for three-dimensional geometries includingdielectrics

The partial element equivalent circuit (PEEC) approach has proved useful for modeling many different electromagnetic problems. The technique can be viewed as an approach for the electrical circuit modeling for arbitrary 3-D geometries. Recently, the authors extended the method to include retardation with the rPEEC models. So far the dielectrics have been taken into account only in an approximate way. In this work, they generalize the technique to include arbitrary homogeneous dielectric regions. The new circuit models are applied in the frequency as well as the time domain. The time solution allows the modeling of VLSI systems which involve interconnects as well as nonlinear transistor circuits     

Quasi-Static Derived Physically Expressive Circuit Model for Lossy Integrated RF Passives

This paper presents a novel approach for deriving a physically meaningful circuit model for integrated RF lossy passives such as spiral inductors on a silicon substrate. The approach starts from a quasi-static partial element equivalent circuit (PEEC) model. The concept of complex inductance and capacitance is introduced to uniformly deal with the conductor and dielectric losses. Basic ${ Y}-Delta$ network transformation is used to “absorb” the insignificant internal nodes of the original PEEC network and to reduce the order of the circuit model. The physically expressive circuit model given here can be very concise while preserving the major physical meanings and attributes of the original circuit layout. A low-temperature co-fired ceramic bandpass filter and two practical inductors fabricated using a 0.18- $mu{hbox {m}}$ CMOS process are studied by the model to demonstrate the validity of this new approach. Furthermore, the stability condition of the model is also discussed.