Analog CMOS design for optical coherence tomography signal detection and processing.

A CMOS circuit was designed and fabricated for optical coherence tomography (OCT) signal detection and processing. The circuit includes a photoreceiver, differential gain stage and lock-in amplifier based demodulator. The photoreceiver consists of a CMOS photodetector and low noise differential transimpedance amplifier which converts the optical interference signal into a voltage. The differential gain stage further amplifies the signal. The in-phase and quadrature channels of the lock-in amplifier each include an analog mixer and switched-capacitor low-pass filter with an external mixer reference signal. The interferogram envelope and phase can be extracted with this configuration, enabling Doppler OCT measurements. A sensitivity of -80 dB is achieved with faithful reproduction of the interferometric signal envelope. A sample image of finger tip is presented.     

Real-time digital signal processing-based optical coherence tomography and Doppler optical coherence tomography

We present the development and use of a real-time digital signal processing (DSP)-based optical coherence tomography (OCT) and Doppler OCT system. Images of microstructure and transient fluid-flow profiles are acquired using the DSP architecture for real-time processing of computationally intensive calculations. This acquisition system is readily configurable for a wide range of real-time signal processing and image processing applications in OCT.     

模拟信号合成电路的改良设计

通过四阶巴特沃斯低通滤波器电路完成方波信号的分频,用放大衰减电路使信号复合方波和三角波合成时的幅值要求,接着经过移相,合成需要的方波。本系统对已有的信号合成电路进行了改良,使波形实际设计结果波形更加接近理论仿真效果。在一定理论仿真的基础上,本设计更过多的从实际调试角度出发研究信号合成电路。     

A CMOS Analog Cell and its applications in analog signal processing

This paper presents a core cell that can be reconfigured and combined with current mirrors to implement exponential, logarithmic, multiplier, divider and raise-to-power function circuits. The proposed circuit uses CMOS transistors operating in the strong inversion. The proposed circuits has been verified with the 0.8?µm CMOS technology by HSPICE simulations. The simulations results confirm the functionality of the proposed circuits. The proposed circuits paves the way for designing analog signal processors.     

Analog phase measuring circuit for digital CMOS ICs

A circuit measuring the phase of incoming asynchronous signals relative to the system clock in digital signal processing is described. The system clock can be in the range from 10 to 20 MHz, as is typical for video signal processing applications. As a reference in the asynchronous signal the positive or negative slope is taken. Its phase is measured with a resolution of 1/32 of a system clock cycle (approximately 1.5 to 3 ns). Pure digital CMOS technology without precision components is used, to enable combined integration on processor chips. Timing precision (jitter) is better than 200 ps without any adjustments. One external capacitor is needed     

增量式光电编码器信号处理电路的设计与实现

实践中经常会遇到将光电编码器的输出信号经一系列处理转化成电压信号的情况。因此,以2RHIB型光电编码器为例,设计了一种集编码器信号接收、光电隔离、鉴相、频率电压转化和电压调整输出功能于一体的综合性电路,并对电路各组成部分作了较为详细的分析和阐述。实践证明,该电路通用性强、操作简单、性能可靠、实用性强。     

一种处理信号相位误差电路的设计

介绍了一种对两种不同相位关系的正弦信号进行相位后比较所产生的直流电压信号进行一定处理,然后用处理过的信号对系统进行控制,将其相位做已校正,文中把电路工作过程、外形设计和加工具体过程做了较仔细的叙述,该系统可工作在较宽的环境范围。同时可以满足于多个领域的使用要求。     

Millimeter-wave CMOS circuit design

We have developed a 27- and 40-GHz tuned amplifier and a 52.5-GHz voltage-controlled oscillator using 0.18-mum CMOS. The line-reflect-line calibrations with a microstrip-line structure, consisting of metal1 and metal6, was quite effective to extract the accurate S-parameters for the intrinsic transistor on an Si substrate and realized the precise design. Using this technique, we obtained a 17-dB gain and 14-dBm output power at 27 GHz for the tuned amplifier. We also obtained a 7-dB gain and a 10.4-dBm output power with a good input and output return loss at 40 GHz. Additionally, we obtained an oscillation frequency of 52.5 GHz with phase noise of -86 dBc/Hz at a 1-MHz offset. These results indicate that our proposed technique is suitable for CMOS millimeter-wave design     

基于医用显微镜的光学相干层析系统设计

设计了以医用显微镜为探头的光学相干层析(OCT)系统,实验结果表明系统纵向分辨率为18μm,横向分辨率小于20μm.通过三维图象重构,获得了霉菌感染裸鼠皮肤结痂部分的三维组织结构,在皮肤科研究具有重要应用价值.     

微弱光信号的光电探测放大电路的设计

分析了微弱光信号放大电路的基本工作原理,针对光电探测中对微弱信号放大带来的信噪比和稳定性问题,设计了一种低噪声光电信号放大电路,并给出了电路参数选择方法。     

CCD相机驱动电路设计和信号处理技术研究

介绍了一种CCD相机前端电路的软硬件设计与实现.对CCD时序驱动电路和信号处理电路进行了分析,对拖影(Smear)处理等难点问题进行了讨论,并介绍了针对Bayer彩色滤波阵列的彩色图像还原方法,给出了处理结果.     

光学相干层析成像技术研究

文章主要阐述了光学相干层析技术作为一种有别于其他层析成像技术的新型技术手段,具有快速、实时、无损等特点。它能利用低相干光的干涉,将带有生物样品信息的相干光进行解调、滤波和放大后成像。文章主要从光学相干层析技术的背景、定义、原理及其在现代医学领域的应用和未来的发展方面进行研究。     

光学相干层析成像技术的应用

介绍了光学相干层析成像技术在不同领域的应用,预言了未来的发展趋势。     

Analog signal processing with microwave magnetics

The main performance advantage that analog signal-processing devices have over their digital competitors is the ability to operate with wide instantaneous bandwidths and moderately high dynamic ranges at microwave frequencies. Here, applications of magnetostatic wave (MSW) devices that capitalize on these advantages are reviewed. The first area is broadband microwave receivers, which includes frequency channelizers, dispersive delay lines for compressive receivers, delay lines for pulse storage, and frequency-selective limiters. The second area is beamsteering of phased-array antennas by variable time delays. In both cases, the MSW device approaches and applications are discussed with emphasis on the device characteristics and their systems utilization. Where possible, comparisons with other analog signal-processing approaches are given     

A CMOS model for computer-aided circuit analysis and design

An equivalent circuit model to simulate the current-voltage behavior of CMOS transistors is discussed. This model can simulate the full range of complementary MOSFET operation and can handle latchup at the circuit analysis level. Using effective injection efficiencies a switching criterion and a method of solution for a four parasitic bipolar transistor system have been developed and incorporated. The configuration of the CMOS device is computed from data submitted by the user. This includes well depth, MOSFET separation, doping levels, minority-carrier lifetime, substrate bypass resistors, the option to float either or both substrates, and bias conditions. The model can be used alone or incorporated into existing computer-aided-design programs for analysis of circuits which contain CMOS components     

A CMOS bandgap reference for differential signal processing

A switched-capacitor fully differential bandgap reference that uses a standard double-poly CMOS process is presented. It generates a differential reference voltage of 6.2 V with a standard deviation of about 24 mV and a typical temperature stability of 15.2 p.p.m./°C over an extended temperature range from -40 to +85°C. These performance results are obtained without using any trimming in mass production. The bandgap reference only occupies 730 mil² and dissipates 4.8 mW at±5-V power supplies. A measured power supply rejection of about 90 dB until 500 kHz is the best ever reported at high frequency