一种低功耗高线性Gm-C滤波器的设计

设计了一种应用于W-CDMA零中频接收机系统的跨导-电容(Gm-C)低通滤波器及其调谐电路。该接收机中的滤波器采用截止频率为2.2 MHz的3阶巴特沃斯滤波器,在10 MHz频率处的阻带衰减达到34 d B。电路采用SMIC 0.18μm CMOS工艺模型,在电源电压为1.8 V时,滤波器的IIP3可达到21.13 d Bm,电路功耗为3.31 m W。同时,该滤波器采用开关电容调谐电路来精确控制滤波器的截止频率,将截止频率的偏差降低到3%以下。     

V／UHF大功率开关滤波器组的设计与实现

机动灵巧的干扰系统要求工作频带宽、体积小、效率高的功放，然而这是以线性度为代价的，结果是带来额外的电磁污染。为有效抑制系统的无用辐射，本文将低通滤波器的设计思路引入到大功率开关滤波器组的设计中来，提出了一种采用无耗网络吸收分布电容的设计方法，并在此基础之上成功实现了30MHz～400MHz 100W的开关滤波器组。     

基于多比特带通△∑调制器的射频数字功放

为提高射频功放的线性和效率,提出了一种基于多比特带通△∑调制器(BPDSM)的射频数字功放结构并给出了BPDSM的设计方法。针对调制器CRFB实现结构中关键路径过长的问题,利用重定时、流水线和超前计算等技术对实现结构进行了改进,将BPDSM的实现速率提高至200 MHz。提出了多电平开关功放的电路结构,将多个具有独立电源的开关功放单元进行串联,实现了对BPDSM输出多比特脉冲信号的高效开关放大。最后,利用FPGA器件及分立元件实现了频率为30 MHz的数字功放,输出功率为10 W时效率达到60%。     

基于锁相环的数字化DC-DC控制器

本文设计了一个为便携设备提供稳定电源的数字化控制、降压型DC-DC控制器.电路基于数字PID控制,分析了传统数字脉冲宽度调制电路(DPWM)存在的问题,设计了基于锁相(PLL) 结构,提高了开关频率的稳定性.电路使用3.3VCMOS工艺设计,开关频率为1MHz,效率最高可达91%.     

S频段500 W高稳相固态功放设计

介绍了一种S频段500 W高稳相固态功放的工程实现。根据实际工程需求,采用4片功率芯片进行大功率合成,在2 025 MHz～2 120 MHz频率范围内实现输出功率大于600 W的固态功率放大器。采用了低附加相移电路设计、微波板材模块化设计、功率回退等措施,实现了在0℃～30℃的环境温度条件下,输出功率在1 W～500 W功率范围内,功放输出端相位变化小于11.5°,满足了厘米级扩频测控系统对S频段固态功放的工程技术要求。     

小功率集成开关稳压器

<正> 本文介绍一种低成本的集成开关稳压器及由其装配的开关武稳压电源.其输出功率为20～90W,整个电源造价只有30元.集成电路W2018采用双列八引线塑封,价格仅4元.这种开关电源效率可达75%～90%,是小功率电源系统中节能的优秀制作品.它可用做视频显示单元、电子游戏机、黑白及彩色电视机、各类高传真放大器及微型计算机等各种用电器具的电源.它的体积小、重量轻、稳压范围宽、没有笨重的工频变压一器,对电网电压波动大的地区尤为适用(输入电压范围可达170～260V).电路组成和工作原理该电路采用脉冲宽度调制式高频变压器降压整流滤波供电方式.电路如图1所示,集成开关稳压器W2018做控制电路用,控制开关功率晶体管的导通和关闭.高频变压器初级线圈串入开关管集电极电路中,通过高频变压器降压,由高频变压器的二次绕组整流、滤波、供给负载稳定的直流电压.     

无线电力传输接收系统RF-DC转换模块的设计

传统桥式全波RF-DC变换电路在设计过程中忽略了二极管导通损耗,从而影响系统效率。采用了E类零电压开关(Zero Voltage Switching,ZVS)RF-DC变换电路,设计了谐振频率为8 MHz,输入功率为1.21 W的无线电力传输系统接收模块。并利用multisim软件进行了仿真。结果表明,该设计方法降低了二极管导通损耗,有效避免了传统桥式全波RF-DC变换电路存在的缺陷,效率可达92%。     

基于单片机的等效采样示波器设计

介绍了基于单片机系统的精密时钟发生电路对高频信号(1MHz～80MHz)进行等效采样的方法,设计并实现一个模拟带宽为1Hz～80MHz的简易数字示波器。     

一种改进的流水线ADC开关电容电路

为降低流水线模数转换器(ADC)中跨导运算放大器(OTA)设计要求,在分析已有开关电容电路(SC)误差消除技术和流水线ADC误差源的基础上,提出一种改进的流水线ADC开关电容电路及与其匹配的OTA设计方案.采用交又差分结构,对虚地电容进行了修正,并将电容失配参数在系统传输函数中消去,使开关电容电路对OTA的增益误差要求降低,并使其瞬态功耗下降.采用CMOS 0.18üm工艺设计了一个分辨率为8位、取样速率200 MHz的ADC作为验证原型,仿真结果表明,该优化结构符合ADC电路高速低功耗要求,可作为信号前端处理模块应用到模数转换电路中.     

基于Boost原理的脉冲超声发射电路设计

设计了基于Boost原理的脉冲超声发射电路,并建立了电路的瞬态响应模型.通过对模型的分析,确立了电路参数选取的依据.该电路5V供电,不需要直流高压模块,可在1～5 MHz换能器两端产生100V以上脉冲电压,功耗低,平均电流为30 mA,通过匝数比为6/15的变压器对电路阻抗进行匹配,提高了带负载能力,电路触发电压脉冲宽...     

多频段功率可控的CMOS开关类功率放大器设计

开关类功率放大器相对于传统的线性功率放大器有更高的效率,其中E类开关功率放大器由于其高效、易于实现等特点被广泛运用,但在低频率时E类功率放大器难以达到足够的输出功率和效率。设计实现的多频段开关功率放大器在高频段（433 MHz）采用E类匹配方式,在较低的频段（315 MHz、230 MHz）采用新颖的方波匹配。在Cadence软件平台下进行仿真及版图绘制,结果显示该多频段开关功率放大器各频段都实现了20 dBm的输出功率,漏极效率均达到40%,同时,通过控制晶体管尺寸,可以对输出功率进行数字控制。     

一种480MHz无线数传模块的设计

针对中国智能电网开放的免费无线计量频段,设计了一种可工作在470 MHz～510 MHz、中心频率为480 MHz、输出功率可调的无线数传模块。模块采用MSP430F2274单片机和射频芯片CC1100E设计,利用EDA软件ADS2008仿真优化了射频电路的输出匹配网络。最后对无线模块输出功率、通信距离等参数进行了测试和验证。     

基于ADS微波功率放大器设计与仿真

为了解决功率放大器设计中输出功率和效率这对矛盾的性能。对参数指标之间如何折衷处理的问题,提出了一种利用负载牵引和源牵引相结合的方法,通过功率放大器输入输出匹配网络的设计中解决矛盾问题,并对一个中心频率2140MHz PA的输出功率、功率附加效率等参数匹配的仿真验证证实方案的可行性,为方便物理实现提供了最终的设计电路。从仿真结果可以得出PA的输出功率和效率都满足设计要求,证明方法能够很好地解决输出功率和效率的折中问题,对PA的设计有着重要的参考价值。     

一种低成本无滤波器D类音频放大器的实现

介绍了一种低成本应用于音频D类放大器,无需外接滤波器,放大器采用全差分电路,利用脉宽调制方法去除了输出滤波器,电路可以工作在2.5V～5V电源电压下,电路采用6V CSMC0.5μm DPTM工艺,利用MATLAB和Hspice工具仿真,放大器接8Ω的负载,电源电压为3.6V,在高保真音频范围内(20Hz～20kHz),转换效率可以达到88%,连续平均功率0.1W时,其THD+N小于0.06%。     

A novel direct matching network synthesis technique and its application to broadband class‐J power amplifier

A novel direct matching network (MN) synthesis method improving the conventional simplified real frequency technique (SRFT) is presented in this article. By straightforwardly optimize the characteristic impedance (physical width) and electrical length (physical length) of each distributed element in a preselected configuration, the proposed method has one more degree of design freedom by comparison with the SRFT, and therefore increases design flexibility and matching effects. To demonstrate its effectiveness, a broadband class‐J power amplifier (PA) is devised for which both the input and output MNs are realized using the proposed method. The simultaneous manipulation of fundamental and second harmonic impedances is successfully realized by defining a novel target function that indicates the degree of proximity for the realized impedances to the optimal transistor impedances. Comprehensive equations and complete design procedures of the new technique are given. The measured class‐J PA implemented for verification achieves an output power of 39.2 to 42.3 dBm and power‐added efficiency of 61.8% to 71.6% over the frequency range of 2.5 to 3.8 GHz using a 10‐W GaN HEMT. A 20‐MHz LTE‐A signal is employed to validate the linearization capability of this class‐J PA. An adjacent channel leakage ratio level around ?43.8 dBc is achieved after utilizing digital predistortion technique.     

磁谐振无线电能传输负载自适应阻抗匹配研究

针对磁谐振无线电能传输(MR-WPT)系统的负载改变时,现有阻抗匹配方法不能自动调节负载阻抗,导致系统电能传输效率降低的问题,提出了一种MR-WPT系统负载自适应阻抗匹配方法。为利用高频化提高MR-WPT系统的电能传输效率,选用E类功率放大器作为高频逆变电路。在磁谐振装置和负载之间加入DC/DC变换器,当负载阻抗变化时,通过调节DC/DC变换器的占空比将负载电阻变换到最大效率传输电阻,从而确保MR-WPT系统始终以最大效率工作。仿真和实验结果表明:所提出的阻抗匹配方法切实可行,能够优化MR-WPT系统的传输效率,输出功率为3.5 W时,传输效率达35%。     

Application of ultra wideband RF energy harvesting by using multisection Wilkinson power combiner

In this study, an ultra‐wide band (UWB) energy harvesting circuit was proposed using the Greinacher rectifier circuit. The circuit was designed with Wilkinson power combiner (WPC) for use at two different radio frequency signal inputs. To enable broadband operation, the multisection Chebyshev impedance matching technique was applied in the branches of the WPC circuit. The center frequency was selected 2.2 GHz in the design. In terms of the parameters of reflection, transmission and isolation, the WPC circuit operates in the 0.4 GHz‐3.4 GHz range and the percentage bandwidth has been calculated as 136%. In the designed Greinacher rectifier circuit, power conversion efficiency (PCE) was analyzed for different input powers. When load resistor selected as R = 1500 Ω, the PCE for the input power of 9 dBm was about 70%. The proposed circuit, where WPC and Greinacher rectifier circuits was used together for energy harvesting; was operated in the frequency ranges BW₁ = 0.4‐0.81 GHz, BW₂ = 1.54‐1.84 GHz, and BW₃ = 2.2 GHz‐2.89 GHz. As a power combining application, dual power inputs were applied to the WPC circuit with frequencies of 540 MHz‐1800 MHz, 540 MHz‐2450 MHz, 540 MHz‐2700 MHz, 800 MHz‐1800 MHz, 800 MHz‐2450 MHz and 800 MHz‐2700 MHz. Eventually, approximately 70.5% PCE and 1.65 V output voltage were obtained.     

Highly efficient switched‐mode transmitter using a current mode class‐D RF amplifier

This article presents a switched‐mode transmitter architecture using a current mode class‐D (CMCD) amplifier. To achieve high average efficiency for a modulated signal the envelope of the complex baseband signal is transformed into pulses such that the CMCD amplifier is operated either at its peak efficiency or completely switched off. The CMCD amplifier has been designed based on single‐tone active harmonic load‐pull measurements to achieve a power‐added efficiency (PAE) of 61.5% with 25 W output power at 900 MHz using LDMOS FETs. Removing the losses of the demodulation filter and of the amplifier a 10% higher efficiency than in an ideal class‐B amplifier can be obtained for burst‐mode operation with a peak‐to‐average power ratio of 10 dB. © 2010 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010.     

Analysis and design of a stacked power amplifier with 196% fractional bandwidth using equivalent circuit model

Stacked structure is a good solution to overcome the low output voltage swing provided by a single device. When several devices are stacked, the bandwidth and output power are multiple times higher. This article analyzes the small‐signal voltage gain of the stacked structure, deriving the gain expression of the high‐frequency model and simplified model. Based on the specific device parameter, the different small‐signal voltage gains between the two models are compared and the designed stacked structure is proved to obtain a flat gain at low frequencies below about 3 GHz. To our best knowledge, this is the first article to analyze the gain flatness of stacked structure with two equivalent circuit models. To verify the stacked theory, a pseudomorphic high‐electron‐mobility transistor（PHEMT） power amplifier (PA) is implemented using 0.25 μm Gallium arsenide (GaAs) technology. The PA achieves an ultra‐high bandwidth of 30 MHz to 3 GHz and a linear gain of 21 dB ± 1.5 dB. At a 16‐V drain bias voltage, a saturated output power of higher than 2 W and a peak power‐added efficiency (PAE) of 44.1% are attained.     

A radio frequency and vibration energy harvesting antenna based on piezoelectric material

This article proposes a novel hybrid energy harvesting antenna that can be used to harvest radio frequency (RF) and vibration energy in ambience. A microstrip antenna is designed on the piezoelectric film with the material of polyvinylidene fluoride (PVDF). Due to the high dielectric constant of PVDF, the antenna size can be reduced efficiently. The shape of designed microstrip antenna is trapezoidal, the final antenna size is reduced to 50 mm × 30 mm × 0.2 mm. To improve the efficiency, the rectifier with matching network is optimized and the modes of the piezoelectric film are analyzed. The experimental results show that the frequency bandwidth of the antenna is 2.1 to 2.5 GHz. For a RF source at distance of 1 m away, with a 0.25 W EIRP 2.4 GHz transmitter, the output power of the antenna can reach 17.2 μW. While under 17 Hz vibration excitation, the output voltage and power can reach 1.44 V and 15.3 μW, respectively.