Effect of double reflection on the forward current-voltage characteristics of a silicon p+-s-n+ epitaxial diode

The behaviour of both majority and minority carriers in a p⁺-s-n⁺ epitaxial diode (where s may be p or n) has been investigated in this paper. Forward current-voltage characteristics of the diodes are obtained by exact numerical analysis, taking into account the effects of energy-gap narrowing, Auger recombination and carrier-carrier scattering. As with previous authors, it is found that the forward current increases with increasing middle layer thickness. The present analysis shows that such increase occurs only upto a specific applied bias, after which the forward current decreases with increasing middle layer thickness. This behaviour is attributed to double reflection, i.e. the reflection of both majority and minority carriers by the p-n junction and high-low junction respectively. Beyond the specific bias so determined, junction reflection loses its effectiveness. Distribution of carrier concentration and junction voltages for several device configurations are given to illustrate these features. The majority carrier reflection by the p-n junction is found to have a dominating effect in all cases.     

Theory of switching in p-n-insulator (tunnel)-metal devices: Part I: Punchthrough mode

The four-layered structure (M-I(leaky)-n-p⁺) is found to exhibit a current-controlled negative resistance region in its I-V characteristics. In this paper, a quantitative physical model of the device in the punch-through mode is presented. The negative resistance behaviour is due to a positive feedback mechanism between the tunnel MIS and the n-p⁺ junction parts of the device. The effect of the device parameters on its I-V characteristics is studied.     

On the forward current-voltage characteristics of p+-n-n+ (n+-p-p+) epitaxial diodes

The forward-biased current-voltage characteristics of p⁺-n-n⁺ and n⁺-p-p⁺ epitaxial diodes are derived theoretically. Effects of the energy-gap shrinkage, the high-low junction built-in voltage, the high-level injection, and the minority-carrier life time on the forward-biased current-voltage characteristics are included. Good agreements between the theoretically derived results and the experimental data of Dutton et al. are obtained. The developed theory predicts that the leakage of the high-low junction is dominated by the recombination of minority carriers in the highly doped substrate, not by the recombination of minority carriers in the high-low space charge region, which is opposite to the previous prediction of Dutton et al.     

Silicon p−n insulator-metal (p-n-I-M) devices

Silicon p-n-I-M devices with thin insulating layers ($\text{thicknesses}\text{? 30}\text{A}\text{?}$), named MTIS devices, have been developed. The two terminal device shows an S-shaped negative resistance characteristics similar to a Schockley diode (or p-n-p-n diode). Typically the threshold and sustaining voltages are 10 ～ 15 and 1.3 ～ 2 volts, respectively. The former however can be controlled by optical illumination. Turn-on time including delay is less than 2 nsec and turn-off time ? 1 nsec or less. A thyristor-like device with its third terminal connected to the n-layer shows switching operation controllable by this terminal. A monolithic linear array of p-n-I-M diodes with 30 μm spacing operates as a shift register through coupling of adjacent diodes. Life of the two terminal devices recorded at present is over 1.5 × 10⁴ hr. These devices can be applied to low power and high-speed electrical switching and also to optical switching and integrated logic circuits.     

An isolated Al-poly Si-(p)Si-(n+)Si switching device

A new MISS switching device structure was designed and fabricated, which consists of Al/poly Si/p/n⁺/p-Si layers and is isolated by diffusing n-well to the buried n⁺ layer.The switching voltage increases with increasing junction area of the poly-Si junction and the n⁺p junction, due to surface recombination current in the emitter-base junction, respectively. The holding voltage is kept nearly constant of 0.9 V for the 886 Å poly Si devices.     

p+-n--n+-type power diode with crystalline/nanocrystalline Si mosaic electrodes

Using p⁺-type crystalline Si with n⁺-type nanocrystalline Si (nc-Si) and n⁺-type crystalline Si with p⁺-type nc-Si mosaic structures as electrodes, a type of power diode was prepared with epitaxial technique and plasma-enhanced chemical vapor deposition (PECVD) method. Firstly, the basic p⁺-n^--n⁺-type Si diode was fabricated by epitaxially growing p⁺- and n⁺-type layers on two sides of a lightly doped n^--type Si wafer respectively. Secondly, heavily phosphorus-doped Si film was deposited with PECVD on the lithography mask etched p⁺-type Si side of the basic device to form a component with mosaic anode. Thirdly, heavily boron-doped Si film was deposited on the etched n⁺-type Si side of the second device to form a diode with mosaic anode and mosaic cathode. The images of high resolution transmission electronic microscope and patterns of X-ray diffraction reveal nanocrystallization in the phosphorus- and boron-deposited films. Electrical measurements such as capacitance-voltage relation, current-voltage feature and reverse recovery waveform were carried out to clarify the performance of prepared devices. The important roles of (n^-)Si/(p⁺)nc-Si and (n^-)Si/(n⁺)nc-Si junctions in the static and dynamic conduction processes in operating diodes were investigated. The performance of mosaic devices was compared to that of a basic one.     

Voltage dependence of the differential capacitance of a p +-n junction

The dependences of the differential capacitance and current of a p ⁺-n junction with a uniformly doped n region on the voltage in the junction region are calculated. The p ⁺-n junction capacitance controls the charge change in the junction region taking into account a change in the electric field of the quasi-neutral n region and a change in its bipolar drift mobility with increasing excess charge-carrier concentration. It is shown that the change in the sign of the p ⁺-n junction capacitance with increasing injection level is caused by a decrease in the bipolar drift mobility as the electron-hole pair concentration in the n region increases. It is shown that the p ⁺-n junction capacitance decreases with increasing reverse voltage and tends to a constant positive value.     

Characteristics of metal/tunnel-oxide/n/p+ silicon switching devices—II: Two-dimensional effects in oxide-isolated structures

Effects of oxide isolation on the two-terminal D.C. characteristics of metal/tunnel-oxide/n/p⁺ silicon switching devices have been studied.Recent experimental results have shown that the switching characteristics are strongly dependent on area, and area-to-perimeter ratio of the device. To carry out a systematic investigation of this phenomenon, the devices in this study were isolated using V-grooves of various areas. For a given tunnel-oxide thickness and area, it was found that the magnitude of the switching voltage and holding current of the device increased with isolation area, whereas the switching current remained essentially constant. Furthermore, it is shown that the switching current is almost completely determined by the characteristics of the tunnel-oxide; in particular, the minority carrier concentration at the SiSiO₂ interface. Physical arguments are presented which adequately explain the observed trends. It is also experimentally shown that both switching current and holding current decrease as the tunnel-oxide thickness is increased.A simple two-dimensional model for the oxide-isolated MISS device is derived which effectively explains the above area-related phenomena. In agreement with experimental results, the model predicts that for a given tunnel-oxide thickness and area, an increase in switching voltage magnitude and holding current will result as the isolated p⁺-n junction area is increased. Calculations based on this model are shown to be in good agreement with experimental data.     

The influence of illumination on the majority-carrier quasi-fermi-level in the Schottky-barrier diode

We present an analysis of the behaviour under illumination, of a Schottky-barrier diode. It is shown that significant changes in the position of the majority-carrier quasi-fermi level may occur in the space-charge region. Such changes enhance the forward current of the Schottky-diode, and so degrade the cell output. Further bias dependent effects may arise when bulk recombination in the neutral regions, or minority carrier leakage, across the n-n⁺ episubstrate interface occurs. Recent published data on gold-silicon devices is used to compare predicted and experimental results. Good agreement in both qualitative and quantitative behaviour is found.     

Numerical analysis on abnormal thyristor forward voltage increase due to heavy doping in gated p-base layer

An abnormal forward voltage increase was observed for a p-base gated double diffused n⁺pn^?p⁺ high power thyristor with high impurity concentration at the n⁺-p emitter-base junction. Accurate numerical analysis shows that heavy doping effects are the most responsible mechanism for the abnormality and that depletion layer formation at the center junction accompanies it.It will be shown that appropriate control of the impurity concentration at the emitter-base junction is necessary to avoid this abnormality by realizing the common base transistor current gain of greater than 0.73 for n⁺n^?-portion.     

MBE-grown HgCdTe multi-layer heterojunction structures for high speed low-noise 1.3–1.6 µm avalanche photodetectors

HgCdTe is an attractive material for room-temperature avalanche photodetectors (APDs) operated at 1.3–1.6 μm wavelengths for fiber optical communication applications because of its bandgap tunability and the resonant enhancement of hole impact ionization for CdTe fractions near 0.73. The HgCdTe based separate absorption and multiplication avalanche photodetector is designed and fabricated for backside illumination through a CdZnTe substrate. The multi-layer device structure is comprised of seven layers including 1). n ⁺ contact 2). n ⁻ diffusion buffer 3). n ⁻ absorber 4). n charge sheet 5). n ⁻ avalanche gain 6). p to form junction, and 7).p ⁺ contact. Several wafers were processed into 45 μm × 45 μm and 100 (μm × 100 μm devices. The mean value of avalanche voltage is 63.7 V measured at room temperature. At 1 GHz, the device shows a gain of about 7 for a gain-bandwidth product of 7 GHz. This first demonstration of an all molecular beam epitaxially grown HgCdTe multi-layer heterojunction structure on CdZnTe substrates represents a significant advance toward the goal of producing reliable room temperature HgCdTe high speed, low noise avalanche photodetectors.     

Law of the junction for degenerate material with position-dependent band gap and electron affinity

The general density-voltage relations at the boundaries of the space-charge region of a degenerate n⁺-p junction with position-dependent band structure are derived. The results are valid for a variety of materials including graded composition semiconductors, heterojunctions, and devices with high doping.The following special cases of interest are considered: nondegenerate limit, rigid band model, uniform band structure and the classical case. The effect of carrier degeneracy in materials with parabolic uniform band structure is discussed in detail. In this case, for most junction voltages, a linear relationship is shown to exist between the actual minority carrier density and the values predicted by the classical theory. There is a significant departure from classical results. A plot for a correction factor as a function of doping is also given.     

Junction potentials of strongly illuminated n+ - p - p+ solar cells

The low-junction (LHJ) model is applied to an n⁺ - p - p⁺ solar cell having finite dimensions, in order to investigate its performance under intense illumination. Ambipolar transport equations are solved in the three sections of the cell using appropriate boundary conditions. Expressions for junction currents are derived, and the junction potentials under open-circuit conditions are computed by the Newton-Raphson method.The theory presented here includes the effects of high level injection. The generalized current density equations which are derived here for an n⁺ - p - p⁺ device are shown to reduce to the ideal Shockley diode equation with appropriate modifications. The effects of p - p⁺ low-high junction on the open-circuit voltage of the cell are explained. The theoretical results of this paper are consistent with the experimental results of others.     

Characteristics of three-terminal metal-tunnel if oxide-n/p+ devices

The device described here comprises a p⁺ substrate containing an epitaxial n-layer, on the surface of which is grown a thin (～50 Å) tunnel oxide. A metal cathode is deposited on the oxide surface, and a metal anode on the back side of the p⁺ substrate. A third terminal, the gate electrode, is connected to the n epilayer to provide for biasing the n-p⁺ junction.The I-V characteristic exhibit two stable states: a high-impedance state and a low-impedance state which are separated by a negative-resistance region. The high-impedance state is stable for applied voltages up to the intrinsic threshold voltage, V_s. When the switching voltage is exceeded, the device switches rapidly to the low-impendance state, which is characterized by a current that increases with little increase in the voltage across the device.The switching voltage may be reduced below V_s by current or voltage biasing of the n-p⁺ junction by means of the gate electrode. Gate efficiencies, the ratio of the change in switching voltage with d.c. gate voltage or current, of 10 V/V and 1.0 V/μA have been observed. Pulsed gate measurements are also presented, and it found that for pulse widths down to 0.1 μs the gate switching characteristics follow the d.c. characteristics. For pulse widths less than 0.1 μs the gate efficiencies are degraded. Suggestions for improving the device characteristics and the turn-on and turn-off time of the device and device reliability are discussed.     

Spectral response of an injection-mode infrared detector

Large injection pulses are observed in simple circuits containing forward-biased silicon p-i-n (p⁺-n-n⁺) structures at liquid helium temperatures. The pulse rate is dependent on the intensity of infrared radiation incident on the device. The substantial voltage, current, and power output eliminates the need for on-chip or off-chip amplifiers. The first observation of the spectral response of such a detector as measured from 22 to 32 μm with a liquid-helium-cooled monochromator is reported. The response is similar to other extrinsic detectors and modulated by a multiple internal reflection interference pattern. The interference pattern and the origin of optical absorption are analyzed.     

Profiling the boron distribution in asymmetric n +-p silicon photodiodes and a new concept for creating selectively sensitive photocells for megapixel color-image receivers

The spectral photosensitivity of n ⁺-p silicon photodiodes with a p ⁺ layer implanted in the substrate is studied experimentally. It is demonstrated that such p ⁺ doping effectively shifts the long-wavelength edge of the photosensitivity in the optical spectral range and the shift depends on the depth of the p ⁺ layer. A new concept for creating selectively sensitive photocells for megapixel color-image receivers is proposed. The receivers are based on n ⁺-p photodiode structures containing a few layers that are implanted at different depths and form desired color-separating potential barriers and lateral diffusion channels for collection of the minority carriers generated by photons of different colors.     

Negative capacitance (impedance of the inductive type) of silicon p +-n junctions irradiated with fast electrons

Silicon p ⁺-n junction diodes irradiated with 3.5-MeV electrons (with the dose of 4 × 10¹⁶ cm^?2) are studied. The diodes’ inductance (L) was measured at a frequency f = 1 MHz with the amplitude of alternating current equal to 0.25 mA. Simultaneously with measurements of L at alternating current, a direct current was passed through the forward-biased diode, which brought about the injection of minority charge carriers into the base. In order to identify both of the mechanisms that give rise to the inductive-type impedance in irradiated diodes with the p ⁺-n junction and the main radiation defects that are directly involved in the formation of this impedance, irradiated samples were annealed isochronously in the temperature range T _a = 225–375°C with sub-sequent study of the main characteristics of the defects by deep-level transient spectroscopy. It is shown that the inductive-type impedance in irradiated diodes is caused by the processes of capture and retention of charge carriers injected into the base at the trapping centers for a time ～1/2f, i.e., for a half-period of oscillations. It is also shown that the trapping centers are the vacancy-oxygen complexes introduced by irradiation with electrons.     

High-voltage planar junction with a field-limiting ring

A twodimensional Poisson equation is solved as part of a program to improve breakdown characteristics of a planar p-n junction by using a field limiting ring. The influences of n^? concentration and n^? layer width of p⁺-n^?-n⁺ diode are investigated. Higher n^? concentration and smaller n^? width make optimum distance between anode and field limiting ring smaller. Breakdown voltages predicted by optimising method reported agree well with the experimental results.     

Impact ionization wave breakdown of drift step recovery diodes

High frequency IMPATT oscillations followed under certain conditions by reversible impact ionization wave breakdown of the p ⁺-n-n ⁺ diode structure have been experimentally observed for the first time in a drift step recovery diode operating in the avalanche breakdown mode after a fast voltage restoration of the p-n junction.     

Equivalent circuits for transients in p-n junctions and solar cells with their application to methods for minority carrier life-time measurements

Equivalent circuits corresponding to series solutions obtainable under various operating conditions of p-n junctions and solar cells are given. These circuits are directly applicable to the small signal impedance measurements. The transient behaviour of the p-n junction devices during minority carrier lifetime determination experiments has also been explained successfully with the help of these circuits. This provides a better insight towards the physical processes involved in these methods and interpretation of the various experimental results becomes easier.