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1.
In this paper, we will demonstrate the effect of recombination current on the electrical properties of heterostructure-emitter bipolar transistors (HEBTs). For comparison, an AlGaAs/GaAs and an AlInAs/GaInAs HEBT are fabricated with the same layer structure. The theoretical analysis shows that the neutral-emitter recombination current in the neutral emitter regime is a significant factor for determining transistor characteristics. For the AlGaAs/GaAs HEBT, the hole diffusion length is larger than the emitter thickness, so that most of holes can be reflected back at the confinement layer due to the hole recombination current being low in the neuter-emitter region. Thus, the high emitter injection efficiency and current gain can be achieved simultaneously. On the other hand, for the AlInAs/GaInAs HEBT, the increase of recombination current at neutral emitter regime and the existence of potential spike could reduce the emitter injection efficiency at large VBE voltage. Hence, the non-1KT component of collector current is enhanced and the characteristics of transistor are degraded. However, a lower offset voltage of 40 mV is obtained attributed to the low base surface recombination current for the AlInAs/GaInAs HEBT. All of these experimental results are consistent with the theoretical analysis.  相似文献   

2.
The bulk and surface recombination currents of the E-B space-charge layer are related through a factor XFShaving the dimensions of length. The factor XFScan be determined experimentally and is an essential parameter for modeling hFEfall-off at low collector currents.  相似文献   

3.
《Solid-state electronics》1987,30(7):723-728
An accurate analytic evaluation of emitter injection into an arbitrarily doped emitter (including a polysilicon-contacted emitter) is presented taking into account position-dependent quantities such as bandgap narrowing, Auger recombination and mobility. Two newly defined dimensionless parameters are introduced that are very useful for emitter design. These parameters are proposed to replace the conventional emitter Gummel number which becomes less useful when appreciable recombination takes place in the emitter. Universal emitter design curves are presented for devices made in silicon, GaAs and InGaAsP or in any other semiconductor for which a newly introduced lifetime model holds good. Numerical simulations show the accuracy and usefulness of the analytical model developed.  相似文献   

4.
A new and direct method is proposed to determine intrinsic (C/sub /spl mu//) and extrinsic (C/sub /spl mu/x/) base-collector junction capacitances of bipolar junction transistors (BJTs). The voltage dependent curves of C/sub /spl mu// and C/sub /spl mu/x/ are obtained by using a new Y-parameter equation that is derived from a simplified "cut-off mode" equivalent circuit including ac current crowding capacitance. This new method is superior to several conventional ones, because it remains valid when there is ac emitter current crowding. The superiority of the new method has been verified by observing much better agreement of modeled gain with measured ones than the conventional method.  相似文献   

5.
A simple measurement method to determine the intrinsic and peripheral emitter junction capacitances is described. The method is based on measurements of BJT's with different emitter geometries and is demonstrated on transistors of an advanced BiCMOS technology. The method can be applied directly to standard deep-submicrometer devices. No special test devices are required. By determining peripheral capacitance for different processes, the method enables the examination of process schemes designed to suppress the effect of the peripheral emitter on the transistor action. The method also provides a useful approach to monitor the scaling behavior of the intrinsic and peripheral capacitances. Results indicate the peripheral capacitance starts dominating the total capacitance as the emitter is scaled into the submicrometer range. For devices with quarter micron emitter widths, the peripheral capacitance is found to be 3 to 4 times higher than the intrinsic capacitance, and puts a fundamental limitation on device design  相似文献   

6.
A complete method for parameter extraction from small-signal measurements of InP-based heterojunction bipolar transistors (HBT's) is presented. Employing analytically derived equations, a numerical solution is sought for the best fit between the model and the measured data. Through parasitics extraction and an optimization process, a realistic model for a self-aligned HBT technology is obtained. The results of the generated s-parameters from the model for a 2×10 μm2 emitter area device are presented over a frequency range of 250 MHz-36 GHz with excellent agreement to the measured data  相似文献   

7.
8.
In this paper, we present a physics-based model for the non punch-through (NPT) insulated gate bipolar transistor (IGBT) during transient turn off period. The steady state part of the model is derived from the solution of the ambipolar diffusion equation in the drift region of the NPT IGBT. The transient component of the model is based on the availability of a newly developed expression for the excess carrier concentration in the base. The transient voltage and current are obtained both numerically and analytically from this model. The theoretical predictions of both approaches are compared with experimental data and found to be in good agreement.  相似文献   

9.
Considering the small warping parabolic heavy hole model with the quasi-elastic approximation in acoustic phonon scattering, it is shown that the hole scattering length is independent of the hole energy. This result now makes it possible to solve the Boltzmann transport equation to obtain a simple analytical solution for the ballistic hole transport in a thin and uniformly doped base of a pnp transistor  相似文献   

10.
Detailed measurements have been made of the base and collector-current characteristics of both n-p-n and p-n-p silicon transistors as a function of temperature. The collector current shows ideal behavior over the temperature range -60 to 150°C in thatI_{C} infin exp (eV_{BE}/kT). On the other hand, the base current is nonideal:I_{B} infin exp (eV_{BE}/nkT), wheren > 1.0. The nonideality of IBis the main source of the temperature dependence ofh_{FE} = I_{C}/I_{B}. There is no evidence for bandgap narrowing in the devices we have investigated. The temperature dependence of the collector current is given byI_{C} infin T_{m} exp (-e E_{g0}/kT) exp (eV_{BE}/kT), wherem = 1.4or 1.7 for n-p-n or p-n-p devices, respectively.E_{g0} = 1.19 pm 0.01eV. This result is consistent with the findings of others. The base current is a complicated function of temperature due to the presence of nonideal components.  相似文献   

11.
A simple electrical method of measuring the emitter depth of bipolar transistors is presented, and is validated by comparison with SIMS profiles. Good agreement is obtained with the SIMS technique for emitter depths of >1000 AA, but for shallower emitters the electrical method is shown to be more accurate.<>  相似文献   

12.
The authors report a physical analysis of nonideal base currents in advanced self-aligned etched-polysilicon emitter bipolar transistors. By studying the dependence of the leakage currents on bias voltage, temperature, device geometry, and process parameters, the authors identify the nature of these currents and isolate the main critical fabrication steps. The abnormal base current at forward bias is found to be a generation-recombination current involving defects along the spacer oxides. These defects also control the reverse base characteristics through a trap-assisted tunneling current mechanism. A simple modification of the spacer structure is shown to result in high-performance emitter/base junction properties  相似文献   

13.
The effect of injection from the emitter periphery into the base of a double diffused bipolar transistor is studied using the variable boundary regional approach and representing minority carrier current as the sum of radial currents using the cylindrical approximation. The results are combined with those for the active base region (i.e. under the emitter). It is shown that improvement in the prediction of hFEand fTversus Icis obtained by inclusion of the charge and current in the peripheral base region. The method used has the advantage of 1) fast computer time and 2) separation of active and peripheral base region and provides a useful tool to improve the precision when designing devices from fabrication data.  相似文献   

14.
Two InGaP/GaAs resonant tunneling bipolar transistors (RTBTs) with different superlattice (SL) structures in the emitters are fabricated and studied. The uniform and modulated widths of barriers are respectively utilized in the specific SL structures. Based on the calculations, the ground state and first excited state minibands are estimated from the transmission probability. The electron transport of RT through SL structures is significantly determined by the electric field behaviors across the barriers. Experimentally, the excellent transistor characteristics including the small saturation voltage, small offset voltage and high breakdown voltages are obtained due to the insertion of δ-doping sheet at the base-collector (B-C) heterointerface. Furthermore, at higher current regimes, the double- and quaternary-negative difference resistance (NDR) phenomena are observed in agreement with the theoretical prediction at 300 K  相似文献   

15.
An n-channel vertical insulated-gate bipolar transistor (IGBT) process which implements a self-aligned p+ short inside the DMOS diffusion windows is proposed and demonstrated experimentally. The salient feature of the new process is the placement of a poly-Si plug to define the diffusion window of the p+ short. Similar forward conduction characteristics and tradeoffs with turn-off time were obtained for these self-aligned short IGBTs when compared to conventional IGBTs with non-self-aligned shorts. With a resistive load and no external gate resistor, dynamic latching current was seen to increase with increasing p+ diffusion depth and electron irradiation dosage, as well as with larger p+ diffusion windows  相似文献   

16.
A new method to determine the base resistance of bipolar transistors under forward-bias conditions is presented. Using special transistor structures, the total base resistance has been directly measured and then separated into its components, the external and internal base resistances. The sheet resistance for the internal base region can be estimated for a base-emitter voltage range of practical interest. An accurate estimation of the base resistance of advanced bipolar transistors under high-forward-bias conditions is demonstrated  相似文献   

17.
A method of bipolar transistor field factor measurement is described. The method is based on the measurement of the open-circuit voltage between the collector-base terminals when a forward bias voltage is applied across the emitter-base terminals. The theory and the experimental measurement on different transistor types are presented.  相似文献   

18.
The results of an investigation concerning the implementation of the two-interdigitation-level (TIL) concept in TO-3-packaged, triple-diffused bipolar power n-p-n transistors with lightly doped collector are discussed. It is demonstrated that the TIL concept, which offers a fair balance between manufacturability ease/cost effectiveness and overall electrical performances, allows for an increase of both the DC and small-signal current gains and the voltage ratings of bipolar transistors. The peculiarities of the ON-state current carrying mechanism in TIL-type transistors was investigated and its impact on device behavior was also assessed  相似文献   

19.
A new method for measurement of ultra-low gate currents in MOS transistors is presented. It is based on a novel coupled floating-gate transistor (CFGT) structure, which enables a clear distinction between threshold voltage shifts due to charge accumulated in the floating gate, and shifts due to device degradation. This advantage gives the new method a demonstrated sensitivity of 10-19A. In addition, with this structure it becomes possible to measure the relation between device degradation and the actual amount of charge injected to the gate. The method is demonstrated by measurements of hole and electron currents in NMOSFET's.  相似文献   

20.
Knott  K.F. 《Electronics letters》1970,6(25):825-826
Using arguments based on the d.c. equivalent circuit of a planar bipolar transistor, it is shown that the ratio ICEO/ICBO is a measure of the significance of surface recombination current. Measurements of 1/f noise and ICEO/ICBO for a variety of transistors provide new evidence that the 1/f noise is due to the surface recombination current.  相似文献   

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