Switching behaviour of MISS diodes

A physical picture of the switching behaviour of MISS diodes is presented considering three phases of the turn-on process: a capacitive current rise time, an inversion charge delay time and a feedback regeneration time. Approximate calculations are derived based on the outlined physical picture and compared to the experimental results obtained in pulse experiments with polysilicon MISS diodes. A dynamic current-voltage characteristic is also presented which differs from the known static one.     

Resonant tunnel switching in MISS devices

The excess current experimentally observed in the Metal-Thin SiO₂ layer (n or p) Si(p⁺ or n⁺) (MISS) structures cannot be explained by any of the existing models based on a direct tunneling conduction through the insulator. In this paper we consider the existence of traps in the SiO₂ gap which support resonant tunneling conduction through the insulator. This allows to fit the experimental I-V characteristic of our structures with a reasonable agreement. The switching point dependences on the structure parameters are shown.     

SOI-CMOS devices on beam-recrystallized polysilicon

Control of the grain boundary direction in the recrystallized polycrystalline silicon (polysilicon) island is achieved by the direction of the laser scanning. By using this technique, the source-to-drain short in a short-channel MOSFET is almost eliminated, and MOSFETs with channel lengths of 2–3 μm level in both n-channel and p-channel mode are fabricated with a good uniformity and reproducibility.The low-field electron and hole mobilities are 580 cm²/Vsec and 220 cm²/Vsec, respectively.19-stage CMOS ring oscillators with nominal channel lengths of 3μm are fabricated. The minimum propagation delay is 280 psec/stage at a supply voltage of 10 V, and the minimum power delay product is 0.13 pJ/stage.     

Characterization of the switching in tunnel MISS devices

The observed bistable characteristics of metal-insulator-silicon switch (MISS) devices with moderate epi-layer doping levels are proven to be controlled by trap assisted tunneling. The switching current and the switching voltage are shown to depend on the reverse saturation current of the MIS substructure and on fabrication parameters (insulator thickness and epi-layer doping level). A method to obtain the metal-semiconductor barrier height, the injection factor at the interface and the trap density in the insulator is presented. The results have been applied to characterize AlSiO₂Si(n)Si(p⁺) structu in which the switching point and the reverse saturation current have been measured. The observed dispersion in the values of the current can be explained by assuming a unique value of the barrier height and the trap density for all devices, allowing the values of the tunneling damping factors to be different from those obtained in the two-band model, which validity is also discussed.     

Modified theory of MISS,MIST and OMIST devices

The theory of MISS, MIST and OMIST devices are modified in order to get better fit with experimental data. Taking into account the generation current in the surface depletion layer and the voltage dependence of the neutral part of the base, the effect of temperature upon the threshold voltage is calculated explaining both a weak increasing and a strong decreasing dependence of it. Surface states, inhomogeneous tunnel oxide thickness and two-dimensional effects are also taken into account, resulting is significantly increased holding currents and decreased sensitivity of the device to gate currents.     

A proposed model of MISS composed of two active devices

A model is proposed for MISS operation which explains the discrepancies in threshold voltage, switching current and the physical mechanism reported previously. A complete physical picture of the current-voltage characteristics of the device is given considering the coupled action of two devices; a bipolar transistor with open base and an amplifying MIS structure in non-equilibrium. An approximate value for holding voltage is given. Some experimental results supporting the suggested physical picture are reported showing the charge-storage effect anticipated by this model and a capacitive-current behaviour evidencing the existence of an internal positive feedback in the device.     

Switching characteristics of multigrain (polycrystalline silicon)barrier devices

The reversible I-V characteristics of poly-Si barrier switches are investigated. A modified analysis is presented to study the two existing threshold modes of operation; namely, the pre-punchthrough mode and the post-punchthrough mode. A gated multigrain barrier switch is also proposed. The relationship between the polysilicon layer parameters and the switching characteristics is investigated. Effects of the recombination-generation mechanism and carrier injection are included in the theory. A comparison between theoretical and available experimental results is also presented     

Analysis of minority-carrier transport in polysilicon devices

Key assumptions are made, with justification, to simplify the three-dimensional, nonlinear boundary-value problem that defines minority-carrier transport, including recombination, in polysilicon devices. These assumptions enable the separation of the grain-boundary recombination analysis, which is based on quasi-equilibrium in the space-charge region, from the intragrain transport analysis, which is done by partitioning the grain into subregions in which the minority-carrier flow is predominantly one-dimensional. The analyses are coupled through the effective minority-carrier recombination velocity at the grain boundary, which generally is dependent on the minority-carrier density in the quasi-neutral grain. Limitations of the model implied by the quasi-equilibrium assumption are effectively removed by recognizing that when conditions obtain that negate quasi-equilibrium, the effective recombination velocity is fixed at the minority-carrier kinetic-limit velocity. The model development is facilitated by computer-aided numerical analysis of the grain-boundary recombination and is supported by qualitative discussion of the underlying physics.     

Control of boron diffusion in polysilicon for constructing overlapping polysilicon gate charge-coupled devices

The diffusion coefficient of boron having values significantly different in silicon and silicon dioxide has been used to control the doping of boron impurity in intrinsic polysilicon deposited over the gate oxide. The method reduces the possibility of doping gate oxide while diffusing boron in polysilicon. Using the method, silicon gate p-MOSFETS and twenty bit photo-sensor, four phase, double overlapping polysilicon gate surface channel charge-coupled devices have been constructed with a transfer efficiency of 0.9990. The measured values of the threshold voltage of MOSFETS are in close agreement with their corresponding calculated values.     

Switching in amorphous devices

Electrical switching of a kind can be observed in a great variety of materials in many different forms and structures. Much the most reproducible switching is observed, however, in small and geometrically well-defined devices fabricated from thin films of certain amorphous semiconductors. This paper is concerned with such devices. The general features of electrical switching are first reviewed, followed by a more detailed account of recent work in the authors' own laboratories on digital and analogue switching in hydrogenated amorphous silicon.     

Modeling of laser-annealed polysilicon TFT characteristics

A model based on two-dimensional (2-D) simulation, for a polysilicon thin-film transistor (poly-Si TFT) with large grains, fabricated in laser recrystallized material, is presented. The importance of differentiating between the density of states of traps within grains and traps localized at grain boundaries is demonstrated. It is shown that the observed lack of saturation in the TFT output characteristics arises due to the effect of high interface trap density within the grain boundaries, whereas the subthreshold slope has a strong dependence on the trap density within the grains. Only by differentiating in this way between grain and grain boundary parameters can both output and subthreshold characteristics of an n-channel poly-Si TFT be accurately modeled using the same set of parameters. Appropriate values for the density of states in both grains and grain boundaries are suggested for laser-annealed TFTs     

Switching properties of bulk-effect digital devices

The required trigger-pulse width and height for triggering a dipole domain in n-GaAs bulk devices were obtained analytically. Further switching properties of the three-terminal Gunn-effect digital devices have been made clear experimentally.     

Improvement of polysilicon oxide characteristics by fluorineincorporation

The effect of fluorine on the polysilicon oxide (polyoxide) characteristics is investigated. It is found that the polyoxide leakage current and breakdown strength are improved as fluorine is incorporated into the oxide film. Experimental results show that the improvement is believed to be due to the oxide stress relaxation rather than the change of the polyoxide/polysilicon interface texture     

Low-resistance polysilicon process in contact application for high density devices

For the lowest resistance, it is required to have the epitaxial silicon contact between the silicon plug and the substrate and good step coverage at the high aspect-ratio contact holes, simultaneously. In this work, a double polysilicon (DPS) deposition technique was proposed for the requirements. The first, thin silicon layer is deposited in a single-wafer process chamber with an in-situ H₂-RTP (rapid thermal process) treatment for the epitaxial contact, and the second silicon layer is formed in a batch-type furnace for good step coverage. From chain resistance, Kelvin R_c, and current-voltage (I–V) measurement, the DPS process meets both low resistance and good uniformity, so that it suggests a breakthrough in the small-sized, semiconductor device application.     

Switching mechanism in thin-oxide MNOS devices

The results of pulsed switching experiments and the dcI-Vcharacteristics of thin-oxide (∼20 Å) MNOS devices indicate that the dominant switching mechanism is not necessarily the direct tunneling of electrons to and from states at or near the oxide-nitride interface. Instead, it appears that switching may actually be the result of the tunneling of electrons (holes) from the silicon conduction (valence) band into the nitride conduction (valence) band, with subsequent trapping in the nitride.     

Accurate determination of ultrathin gate oxide thickness andeffective polysilicon doping of CMOS devices

We present an efficient and accurate method to characterize the physical thickness of ultrathin gate oxides (down to 25 Å) and the effective polysilicon doping of advanced CMOS devices. The method is based on the model for Fowler-Nordheim (F-N) tunneling current across the gate oxide with correction in gate voltage to account for the polysilicon-gate depletion. By fitting the model to measured data, both the gate oxide thickness and the effective poly doping are unambiguously determined. Unlike the traditional capacitance-voltage (C-V) technique that overestimates thin-oxide thickness and requires large area capacitor, this approach results in true physical thickness and the measurement can be performed on a standard sub-half micron transistor. The method is suitable for oxide thickness monitoring in manufacturing environments     

Cobalt disilicide as dopant diffusion source for polysilicon gates in MOS devices

In this paper, a novel p-channel metal oxide semiconductor (PMOS) device fabrication process using BF₂-implanted CoSi₂ as a boron diffusion source for both polycrystalline-silicon (polysilicon) gate doping and shallow source/drain junction formation is studied. Important issues including thermal stability of the CoSi₂/polysilicon stacked layer and boron redistribution in the CoSi₂/polysilicon stacked layer are discussed in detail. The data show that the thermal stability of CoSi₂/polysilicon stacked layers can be significantly improved by using as-deposited amorphous silicon films rather than as-deposited polysilicon films. Samples with 120 nm CoSi₂ on 180 nm polysilicon are thermally stable up to 1000°C for 60 s in a N₂ ambient. Secondary ion mass spectroscopy analyses show that degenerately doped polysilicon gates and shallow source/drain junctions can be achieved simultaneously. Furthermore, a simple method to study the electrically active dopant redistribution in CoSi₂polysilicon gates using MOS capacitors is proposed.     

Analysis of current voltage characteristics oflow-temperature-processed polysilicon thin-film transistors

The relationship between device performance and trap state density in polysilicon films was investigated. The density in the silicon energy gap was obtained by fitting the calculated on-state current versus gate voltage curve to the measured one for low-temperature (⩽600°C) processed polysilicon TFTs fabricated under various conditions, such as different deposition temperatures and annealing methods for crystallization. On-state current was markedly improved by reducing the density near band edges in the gap, and the improvement was realized by depositing the films at around 500°C in an LPCVD system or employing laser annealing instead of thermal annealing at 600°C. Off-state current was reduced to a great extent by reduction of the density around the midgap by using a plasma-hydrogenation technique     

Grain boundary states and the characteristics of lateral polysilicon diodes

In lateral n⁺p^?p⁺ diodes made in LPCVD polycrystalline silicon films, the energy distribution of the traps at the grain boundaries is found to be U shaped. They have a density of about 10¹² cm^?2 and a capture cross section of about 10^?16 cm². The forward current of the diodes is ascribed to recombination, the reverse current to field-enhanced generation via these traps.