Controllable decoding for automated analog circuit structure design

The decoding scheme is a major problem in automated analog circuit topology synthesis since decoding schemes bias synthesized circuit structures. However, the proper decoding scheme varies depending on the method to realize a given function. In this paper, a controllable decoding scheme is proposed in which the method to realize a function is controlled by a set of prototype circuits. Thus, the system can generate different types of analog circuits in a unified method. The prototype circuits are designed by a human and suggested to the system as hints of configurations of new analog circuits to be synthesized by the system. In the synthesis process, the information on circuit connections is stored as sub-circuits extracted from the prototype circuits. A genetic algorithm is then used to search for an optimum combination of the sub-circuits that achieves the desired electronic specifications. The combinations of sub-circuits are generated with a proposed technique where the terminals of the sub-circuits are shared. The capabilities of the proposed method are demonstrated through synthesis examples of a cubing circuit synthesis as a current-mode design and a logic circuit synthesis as a voltage-mode.The authors would like to thank the reviewers for their valuable comments. The authors would like to express special thank to Dr. Andrew M. Abo for English corrections.     

基于衬底驱动技术的模拟电路设计

在进行低电压低功耗模拟电路设计的众多技术中,衬底驱动（BD）技术由于设计简单和使用传统MOS工艺实现的特点,而被很多的设计所采用。本文利用这一原理,在标准CMOS工艺和±0．7V电源电压前提下设计低电压低功耗标准模块,最后在TSMC0．25umCMOS工艺模型下,用Spice模拟器验证了模拟仿真结果。     

基于低压电力载波技术的电路设计

介绍一种51单片机基于电力载波技术的控制系统的工作原理和结构.并介绍了直序扩频半双工异步调制解调器PL2102栽波芯片,利用它通过电力线载波应用系统可实现通过电力线对路灯的控制.本文给出了PL2102工作的基本原理及软硬件实现方法,及其设计原理图.     

A structured approach for VLSI circuit design

The authors review the research done on a structured, symbol-based IC design method called path programmable logic (PPL). They explain the logic partitioning strategy on which PPL is based. Compared to full-custom design methods, the PPL methods permits an order of magnitude reduction in design time. In most cases, the density of the circuits designed using the PPL method approaches or surpasses that of the practical full-custom designs. Compared to semicustom design techniques such as standard cells and gate arrays, PPL reduces the design time by a factor of three while improving the densities by a factor of two to three     

A sensor based technique for automated robot programming

This paper presents the concept of integrating a tactile sensor based, automated part measuring technique and a CAD programming scheme to perform off-line programming for a welding robot. The techniques used to achieve data flow throughout the production process include coordinate system referencing, interactive programming, tactile sensing seam tracing, and coordinate transformation. Together they form the backbone of the idea of integrating measurement and production operations where continuous path geometrical control is required. Techniques for referencing a workpiece with respect to different handling devices, and positioning the part on a suitable fixture, form an important portion of this work. Consequently, the positioning aspect and the data transfer capability between stages in the production process are highlighted. The welding of lap-joint type seams serves as an example. The integration of automated measurement and off-line robot programming actually constitutes a flexible manufacturing system operation that is capable of assuring the required process control. In this regard, linking a robot with an automated part measuring technique forms an important step towards upgrading a robot device from a difficult to program unit to a unit with a high degree of flexibility with rapid, convenient automatic contour programming.     

Colif: A design representation for application-specificmultiprocessor SOCs

By separating component behavior and communication infrastructure and spanning multiple abstraction levels, Colif lets designers use a divide-and-conquer approach for complex designs and focus on important customizations as they progressively refine the SOC architecture     

A review of techniques for automated structural design

A basis for a unified theory encompassing modern automated design procedures is presented. The different methods are reviewed, and sufficient examples are given to indicate the wide range of problems in structural design to which they have been applied. The economies of automating the design process and the development of modular software packages based on the finite element method for analysis are briefly discussed.     

A technique for precise depth representation in stereoscopic display

In observing a virtual 3D object displayed stereoscopically on a large screen, there is often a difference between the calculated depth and the perceived depth. This paper presents a method for reducing such differences of depth. To do this, we modify both the viewing position and the screen position in the stereoscopic calculation. The optimal amount of modification was determined from sample values of depth differences. The effectiveness of the proposed method is discussed on the merits of the experimental results. This technique decreased the average difference from 4.3 mm to 1.3 mm.     

A framework for feature-based representation of the design process

The design process is very complicated and differs with each engineer. The development of computer-based aids for design must take this into consideration and allow for the nuances of the individual. A generic representation of the information used in design is required for the development of any data base that supports the design aid. A properly designed data base or set of data bases can help aid. A properly designed data base or set of data bases can help integrate CAD, expert system, and ancillary programs, thereby forming an intelligent design system. A model has been developed that allows the information requirements of the design process to be analyzed. A data base for an intelligent design system can be developed based on these results.     

A design methodology for form-based knowledge reuse and representation

Paper forms are regularly used for collecting and disseminating knowledge in offices; they are a natural way of eliciting requirements of knowledge workers. Many organizations have implemented a groupware system to integrate the organizational knowledge and support knowledge creation. However, design methods for flexible form-based knowledge reuse and representation are limited. We developed a methodology based on the enhanced cognitive fit theory; it utilizes factoring and synthesis principles to manipulate form-based knowledge. The methodology was articulated using the design science research methodology. A prototype embedded methodology was built to support a knowledge worker in knowledge creation and reuse in a high tech firm. The resulting system allowed flexible form-based knowledge creation that was useful for problem solving and exploiting opportunities. Implications and conclusions are discussed.     

Current-mode circuit-level technique to design variation-aware nanoscale summing circuit for ultra-low power applications

Prodigious demand for fast performance-ultra low power electronic devices has insinuated the discovery of circuit style that promises reduced propagation delay (t _p ), as well as low power dissipation (PWR). MOS current mode logic (MCML) style has emerged as a promising logic style that offers high speed of operation at the expense of acceptable power dissipation. This paper proposes a MCML full adder which employs a load controller circuit. It compares MCML full adder with hybrid-CMOS full adder in terms of various design metrics in superthreshold as well as subthreshold regions. MCML topology with load controller offers a high speed of operation and low power dissipation in superthreshold region. Same circuit arrangement, when operated in subthreshold region also delivers higher operating speed with ultralow power dissipation compared to its hybrid-CMOS counterpart. Power dissipation analysis established MCML based full adder more robust compared to its hybrid-CMOS counterpart. In particular, MCML full adder design achieves 3.77× (2.38×) improvement in propagation delay, 10.43× (3.45×) improvement in average power dissipation, 39.43× (8.21×) lower power-delay product (PDP) and 149.07× (19.55×) improvement in energy-delay product (EDP) in superthreshold (subthreshold) regions of operation at 16-nm technology node. The above results are also validated using TSMC’s industry standard 0.18-μm technology model parameters and a similar trend is observed in the design metrics of the MCML and hybrid-CMOS full adder circuits. In addition, noise performance of the above mentioned circuits is also carried out. It is observed that the noise induced by the hybrid-CMOS full adder is about 14× to that of the MCML full adder.

     

多模式GNSS接收机的数字AGC电路设计

设计了一款应用于GNSS接收机的快速数字自动增益控制电路(AGC),该AGC电路采用三级增益控制算法实现快速稳定的增益收敛,对2 bit及以上ADC具有很好的普适性。电路仿真了增益收敛速度和稳定度以及有带内连续波干扰情况下不同量化精度的信噪比性能,结果表明所设计电路可以很好地满足性能要求。     

一种神经信号调理电路的设计

介绍了一种性能优良的神经信号调理电路。该电路由前置输入放大器、带通选频网络、缓冲放大器、信号识别电路和光耦隔离电路等组成,具有输入阻抗高、共模抑制比高、不同频率段相移相差小、高倍放大、结构简单稳定可靠等特点,解决了对人体神经信号进行检测时常遇到的信号微弱、强大的工频和极化电压干扰等难题。     

基于FPGA的图像处理电路的设计与实现

以FPGA为平台,设计了灰阶变化、图像压缩、边缘检测等图像处理电路。与传统的设计方法相比较,本设计不仅具有FPGA电路特有的开发周期短、设计效率高、扩展性和升级性良好、设计灵活等特点,而且由于系统采用硬件电路实现,因此在图像处理的速度上具有明显的优势。     

总线LVDS驱动器电路设计

提出了一种用于多点数据传输的BLVDS(Bus low voltage differential signal)驱动器电路设计。设计中将电压模式驱动器电路和双电流源模式驱动器电路相结合实现多点数据传输,既充分利用了LVDS技术高速、低功耗和低噪声的优点,又解决了传统的LVDS驱动器电路只能用于点对点应用,不能用于总线数据传输的问题。仿真结果表明,该BLVDS驱动器电路的传输速率可达100Mbps,电气性能指标符合TIA/EIA-899协议标准的要求。     

基于理想模型和遗传算法的模拟电路自动化设计研究

受模拟电路人工设计启发,以 MOSFET 电路为例提出一种模拟电路的自动化设计方法。首先以 MOSFET 的理想模型为基础,利用遗传算法(GA)产生电路拓扑并优化其参数;然后用实际元件替换其理想模型,通过少量调整即可得到最终电路。GA 在电路拓扑生成和参数优化方面具有优势,理想模型可有效缩小算法的搜索空间,因而所提方法在最优电路拓扑生成和加快电路设计速度两方面具有更为明显的优势。通过对三次方运算电路的设计,证实了所提方法的有效性。     

Structure for automated architectural sketch design

This paper outlines a structure for automated architectural sketch design, examines its theoretical basis, and indicates some general features of its computer implementation. Design goals are identified as fulfilling a central role in the creation of suitable mechanisms for generating, evaluating and selecting design solutions. It is suggested that these mechanisms should operate at each of the levels of a hierarchial architectural sketch design decision-making structure.