共查询到19条相似文献,搜索用时 203 毫秒
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《电子制作.电脑维护与应用》2015,(22)
<正>IDT公司(IDT)近日宣布推出全新版本的Versa Clock 5可编程时钟发生器,新产品具有内置的晶体,可以用一种更简单、更具成本效益的方式来实现电子系统的时序。5P49V5933和5P49V5935可提供IDT公司Versa Clock 5时钟发生器的创新功能,同时通过晶体的集成可减少电路板空间和成本。采用这种集成式的频率源,设计师在他们的设计中不需再使用外置晶体,因而也省去了与频率调整相关的投入。Versa Clock 5可编程时序器件使用竞争对手一半的功率便可提供优异的抖动性能,并能提供通用的输出对,可独立配置为 相似文献
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时序图是顶点之间的连通性随时间变化的图,大规模时序图的紧凑表示和高效操作是分析和处理时序图数据的基础.提出了一种基于决策图的时序图数据紧凑表示方法——kd-MDD.kd-MDD是对kd-tree的改进,该方法对时序图的邻接矩阵进行kd划分,通过引入多值决策图来合并相同子矩阵,即kd-tree图数据表示中存在的同构子树,存储结构更加紧凑.在kd-MDD紧凑表示基础上,提供了基于kd-MDD的时序图的基本操作(如顶点正向/反向邻居的检索、边是否处于活动状态的检查、边的添加和删除等).在真实的时序图数据集上(Flickr-growth, YouTube-growth, Wikipedia等)的实验结果表明,kd-MDD表示中的节点数仅为kd-tree表示中节点数的1.58%~4.65%,与ckd-tree和bckd-tree相比,其节点数为ck... 相似文献
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提出一种利用图形处理单元(Graphics Processing Unit,GPU)加速统计静态时序分析的方法,利用稀疏网格减少统计静态时序分析中时序图各节点的配置个数,在GPU上构建复杂的时序图数据结构后并行计算各节点的不同配置,达到加速统计静态时序分析的目的。测试结果表明,提出的方法能够在不损失精度的前提下,将统计静态时序分析运行速度平均提高300倍以上。随着现代集成电路规模的持续增大和集成电路工艺的不断发展,这种新型快速的统计静态时序方法能够有效提高时序分析的速度和效率。 相似文献
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在统一建模语言(UML)规范中顺序图的语义是以自然语言的形式描述的,是一种半形式化的语言,不能对系统的交互行为进行形式化分析及论证.针对UML顺序图缺乏精确的形式化描述问题,根据顺序图的时序特征,提出了增加交互操作符的UML顺序图的六元组形式化方法.对描述逻辑进行时序扩展,得到可表示动态和时序语义的形式化规范——时序描述逻辑.应用时序描述逻辑的时态算子得到时序描述逻辑语义形式的UML顺序图.用UML顺序图描述完整的C语言执行过程,将其形式化描述,实验结果表明,这种方法是可行的. 相似文献
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为了优化火电厂管控信息系统,提出了基于时序Petri网的火电厂管控信息系统模型研究.首先提出了时序Petri网的分层建模方法,并给出了时序Petri网对复杂系统的建模步骤;其次,建立了整个火电厂管控信息系统的时序Petri网模型;再次,为了更好地分析和优化Petri网模型,对其进行了简化;最后,证明了简化后的时序Petri网大大减少了库所和变迁的数量并保持了原网的功能性. 相似文献
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重点将UML图和动态切片应用于回归测试中。针对现在应用于软件开发的UML图不能很好地满足软件测试的要求,引入了时序状态图和改进后的状态图,对两种图进行形式化定义,并且通过实例说明定义内容,其中时序状态图用于类间测试,改进后的状态图用于类内测试。对定义的图进行切片分析,形成测试步骤和测试算法。网上购物实例表明时序状态图和改进状态图可以提高回归测试效率。 相似文献
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针对代码与模型之间的不一致性问题,提出了一种基于UML模型和Java代码之间的一致性检测方法.首先,对UML类图和时序图进行形式化描述,并提出时序调用图(SD-CG)这一概念,在此基础上完成类的关联关系到关联属性的转换以及UML时序图到时序调用图SD-CG的转换;其次,通过方法调用图CG来表达类方法之间的调用关系,从而反映代码动态行为,由此通过对Java源代码的词法分析与语法分析,可获得类的信息及方法调用图CG;然后设计了UML模型与Java源代码间一致性检测算法,包括对类间静态信息以及时序调用图SD-CG与方法调用图CG间的一致性检测;最后,通过开发UML模型与Java源代码一致性检测工具,验证了所提出的方法是可行有效的. 相似文献
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Reachability analysis of real-time systems using time Petri nets 总被引:13,自引:0,他引:13
Wang J. Deng Y. Xu G. 《IEEE transactions on systems, man, and cybernetics. Part B, Cybernetics》2000,30(5):725-736
Time Petri nets (TPNs) are a popular Petri net model for specification and verification of real-time systems. A fundamental and most widely applied method for analyzing Petri nets is reachability analysis. The existing technique for reachability analysis of TPNs, however, is not suitable for timing property verification because one cannot derive end-to-end delay in task execution, an important issue for time-critical systems, from the reachability tree constructed using the technique. In this paper, we present a new reachability based analysis technique for TPNs for timing property analysis and verification that effectively addresses the problem. Our technique is based on a concept called clock-stamped state class (CS-class). With the reachability tree generated based on CS-classes, we can directly compute the end-to-end time delay in task execution. Moreover, a CS-class can be uniquely mapped to a traditional state class based on which the conventional reachability tree is constructed. Therefore, our CS-class-based analysis technique is more general than the existing technique. We show how to apply this technique to timing property verification of the TPN model of a command and control (C2) system. 相似文献
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A procedure for planning and resources’ management in intermodal terminals is presented. It integrates Timed Petri Nets (TPNs) and Data Envelopment Analysis (DEA) and consists of three steps: the terminal modeling via TPNs to model the regular behavior; the evaluation of whether the current configuration may cope with increased freight flows; if not, the analysis by cross-efficiency DEA of alternative planning solutions. The procedure provides the decision maker with number, capacity, and schedule of resources to tackle the flows increase. The method is evaluated by a real case study, showing that integrating TPNs and DEA allows taking planning decisions under conflicting requirements. 相似文献
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基于时间Petri网的实时系统低能耗高层综合 总被引:1,自引:0,他引:1
以时间Petri网为模型,验证系统功能性和实时性,在此基础上,提出了一种由子任务的能耗变化率驱动的启发式能耗优化算法,并针对一类特殊形式的网模型——可组合时间Petri网,设计了相应的简化算法.实验说明,上述算法时间复杂度低,且优化效果接近最优值,能够为实时系统低能耗高层综合提供有力支持. 相似文献
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Claude Jard Didier Lime Olivier H. Roux Louis-Marie Traonouez 《Formal Methods in System Design》2013,43(3):493-519
We address the problem of unfolding safe parametric stopwatch time Petri nets (PSwPNs), i.e., safe time Petri nets (TPNs) possibly extended with time parameters and stopwatches. We extend the notion of branching process to account for the dates of the occurrences of events and thus define a symbolic unfolding for PSwPNs. In the case of TPNs we also propose a method based on our so-called time branching processes to compute a finite complete prefix of the symbolic unfolding. The originality of our work relies on a precise handling of direct conflicts between events, and the analysis of their effects on the constraints between the firing dates of those events. 相似文献
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Programming and Computer Software - Dense-Time Petri nets (TPNs), where time intervals for transition firings are assigned, are now a well-established model, which is used to describe and study... 相似文献
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Reachability Problems and Abstract State Spaces for Time Petri Nets with Stopwatches 总被引:2,自引:0,他引:2
Bernard Berthomieu Didier Lime Olivier H. Roux François Vernadat 《Discrete Event Dynamic Systems》2007,17(2):133-158
Several extensions of Time Petri nets (TPNs) have been proposed for modeling suspension and resumption of actions in timed systems. We first introduce a simple class of TPNs extended with stopwatches (SwTPNs), and present a semi-algorithm for building exact representations of the behavior of SwTPNs, based on the known state class method for Time Petri nets. Then, we prove that state reachability in SwTPNs and all similar models is undecidable, even when bounded, which solves an open problem. Finally, we discuss overapproximation methods yielding finite abstractions of their behavior for a subclass of bounded SwTPNs, and propose a new one based on a quantization of the polyhedra representing temporal information. By adjusting a parameter, the exact behavior can be approximated as closely as desired. The methods have been implemented, experiments are reported. 相似文献
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Compositional time Petri nets and reduction rules 总被引:2,自引:0,他引:2
Wang J. Deng Y. Zhou M. 《IEEE transactions on systems, man, and cybernetics. Part B, Cybernetics》2000,30(4):562-572
This paper introduces compositional time Petri net (CTPN) models. A CTPN is a modularized time Petri net (TPN), which is composed of components and connectors. The paper also proposes a set of component-level reduction rules for TPNs. Each of these reduction rules transforms a TPN component to a very simple one while maintaining the net's external observable timing properties. Consequently, the proposed method works at a coarse level rather than at an individual transition level. Therefore, one requires significantly fewer applications to reduce the size of the TPN under analysis than those existing ones for TPNs. The use and benefits of CTPNs and reduction rules are illustrated by modeling and analyzing the response time of a command and control system to its external arriving messages. 相似文献
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基于进程代数的UML序列图的形式语义 总被引:3,自引:1,他引:3
UML序列图用于建模实例间动态交互过程.但UML规范并没有给出其形式化的动态语义,这不利于对模型进行形式化验证和证明。本文把序列图中的事件动作及其执行序列映射为进程代数中的进程表达式,利用进程代数语义框架来构建UML序列图的形式语义。首先,建立了序列图到进程代数的语义映射规则;然后用Plotkin风格的结构化操作语义给出并证明务件组合算子演绎规则;最后,归纳定义了算子次序约束条件并证明了其可终止性。 相似文献
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为了在软件开发早期阶段对UML2.0顺序图模型进行分析和验证,本文给出了UML2.0顺序图的一种有穷自动机模型。首先给出了顺序图在语法和语义上的形式化描述,然后提出了一种使有穷自动机来描述每个对象在顺序图描述的场景中所参与的事件序列的方法,并将该方法扩展到带有组合片段的UML2.0顺序图,最后分析了UML2.0顺序图中的时间建模机制,设计了从UML2.0顺序图中提取时间约束的算法。以上工作为使用模型检测工具UPPAAL对顺序图模型进行进一步的分析与验证奠定了基础。 相似文献