InAlAs/InGaAs/InP基PHEMTs小信号建模及低噪声应用（英文）

利用改进的小信号模型对采用100nmInAlAs/InGaAs/InP工艺设计实现的PHEMTs器件进行建模,并设计实现了一款W波段单片低噪声放大器进行信号模型的验证。为了进一步改善信号模型低频S参数拟合差的精度,该小信号模型考虑了栅源和栅漏二极管微分电阻,在等效电路拓扑中分别用Rfs和Rfd表示.为了验证模型的可行性,基于该信号模型研制了W波段低噪声放大器单片.在片测试结果表明:最大小信号增益为14.4dB@92.5GHz,3dB带宽为25GHz@85-110GHz.而且,该放大器也表现出了良好的噪声特性,在88GHz处噪声系数为4.1dB,相关增益为13.8dB.与同频段其他芯片相比,该放大器单片具有宽3dB带宽和高的单级增益.     

（英）D波段InP基高增益、低噪声放大芯片的设计与实现

利用90-nm InAlAs/InGaAs/InP HEMT工艺设计实现了两款D波段（110~170 GHz）单片微波集成电路放大器。两款放大器均采用共源结构,布线选取微带线。基于器件A设计的三级放大器A在片测试结果表明：最大小信号增益为11.2 dB@140 GHz,3 dB带宽为16 GHz,芯片面积2.6×1.2 mm2。基于器件B设计的两级放大器B在片测试结果表明：最大小信号增益为15.8 dB@139 GHz,3dB带宽12 GHz,在130~150 GHz频带范围内增益大于10 dB,芯片面积1.7×0.8 mm2,带内最小噪声为4.4 dB、相关增益15 dB@141 GHz,平均噪声系数约为5.2 dB。放大器B具有高的单级增益、相对高的增益面积比以及较好的噪声系数。该放大器芯片的设计实现对于构建D波段接收前端具有借鉴意义。     

基于InP基HEMTs的W波段高增益低噪声放大MMIC（英文）

基于自主研发的InP基高电子迁移率晶体管工艺设计并制作了一款W波段单级低噪声放大单片毫米波集成电路.共源共栅拓扑结构和共面波导工艺保证了该低噪声放大器紧凑的面积和高的增益,其芯片面积为900μm×975μm,84~100 GHz频率范围内增益大于10 dB,95 GHz处小信号增益达到最大值为15.2dB.根据调查对比,该单级放大电路芯片具有最高的单级增益和相对高的增益面积比.另外,该放大电路芯片在87.5 GHz处噪声系数为4.3 dB,88.8 GHz处饱和输出功率为8.03 dBm.该低噪声放大器芯片的成功研制对于构建一个W波段信号接收前端具有重要的借鉴意义.     

基于InP基HEMTs的W波段高增益低噪声放大MMIC

本文基于自主研发的InP基高电子迁移率晶体管工艺设计并制作了一款W波段单级低噪声放大单片毫米波集成电路。共源共栅拓扑结构和共面波导工艺保证了该低噪声放大器紧凑的面积和高的增益,其芯片面积为900 μm×975 μm,84 GHz-100 GHz频率范围内增益大于10 dB,95 GHz处小信号增益达到最大值为15.2 dB。根据调查对比,该单级放大电路芯片具有最高的单级增益和相对高的增益面积比。另外,该放大电路芯片在87.5 GHz处噪声系数为4.3 dB,88.8 GHz处饱和输出功率为8.03 dBm。该低噪声放大器芯片的成功研制对于构建一个W波段信号接收前端具有重要的借鉴意义。     

用于W波段接收机的宽带单片低噪声中频放大器

设计和制造了频率覆盖范围8～18GHz的宽带单片低噪声放大器。通频带内,其噪声系数小于4.3dB,相关增益8.5dB。新设计的低噪声放大器用于W波段(75～110GHz)接收机作为中频放大器。该放大器的射频性能适用范围宽,并且可以作为廉价的增益功能块。     

D波段InP基高增益低噪声放大芯片的设计与实现（英文）

利用90nmInAlAs/InGaAs/InPHEMT工艺设计实现了两款D波段(110～170GHz)单片微波集成电路放大器.两款放大器均采用共源结构,布线选取微带线.基于器件A设计的三级放大器A在片测试结果表明:最大小信号增益为11.2dB@140GHz,3dB带宽为16GHz,芯片面积2.6mm×1.2mm.基于器件B设计的两级放大器B在片测试结果表明:最大小信号增益为15.8dB@139GHz,3dB带宽12GHz,在130～150GHz频带范围内增益大于10dB,芯片面积1.7mm×0.8mm,带内最小噪声为4.4dB、相关增益15dB@141GHz,平均噪声系数约为5.2dB.放大器B具有高的单级增益、相对高的增益面积比以及较好的噪声系数.该放大器芯片的设计实现对于构建D波段接收前端具有借鉴意义.     

宽带低噪声放大器单片微波集成电路

从行波放大器设计理论出发,研制了一款基于低噪声GaAs赝配高电子迁移率晶体管(PHEMT)工艺设计的2~20 GHz单片微波集成电路(MMIC)宽带低噪声放大器。该款放大器由九级电路构成。为了进一步提高放大器的增益,采用了一个共源场效应管和一个共栅场效应管级联的拓扑结构,每级放大器采用自偏压技术实现单电源供电。测试结果表明,本款低噪声放大器在外加+5 V工作电压下,能够在2~20 GHz频率内实现小信号增益大于16 dB,增益平坦度小于±0.5 dB,输出P-1 dB大于14 dBm,噪声系数典型值为2.5 dB,输入和输出回波损耗均小于-15 dB,工作电流仅为63 mA,低噪声放大器芯片面积为3.1 mm×1.3 mm。     

基于70nm GaAs MHEMT工艺的W波段低噪声放大器

报道了一种采用电子束直写70nm"Y"型栅工艺制备的GaAs MHEMT器件及W波段低噪声放大器。器件的最大跨导可达到1 050mS/mm,最大电流密度可达650mA/mm。通过小信号S参数测试,可外推其电流增益截至频率fT及最大振荡频率fmax分别达350GHz及470GHz。采用该工艺制备的W波段低噪声放大器,在86~96GHz频段可实现噪声系数小于3dB,增益大于20dB。     

0.6～18.0 GHz超宽带低噪声放大器MMIC

基于0.15μm GaAs E-pHEMT工艺设计并制备了一款0.6～18.0 GHz的低噪声放大器单片微波集成电路。该放大器使用一级共源共栅结构,通过负反馈实现宽带的匹配设计。同时在共栅晶体管栅极增加到地电容,共源管和共栅管漏极增加峰化电感,以提高高频增益,扩展带宽,改善噪声。常温在片测试结果表明,在3.3 V单电源供电下,0.6～18.0 GHz频带内该款低噪声放大器噪声系数典型值1.5 dB,小信号增益约15 dB,增益平坦度小于±0.9 dB,输入、输出电压驻波比典型值分别为1.7和1.8,1 dB压缩点输出功率典型值14 dBm,功耗72.6 mW,芯片面积1.5 mm×1.2 mm。     

2～18 GHz GaAs超宽带低噪声放大器MMIC

基于90 nm GaAs赝配高电子迁移率晶体管(PHEMT)工艺设计并制备了一款2～18 GHz的超宽带低噪声放大器(LNA)单片微波集成电路(MMIC)。该款放大器具有两级共源共栅级联结构，通过负反馈实现了超宽带内的增益平坦设计。在共栅晶体管的栅极增加接地电容，提高了放大器的高频输出阻抗，进而拓宽了带宽，提高了高频增益，并降低了噪声。在片测试结果表明，在5 V单电源电压下，在2～18 GHz内该低噪声放大器小信号增益约为26.5 dB,增益平坦度小于±1 dB,1 dB压缩点输出功率大于13.5 dBm,噪声系数小于1.5 dB,输入、输出回波损耗均小于-10 dB,工作电流为100 mA,芯片面积为2 mm×1 mm。该超宽带低噪声放大器可应用于雷达接收机系统中，有利于接收机带宽、噪声系数和体积等的优化。     

Low-power W-band CPWG InAs/AlSb HEMT low-noise amplifier

We present the development of a low-power W-band low-noise amplifier (LNA) designed in a 200-nm InAs/AlSb high electron mobility transistor (HEMT) technology fabricated on a 50-/spl mu/m GaAs substrate. A single-stage coplanar waveguide with ground (CPWG) LNA is described. The LNA exhibits a noise figure of 2.5 dB and an associated gain of 5.6 dB at 90 GHz while consuming 2.0 mW of total dc power. This is, to the best of our knowledge, the lowest reported noise figure for an InAs/AlSb HEMT LNA at 90 GHz. Biased for maximum gain, the single-stage amplifier presents 6.7-dB gain and an output 1-dB gain compression point (P1dB) of -6.7dBm at 90 GHz. The amplifier provides broad-band gain, greater than 5dB over the entire W-band.     

GaAs Monolithic MIC's for Direct Broadcast Satellite Receivers

A 12-GHz low-noise amplifier (LNA), a 1-GHz IF amplifier (IFA), and an 11-GHz dielectric resonator oscillator (DRO) have been developed for DBS home receiver applications by using GaAs monolithic microwave integrated circuit (MMIC) technology. Each MMIC chip contains FET's as active elements and self-biasing source resistors and bypass capacitors for a single power supply operation. It also contairns dc-block and RF-bypass capacitors. The three-stage LNA exhibits a 3.4-dB noise figure and a 19.5-dB gain over 11.7-12.2 GHz. The negative-feedback-type three-stage IFA shows a 3.9-dB noise figure and a 23-dB gain over 0.5-1.5 GHz. The DRO gives 10.mW output power at 10.67 GHz, with a frequency stability of 1.5 MHz over a temperature range from -40-80°C. A direct broadcast satellite (DBS) receiver incorporating these MMIC's exhibits an overafl noise figure of /spl les/ 4.0 dB for frequencies from 11.7-12.2 GHz.     

A 1.5-V 2–9.6-GHz Inductorless Low-Noise Amplifier in 0.13-μm CMOS

This paper presents an inductorless low-noise amplifier (LNA) design for an ultra-wideband (UWB) receiver front-end. A current-reuse gain-enhanced noise canceling architecture is proposed, and the properties and limitations of the gain-enhancement stage are discussed. Capacitive peaking is employed to improve the gain flatness and -3-dB bandwidth, at the cost of absolute gain value. The LNA circuit is fabricated in a 0.13-mum triple-well CMOS technology. Measurement result shows that a small-signal gain of 11 dB and a -3-dB bandwidth of 2-9.6 GHz are obtained. Over the -3-dB bandwidth, the input return loss is less than -8.3 dB, and the noise figure is 3.6-4.8 dB. The LNA consumes 19 mW from a low supply voltage of 1.5 V. It is shown that the LNA designed without on-chip inductors achieves comparable performances with inductor-based designs. The silicon area is reduced significantly in the inductorless design, the LNA core occupies only 0.05 mm², which is among the smallest reported designs.     

A W-band source module using MMIC's

A W-band source module providing 4-GHz tuning bandwidth (92.5-96.5 GHz) has been developed. This module consists of three MMIC chips: a 23.5 GHz HBT VCO, a 23.5-94 GHz HEMT frequency quadrupler and a W-band three-stage HEMT output amplifier, all fabricated in TRW production lines. It exhibits a measured output power of 3 dBm at 94-95 GHz and a 3-dB tuning bandwidth greater than 3 GHz, with a phase noise of -92 dBc/Hz at 1 MHz offset. This work demonstrates a new and efficient way to implement high performance W-band source. Its wide tuning bandwidth with good phase noise performance, as well as design simplicity, makes this approach attractive for many W-band system applications     

A low power 2.5-5 GHz low-noise amplifier using 0.5-μm GaAs pHEMT technology

正A two-stage 2.5-5 GHz monolithic low-noise amplifier(LNA) has been fabricated using 0.5-μm enhanced mode AlGaAs/GaAs pHEMT technology.To achieve wide operation bandwidth and low noise figure,the proposed LNA uses a wideband matching network and a negative feedback technique.Measured results from 2.5 to 5 GHz demonstrate a minimum of 2.4-dB noise figure and 17-dB gain.The input and output return loss exceeded -10-dB across the band.The power consumption of this LNA is 33 mW.According to the author's knowledge,this is the lowest power consumption LNA fabricated in 0.5-μm AlGaAs/GaAs pHEMT with the comparable performance.     

A Ka-band low-noise amplifier with a coplanar waveguide (CPW) structure with 0.15-μm GaAs pHEMT technology

This investigation explores a low-noise amplifier (LNA) with a coplanar waveguide (CPW) structure, in which a two-stage amplifier is associated with a cascade schematic circuit, implemented in 0.15-μm GaAs pseudo-morphic high electron mobility transistor (pHEMT) technology in a Ka-band (26.5-40.0 GHz) microwave monolithic integrated circuit (MMIC). The experimental results demonstrate that the proposed LNA has a peak gain of 12.53 dB at 30 GHz and a minimum noise figure of 3.3 dB at 29.5 GHz, when biased at a V_(ds) of 2 V and a V_(gs) of-0.6 V with a drain current of 16 mA in the circuit. The results show that the millimeter-wave LNA with coplanar waveguide structure has a higher gain and wider bandwidth than a conventional circuit. Finally, the overall LNA characterization exhibits high gain and low noise, indicating that the LNA has a compact circuit and favorable RF characteristics. The strong RF character exhibited by the LNA circuit can be used in millimeter-wave circuit applications.     

A miniature Q-band low noise amplifier using 0.13-/spl mu/m CMOS technology

A miniature Q-band low noise amplifier (LNA) using 0.13-/spl mu/m standard mixed signal/radio frequency complementary metal-oxide-semiconductor (CMOS) technology is presented in this letter. This three-stage common source thin-film microstrip LNA achieves a peak gain of 20dB at 43GHz with a compact chip size of 0.525mm/sup 2/. The 3-dB frequency bandwidth ranges from 34 to 44GHz and the minimum noise figure is 6.3dB at 41GHz. The LNA outperforms all the reported commercial standard CMOS Q-band LNAs, with the highest gain, highest output IP3, and smallest chip size.     

A low supply voltage SiGe LNA for ultra-wideband frontends

A low-power low-noise amplifier (LNA) for ultra-wideband (UWB) radio systems is presented. The microwave monolithic integrated circuit (MMIC) has been fabricated using a commercial 0.25-/spl mu/m silicon-germanium (SiGe) bipolar CMOS (BiCMOS) technology. The amplifier uses peaking and feedback techniques to optimize its gain, bandwidth and impedance matching. It operates from 3.4 to 6.9GHz, which corresponds with the low end of the available UWB radio spectrum. The LNA has a peak gain of 10dB and a noise figure less than 5dB over the entire bandwidth. The circuit consumes only 3.5mW using a 1-V supply voltage. A figure of merit (FoM) for LNAs considering bandwidth, gain, noise, power consumption, and technology is proposed. The realized LNA circuit is compared with other recently published low-power LNA designs and shows the highest reported FoM.     

110-120-GHz monolithic low-noise amplifiers

The authors discuss the development of 110-120-GHz monolithic low-noise amplifiers (LNAs) using 0.1-mm pseudomorphic AlGaAs/InGaAs/GaAs low-noise HEMT technology. Two 2-stage LNAs have been designed, fabricated, and tested. The first amplifier demonstrates a gain of 12 dB at 112 to 115 GHz with a noise figure of 6.3 dB when biased for high gain, and a noise figure of 5.5 dB is achieved with an associated gain of 10 dB at 113 GHz when biased for low-noise figure. The other amplifier has a measured small-signal gain of 19.6 dB at 110 GHz with a noise figure of 3.9 dB. A noise figure of 3.4 dB with 15.6-dB associated gain was obtained at 113 GHz. The authors state that the small-signal gain and noise figure performance for the second LNA are the best results ever achieved for a two-stage HEMT amplifier at this frequency band