一种改进交叉耦合晶体振荡器

设计了一种改进的差分输出晶体振荡器,该振荡器在一般交叉耦合鳍栖的基础上,通过加入RC高通滤波器来改良电路的相位噪声,分析了该RC滤波器对电路的影响并给出了优化方法．基于0．25μm标准CMOS工艺模型的仿真结果表明,该滤波器可有效滤除经过上变频会成为载波附近相位噪声的低频噪声（特别是1／f噪声）,采用普通4MHz晶体谐振器,该振荡器相位噪声可以达到-130．1dBc@100Hz．     

一种低相位噪声2N分频器的设计

介绍了一种低相位噪声2N分频器的设计。该电路采用0.35μm BiCMOS SiGe工艺制作。1 kHz频偏下的相位噪声为-150 dBc/Hz,大大低于传统的分频器;在-55~125℃温度范围内,电路的工作频带为20 MHz~2.4 GHz,功耗电流约40 mA。数据输入端S0、S1、S2控制电路的分频比在21~28间变化,数据输入端与TTL/CMOS电平兼容。     

UHF RFID中低噪声正交压控振荡器设计

采用标准0.18μm RF CMOS工艺,设计了一种低相位噪声正交压控振荡器(QVCO)电路。该QVCO电路采用了两种新技术:分裂转换偏置与电容耦合技术。该电路不仅获得较好的相位噪声,还具有良好的相位误差。仿真结果表明,1.8V电压下,电路功耗为10.28mW。实现了848.1MHz~1.048GHz的调谐范围,输出频率为920MHz时,在频偏1MHz处,相位噪声为-127.5dBc/Hz,相位误差最小可达到0.01°。     

2.5Gb/s 0.18μm CMOS时钟数据恢复电路

采用TSMC公司标准的0．18μm CMOS工艺，设计并实现了一个全集成的2．5Gb／s时钟数据恢复电路．时钟恢复由一个锁相环实现．通过使用一个动态的鉴频鉴相器，优化了相位噪声性能．恢复出2．5GHz时钟信号的均方抖动为2．4ps，单边带相位噪声在10kHz频偏处为-111dBc／Hz．恢复出2．5Gb／s数据的均方抖动为3．3ps．芯片的功耗仅为120mW．     

应用于UHF RFID阅读器中低相位噪声LC VCO设计

设计了一种应用于860～960 MHz UHF RFID阅读器低相位噪声的CMOS LC压控振荡器.电路经过一个SCL结构的1/2分频器输出四相正交信号.电路设计采用SMIC 0.18μm CMOS工艺库和Cadence SpectreRF仿真器.仿真结果表明:VCO在分频前,实现了调频范围为1620～2020MHz;在振荡频率为1.8GHz时,相位噪声为-127.5dBc/Hz@lMHz;VCO经过2分频电路后,实现了调频范围为810～1010MHz;在频率900MHz,其相位噪声-133.5dBc/Hz@1MHz.     

一种基于BiCMOS工艺的差分压控振荡器

设计了一种Colpitts型LC振荡器。该电路采用差分结构，具有集成度高，噪声性能良好的优点。该设计基于0．8μm BiCMOS工艺，实现了中心频率为433MHz的Colpitts型差分压控振荡器（VCO）。电路采用3V电压供电，频率范围399．8～465．1MHz，偏离中心频率1MHz处的相位噪声是-137dBc／Hz。     

一种应用于低噪声PLL的RF-VCO设计

在PLL电路设计中,压控振荡器设计是电路的关键模块,按类型又主要分为LC震荡器和环形振荡器两种,其性能直接决定了相位噪声、频率稳定度及覆盖范围。文章介绍了一款1.8 GHz的基于交叉耦合对LC结构的低噪声CMOS压控振荡器的设计,并对调谐范围、相位噪声以及电路起振条件等做了分析讨论。该设计采用0.18μm 6层金属CMOS工艺制造,模块面积为0.3 mm2,电路经过Cadence SpectreRF仿真,VCO的输出范围为1 594~2 023 MHz,中心频率1.8 GHz输出时相位噪声为-118 dBc/Hz@600 kHz,1.9 GHz输出时相位噪声为-121 dBc/Hz@600 kHz。结果表明该VCO设计达到了较宽的频率覆盖范围和较低的相位噪声,可以满足低噪声PLL的设计要求。     

CMOS电感电容压控振荡器中对称噪声滤波技术的研究

提出一种基于CMOS电感电容压控振荡器的对称噪声滤波技术。仿真结果表明．对称噪声滤波技术能够在相同的功耗下改善相位噪声6dB。应用对称噪声滤波技术设计一个4．8GHz压控振荡器，在0．25μm CMOS工艺上制造，测试结果表明在偏离载波1MHz时相位噪声为-123．66dBc／Hz，整个振荡器的功耗仅为12mW，与同类型的压控振荡器比较，取得很好的PFTN指标。     

一种高精度低温漂振荡器设计

针对无线通信和微机械传感器系统对时钟相位噪声的要求,设计了一种高精度低温漂的振荡器电路设计。利用Leeson线形相位噪声模型分析相位噪声,降低了主要噪声源,达到优化相位噪声的目的。该电路在华润上华018 μm工艺平台上流片验证。测试结果显示,电源电压在22~36 V变化,温度在-35~85 ℃变化,频率变化为-2％～+05％;相位噪声-116 dBc＠1 kHz;4 000个周期的抖动在-12%～+12%。该电路已成功集成到微机械陀螺仪控制芯片中。     

7.3GHz 0.18μm CMOS注入式锁相环电路

给出一种利用0 .18μm CMOS工艺实现的注入式振荡器辅助锁相环.在1.8V电源电压下,电路工作频率为7.3GHz,功耗为15 7m W,跟踪范围为15 0 MHz,锁定时在1‰(7.3MHz)频率偏移量下的相位噪声为- 97.36 d Bc/Hz     

Low voltage low-phase-noise SB-QLCO using second harmonics coupling technique

A switched biasing quadrature oscillator with LC tanks (SB-QLCO) is proposed to achieve low voltage and low phase noise. In this work, coupling devices, capacitors, don’t contributes any noise and this second harmonics coupling technique leads to low voltage. The proposed QLCO was simulated in 0.18 μm CMOS process. Simulating results showed a phase noise of ?126 dBc/Hz at an offset of 1 MHz and a phasenoise figure of merit of 193 dB while consuming 6 mA from a 0.8 V power supply.     

0.35m SiGe BiCMOS工艺Colpitts振荡器

应用标准0.35μm SiGeBiCMOS工艺设计一个Colpitts压控振荡器并流片。采用线性时变模型(LTV)分析振荡器的相位噪声。在3.3V电源电压下,压控振荡器的频率范围覆盖340～400MHz,10kHz频偏处相位噪声为-91dBc/Hz,输出功率-3dBm。相位噪声的测试结果与理论计算结果符合较好。芯片面积550μm×300μm。     

基于802．11a标准的5GHz振荡器设计

介绍了一种全集成的LC压控振荡器（VCO）的设计。该振荡器的中心频率为5．25GHz,电源电压为1．8V,工作在802．11a标准下,采用0．18μmCMOS工艺实现。仿真结果表明。VCO的相位噪声在偏离中心频率1MHz时达到-121dBc／Hz,调谐范围达到31％,输出电压峰峰值为830mV,有良好的线性纯度。     

Source-injection parallel coupled LC-QVCO

A simple source-injection parallel-coupled (SIPC) LC quadrature voltage controlled oscillator (QVCO) in which the additional noise contributions of the coupling transistors are nearly zero is proposed. The proposed topology is suitable for low phase noise and low supply voltage operation since it involves no additional transistor stacking. Compared to the conventional LC-QVCO, the SIPC topology designed for 2.4 GHz operation shows 19-12 dB improvement in phase noise at 10 kHz-1 MHz frequency offset, from the simulations based on 0.25 /spl mu/m CMOS technology.     

Noise property of a quadrature balanced VCO

A quadrature balanced voltage controlled oscillator (B-VCO) with current source switching is proposed and analyzed. This letter shows analytically that the switching improves the phase noise. A switched transistor is also used as a coupling transistor to generate quadrature signals without degrading the phase noise. To investigate the effect of quadrature coupling on the phase noise, a single B-VCO and a quadrature B-VCO are implemented with identical components in an 0.18-/spl mu/m CMOS process. Both VCO cores draw about 8.8mA under a low bias voltage of 1.8V. The oscillation frequencies are 10.21GHz and 10.81GHz. The measured phase noises of the single at an offset frequency of 1MHz VCO is -114.83 dBc/Hz while that of the quadrature VCO is -116.67 dBc/Hz. The quadrature B-VCO is superior to the single B-VCO with respect to phase noise and oscillation frequency in the X-band.     

A symmetrical 6-GHz fully integrated cascode coupling CMOS LC quadrature VCO

A fully symmetrical integrated quadrature LC oscillator with a wide tuning range of 1.2GHz is presented. The quadrature voltage-controlled oscillator (QVCO) is implemented using a symmetrical coupling method which has been used to produce the large tuning range with a low control voltage and to achieve good phase noise performance in 0.18/spl mu/m complementary metal oxide semiconductor technology. The measured phase noise at 1MHz offset from the center frequency (5.5GHz) is -115 dBc/Hz. The QVCO draws 3.2mA from a 1.8V supply. The equivalent phase error between I and Q signal was at most 0.5/spl deg/.     

Phase-noise analysis of MEMS-based circuits and phase shifters

The effect of Brownian, acceleration, acoustic, and power-supply noise on MEMS based circuits has been calculated for MEMS.-based circuits (phase shifters, delay circuits). The calculations are done for capacitive shunt MEMS switches and metal-to-metal contact series MEMS switches. It is found that these effects result in both an amplitude and phase noise, with the phase noise being around 100× larger than the amplitude noise. The phase noise due to Brownian motion is negligible for MEMS switches with k ≃ 1.0 N/m, g₀ > 2 μm, Q > 0.5, and f₀ ≃ 50 kHz. The effect of acceleration and acoustic noise is negligible for a total acceleration noise of 10 g or less and a total acoustic noise of 74-dB sound pressure level. The power-supply noise depends on the bias conditions of the MEMS element, but is negligible for MEMS switches with a bias voltage of 0 V and a total noise voltage of 0.1 V or less. It is also found that metal-to-metal contact series switches result in much less phase noise than standard capacitive shunt switches. The phase noise increases rapidly for low spring-constant bridges (k = 0.24 N/m), low-height bridges, and bridges with a large mechanical damping (Q < 0.3). Also, varactor-based designs result in 30-40 dB more phase noise than switch-based circuits. This paper proves that microwave passive circuits built using MEMS switches (with a proper mechanical design) can be used in most commercial and military applications without any phase-noise penalty     

新型复合沟道Al0.3Ga0.7N/Al0.05Ga0.95N/GaN HEMT低相位噪声微波单片集成压控振荡器

设计并研制了一种新型复合沟道Al0.3Ga0.7N/Al0.05Ga0.95N/GaN HEMT(CC-HEMT)微波单片集成压控振荡器(VCO),且测试了电路的性能.CC-HEMT的栅长为1μm,栅宽为100μm.叉指金属-半导体-金属(MSM)变容二极管被设计用于调谐VCO频率.为提高螺旋电感的Q值,聚酰亚胺介质被插入在电感金属层与外延在蓝宝石上GaN层之间.当CC-HEMT的直流偏置为Vgs=-3V,Vds=6V,变容二极管的调谐电压从5.5V到8.5V时,VCO的频率变化从7.04GHz到7.29GHz,平均输出功率为10dBm,平均功率附加效率为10.4%.当加在变容二极管上电压为6.7V时,测得的相位噪声为-86.25dBc/Hz(在频偏100KHz时)和-108dB/Hz(在频偏1MHz时),这个结果也是整个调谐范围的平均值.据我们所知,这个相位噪声测试结果是文献报道中基于GaN HEMT单片VCO的最好结果.     

A 0.8 V low power low phase-noise PLL

A low power and low phase noise phase-locked loop(PLL) design for low voltage(0.8 V) applications is presented.The voltage controlled oscillator(VCO) operates from a 0.5 V voltage supply,while the other blocks operate from a 0.8 V supply.A differential NMOS-only topology is adopted for the oscillator,a modified precharge topology is applied in the phase-frequency detector(PFD),and a new feedback structure is utilized in the charge pump(CP) for ultra-low voltage applications.The divider adopts the extende...