Trapping and recombination processes via deep level T3 in semi-insulating gallium arsenide

Trapping and recombination of free carriers by deep level T₃ has been studied. Occupancy of the level by electrons and dynamics of its filling and emptying as a function of illumination with monoenergetic photons in 0.69–1.55 eV range has been monitored by the thermally stimulated currents method. We have found that level T₃ behaves more like a recombination center than like an ordinary electron trap. Besides trapping free electrons from conduction band, this trap can also communicate with valence band, trapping holes. The capture cross section for trapping a hole is estimated to be comparable or even larger than the capture cross section for trapping an electron. However, in many experimental conditions free electrons are generated more abundantly than free holes, and free carrier mobility and thermal velocity are both much higher for electrons than for holes. Therefore, electron trapping often prevails, so that this frequently detected defect, has been up to now most often perceived as a deep electron trap.     

Modeling of electron-hole scattering in semiconductor devices

It is generally assumed in device modeling that the effects of electron-hole scattering can be fully accounted for by a suitable reduction in the electron and hole mobilities with injection level, without modifying the semiconductor device equations themselves. Physical considerations indicate that this is not the case, and that electron-hole collisions introduce a direct coupling between the electron and hole currents. This is determined from first principles, and the results of a Boltzmann calculation are described. The key result is that the impact of an electron-hole scattering event depends on the relative drift velocity between electrons and holes. In low injection, the effective minority-carrier diffusion mobility cannot be assumed to be identical to majority-carrier mobilities or to minority-carrier drift mobilities. In high injection, a reduction in the conductivity mobility does not imply a reduction in the ambipolar diffusion constant. Results for p-i-n diodes are given     

Measurement of effective drift velocities of electrons and holes inshallow multiple-quantum-well p-i-n modulators

We present results on carrier transport in shallow multiple-quantum-well GaAs-Al_xGa_1-xAs p-i-n diodes (x=0.02, 0.04, 0.08) at various bias voltages. We show that only carrier drift and enhanced diffusion dominate response times of these devices. We also emphasize that the drift of holes plays different roles in determining the response times: at low bias, the slow drift of holes adds to enhanced diffusion, slowing down the decay-times; at high bias, the drift time of holes can be comparable to the time of electrons and contribute to the rise-times. From picosecond time-resolved pump/probe electroabsorption measurements, we obtain the drift times, effective drift velocities, and effective mobilities of electrons and holes. The effective drift velocities (especially for holes) appear rather insensitive to the Al concentration in the barriers     

Guest-host active matrix liquid-crystal display using high-voltagepolysilicon thin-film transistors

The construction and addressing of an experimental 30×30 actively addressed guest-host (G-H) liquid-crystal display (LCD) driven by polysilicon-based thin-film transistors (TFTs) is described. The design features are similar to those of high-quality, nonactive matrix addressed G-H displays used in avionics. The driving voltage is 23 V, resulting in a peak load of 46 V across the TFTs during polarity reversals. The triple-gated TFTs exhibited subnanoampere leakage currents at 40 V and mobilities, corrected for dopant diffusion under the gate, of 72 cm²/V-s for electrons and 40 cm²/V-s for holes. Because no polarizers are used, the display has a 180° viewing angle and is highly readable in reflective-, transmissive-, and mixed-mode operations     

Impact ionization and light emission in AlGaAs/GaAs HEMT's

Impact ionization and light emission phenomena have been studied in AlGaAs/GaAs HEMTs biased at high drain voltages by measuring the gate excess current due to holes generated by impact ionization and by analyzing the energy distribution of the light emitted from devices in the 1.1-3.1 eV energy range. The emitted spectra in this energy range can be divided into three energy regions: (i) around 1.4 eV light emission is dominated by band-to-band recombination between cold electrons and holes in GaAs; (ii) in the energy range from 1.5 to 2.6 eV energy distribution of the emitted photons is approximately Maxwellian; and (iii) beyond 2.6 eV the spectra are markedly distorted due to light absorption in the n⁺ GaAs cap layer. The integrated intensity of photons with energies larger than 1.7 eV is proportional to the product of the drain and gate currents. This suggests recombination of channel electrons with holes generated by impact ionization as the dominant emission mechanism of visible light     

Measurement and analysis of hot-carrier-stress effect on NMOSFET's using substrate current characterization

Short-channel NMOSFET degradation is explored by measuring the effect of hot-carrier stress on the substrate and drain currents, with normal and reverse polarities applied. The degradation mechanism can be explained as being, under most conditions, the trapping of electrons in the gate oxide near the stressed drain. This mechanism can explain results which have previously been attributed to trapped holes in the oxide. Two-dimensional simulation of the device characteristics, with the degradation modeled as localized electrons in the oxide, supports this conclusion.     

Radiation-induced space-charge buildup in MOS structures

An analysis of a simple model for radiation-induced space-charge buildup in the SiO2layers of MOS structures has been carried out. The model assumes that hole-electron pairs are created in the SiO2by the radiation and that some of the electrons thus created drift out of the SiO2layer under the action of an applied potential across the oxide, VG, while the corresponding holes become trapped. The diffusion of electrons is assumed to be negligible. The analysis predicts 1) a dependence of charge buildup on radiation doseD, approximately of the form (1 - e^{-beta D}); 2) a linear dependence of the charge buildup on VG, for both polarities of VG; and 3) the dependence of the charge buildup on the total dose absorbed and not on the rate at which the dose was received. Experimental observations on the SiO2layers found in commercial MOS-FET's show good general agreement with the predictions of the analysis. To obtain quantitative agreement, however, it was necessary to assume that the mobility-lifetime product for electrons in the oxide is much lower at the SiO2-Si interface than at the SiO2- metal interface. Other discrepancies were observed but they can be explained as the result of oversimplifications employed in the analysis. In particular, it was necessary to postulate that under some circumstances diffusion of electrons out of the oxide was important and that, in addition to holes, a small number of electrons may be trapped in the oxide in some cases. The space charge was found to accumulate within ≤ 200 Å of the cathode-oxide interface.     

Double injection for weak heating of current carriers

The double injection of electrons and holes in the approximation of weak heating, determined locally by the electric field, is investigated in the p⁺nn⁺-structure, where the heating changes the sign of the ambipolar mobility. The inclusion of the heating changes considerably the field and the carrier concentration distributions as well as the voltampere characteristics (VAC) of long specimens for strong currents. The heating shows itself in fairly long specimens, where the transition to injection breakdown at strong currents is followed by a reduction of specimen voltage drop (a negative differential resistance (NDR)).     

Electrical characteristics of an epitaxial high barrier Schottky diode

A Schottky barrier diode with high barrier height injects minority carriers at the forward biased condition. With injection of minority carriers the current density–voltage characteristics are altered significantly from that of the conventional exponential relationship. A model incorporating drift and diffusion currents for both holes and electrons, carrier recombination within the drift region and also the blocking properties of the low–high (n^- n⁺) interface is developed. The previous works on high barrier Schottky diodes used empirical expressions to combine the high injection model with the low injection model in order to study its behaviour at intermediate levels of injection. Whereas in the present work, a boundary condition is applied to combine the high injection model with an intermediate injection model. To combine an intermediate level model with a low injection level model, another boundary condition is introduced. The present work provides solutions for important physical quantities such as the minority carrier profile and current within the drift region, injection ratio and storage time.     

Enhanced tuning efficiency in tunable laser diodes using type-II superlattices

We propose a type-II AlGaAsSb-AlGaInAs heterostructure superlattice for improved electronically tunable laser diodes exploiting the free-carrier plasma effect. In electronically tunable laser diodes, commonly type-I heterostructure diodes (e.g., GaInAsP-InP) are used as tuning region; however, at equal tuning, the type-II heterostructure superlattices provide the advantage of significantly smaller recombination rates due to the spatial separation of electrons and holes. As a consequence, the required tuning currents can be reduced and the maximum achievable carrier density in an optimized type-II diode can be enhanced by about a factor of two.     

Gate and drain currents in off-state buried-type p-channel LDDMOSFETs

The buried-type p-channel LDD MOSFETs biased at high positive gate voltage exhibit novel characteristics: (1) the ratio of the drain to gate currents is about 1×10^-3 to 5×10^-3; and (2) the gate and drain currents both are functions of only the gate voltage minus the n-well bias. Such characteristics are addressed based on the formation of the surface n ⁺ inversion layer due to the punchthrough of the buried channel to the underlying shallow p-n junction. The measured gate current is due to the Fowler-Nordheim tunneling of electrons from this inversion layer surface and the holes generated within the high-field oxide constitute the drain current. The n⁺ inversion layer surface potential is found to be equal to the n-well bias plus 0.55 V. As a result, both the oxide field and the gate and drain currents are independent of drain voltage     

Drift velocity and diffusivity of hot carriers in germanium: Model calculations

A simple analytical model with two adjustable parameters is employed in describing the drift velocity and longitudinal diffusion coefficient of charge carriers (electrons and holes) in purified germanium, over a wide range of electric field (10-10⁴ V/cm). The effects of the lattice temperature for the range 130–300 K are also considered, and a comparison with experimental data is made. The model may be used for the simulation of the behaviour of germanium devices.     

Self-consistent modeling of resonant interband tunneling in bipolartunneling field-effect transistors

We present a model for the calculation of the tunneling current in resonant interband tunneling devices based on a transfer-Hamiltonian formalism. The model is fully self-consistent and includes electrons and both light and heavy holes. In particular, we show the viability of the bipolar tunneling field-effect transistor as a three-terminal multiple-NDR device with predicted currents reaching over 1000 A/cm² and theoretical peak-to-valley ratios up to 300     

New results on electron injection, hole injection, and trapping in MONOS nonvolatile memory devices

Charge injection and trapping in silicon nitride layers are studied with the three-terminal metal-oxide-nitride-oxide-semiconductor (MONOS) gated-diode structure. A new experimental technique based on the linear voltage ramp is developed which measures electron and hole currents separately in the semiconductor during the actual charge injection (nonsteady-state measurement as opposed to the steady-state method) across the tunneling oxide. In addition, the technique measures the flat-band voltage shift and minimizes the back tunneling of the injected charge (a problem with the pulse measurement). The blocking oxide between the gate electrode and the nitride layer prevents any injection from the gate electrode. The main conclusion from these studies is that the semiconductor injects electrons and holes into the nitride layer for positive and negative polarities of the gate bias, respectively. This result is in sharp contrast with the existing interpretations based on a single-carrier type. It is speculated that the recombination of electrons and holes takes place in the nitride layer via an "amphoteric" trap. At small levels of charge injection, centroids of the trapped charge (measured from the tunneling oxide-nitride interface) for both electron and hole injection conditions are found to be located at 75-80 Å at room temperature and 15-20 Å at 100 K.     

Numerical simulation of evolution of electron-hole avalanches and streamers in silicon in a uniform electric field

Numerical simulation of origination and evolution of streamers in Si is performed for the first time. It is assumed that an external electric field E ₀ is constant and uniform, the avalanche and streamer are axially symmetric, and background electrons and holes are absent. The calculations have been performed in the context of the diffusion-drift approximation with impact and tunneling ionization, Auger recombination, and electron-hole scattering taken into account. The most realistic values of the ionization and recombination rates, diffusion coefficients, and drift mobilities of electrons and holes have been used. It is shown that the features of evolution of avalanches and streamers are generally consistent with the result obtained previously for a hypothetic semiconductor with equal kinetic coefficients for electrons and holes. Asymmetry of these coefficients (mostly, the impact-ionization coefficients) manifests itself only at the initial stage of evolution. However, with time, two exponentially self-similar streamers are formed, differing only in the sign of charge of fronts and directions of their propagation. Empirical dependences of the main parameters of streamers on E ₀ in the range of 0.34–0.75 MV/cm have been derived for this most important stage of evolution.     

The charging and discharging of high-voltage stress-generated trapsin thin silicon oxide

Excess high-voltage stress-generated low-level leakage currents through 10 nm silicon oxides, previously described as DC currents, are shown to decay to the limit of detection given adequate observation time and, thus, have no discernible component. A physical model is presented which describes the majority of the excess low-level leakage currents in terms of the charging and discharging of traps previously generated by the high voltage stress. Excess low-level leakage currents measured with voltage pulses with polarity opposite to that of the stress voltage are found to contain an additional current component, which is explained by the transient charging and discharging of certain traps inside the oxide. Evidence is presented which suggests that an oxide trap generated by the high-voltage stress can contain either a positive or a negative charge, in addition to being neutral and that the traps are located near both oxide interfaces. All of the trap charging and discharging currents can be explained by the flow of electrons into and out of traps generated by the high voltage stress, without resorting to the flow of holes in the oxide     

QHE key to spin electronics and quantum computing

Researchers Shuichi Murakami, University of Tokyo and Shoucheng Zhang, Stanford University may have discovered a spin current associated with holes rather than electrons in semiconductors. The predicted current would be able to inject spin momentum into quantum dots and would interact with conventional electron currents, bridging electronics and spin-based quantum circuits.Visit www.three-fives.com for the latest advanced semiconductor industry news     

衬底热空穴注入下的薄栅氧化层击穿特性

利用衬底热空穴(SHH)注入技术,分别定量研究了热电子和空穴注入对薄栅氧化层击穿的影响,讨论了不同应力条件下的阈值电压变化.阈值电压的漂移表明是正电荷陷入氧化层中,而热电子的存在是氧化层击穿的必要条件.把阳极空穴注入模型和电子陷阱产生模型统一起来,提出了薄栅氧化层的击穿是与电子导致的空穴陷阱相关的.研究结果表明薄栅氧化层击穿的限制因素依赖于注入热电子量和空穴量的平衡.认为栅氧化层的击穿是一个两步过程.第一步是注入的热电子打断Si一O键,产生悬挂键充当空穴陷阱中心,第二步是空穴被陷阱俘获,在氧化层中产生导电通路,薄栅氧化层的击穿是在注入的热电子和空穴的共同作用下发生的.     

Properties of the transient of avalanche transistor switching atextreme current densities

Avalanche transistor switching at extreme currents is studied under conditions in which the charge of the excess carriers drastically rebuilds the collector field domain, causing fast switching and a low residual voltage across the switched-on device. The dynamic numerical model includes carrier diffusion and considers different dependencies of the velocities and ionization rates for the electrons and holes in the electric field. These dependences determine the principal difference in the switching process between n⁺-p-n₀-n⁺ and p⁺-n-p₀ -p⁺ structures. Reasonably good agreement is found between the simulated and measured temporal dependences of the collector current and voltage drop across the device for a particular type of avalanche transistor. Certain differences in the switching delay can partly be attributed to limitations in the one-dimensional (1-D) approach. It is now certain that collector domain reconstruction defines the transient in a n⁺-p-n₀-n⁺ transistor at high currents, but is not very pronounced in a p⁺ -n-p₀-p⁺ transistor. Some nontrivial features of the device operation are found, depending on the semiconductor structure. In particular, it is shown that the thickness of the low-doped collector region affects mainly the switching delay, and does not significantly effect the current rise time     

衬底热空穴注入下的薄栅氧化层击穿特性

利用衬底热空穴 (SHH)注入技术 ,分别定量研究了热电子和空穴注入对薄栅氧化层击穿的影响 ,讨论了不同应力条件下的阈值电压变化 .阈值电压的漂移表明是正电荷陷入氧化层中 ,而热电子的存在是氧化层击穿的必要条件 .把阳极空穴注入模型和电子陷阱产生模型统一起来 ,提出了薄栅氧化层的击穿是与电子导致的空穴陷阱相关的 .研究结果表明薄栅氧化层击穿的限制因素依赖于注入热电子量和空穴量的平衡 .认为栅氧化层的击穿是一个两步过程 .第一步是注入的热电子打断 Si— O键 ,产生悬挂键充当空穴陷阱中心 ,第二步是空穴被陷阱俘获 ,在氧化层中产生导电通路