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一种通用雷达信号模拟器的设计与实现 总被引:14,自引:2,他引:12
分析了雷达信号回波的主要特点,研究比较了多种雷达信号模拟器的体系结构,提出了一种通用雷达信号模拟器的实现方法。该方法采用通用计算机产生雷达回波数据,采用计算机的DMA控制方式完成回波数据的传输,采用D/A变换器产生视频回波信号,并通过锁相环路产生中频回波信号。这种方法具有极大的灵活性和通用性,只要改变计算机的软件,就可以实现不同体制雷达回波的模拟,解决了硬件设计和软件算法中的关键技术问题 相似文献
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《信息通信》2018,(3)
针对雷达调试、性能评估和设备维护等工作中需要进行雷达信号回波模拟的工程实际需求,结合机载PD雷达中频信号处理实验仪的研制,分析建立了包含目标回波、地杂波及干扰的相关数学模型,提出了一种基于PC+DSP+FPGA架构的雷达中频信号回波模拟系统的设计方案及实现方法,完成了硬件、软件及信号控制处理算法的设计。该系统的硬件部分以通用计算机为平台,利用上位机控制FPGA和DSP并通过DDS产生实验仪所需的雷达中频回波信号。实验和应用测试结果表明:实现的回波模拟系统能实现多种信号形式的雷达中频回波信号,信号模式切换灵活,具有控制精度高,系统输出可靠稳定等特点,达到了设计要求。 相似文献
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介绍了一种利用任意波形发生器实现二相编码脉冲压缩雷达的中频模拟信号设计方法。通过软件运用数学方法产生复杂的回波信号与背景杂波及噪声,利用具有高稳定度、高灵活性和再开发能力的任意波形发生器作为硬件载体将其实现并输出。 相似文献
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提出了一种通用雷达信号模拟器的实现方法。该方法采用通用计算机产生雷达回波数据,利用打印机接口实现PC机向外设传送数据,采用D/A变换器产生模拟视频回波信号;它具有极大的灵活性和通用性,只要改变计算机的软件,就可以实现不同体制雷达回波的模拟,解决了硬件设计和软件算法中的关键技术问题。 相似文献
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提出了一种通用雷达信号模拟器的实现方法。该方法采用通用计算机产生雷达回波数据,利用打印机接口实现PC机向外设传送数据,采用D/A变换器产生模拟视频回波信号,它具有极大的灵活性和通用性,只要改变计算机的软件,就可以实现不同体制雷达回皮的模拟,解决了硬件设计和软件算法中的关键技术问题。 相似文献
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线性调频信号数字脉冲压缩技术分析 总被引:3,自引:1,他引:2
在线性调频信号脉冲压缩原理的基础上,利用Matlab对数字脉冲压缩算法进行仿真,得到了雷达目标回波信号经过脉冲压缩后的仿真结果。运用数字脉冲压缩处理中的中频采样技术与匹配滤波算法,对中频采样滤波器进行了优化,降低了实现复杂度,减少了运算量与存储量。最后总结了匹配滤波的时域与频域实现方法,得出在频域实现数字脉冲压缩方便,运算量小,更适合线性调频信号。 相似文献
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电扫三坐标雷达视频模拟 总被引:1,自引:0,他引:1
分析了一维电扫三坐标雷达目标视频回波的特征,尤其是空间的散布特征,并分析给出了一维电扫三坐标雷达目标模拟的数学模型,介绍实现一维电扫三坐标雷达目标视频模拟的一种具体的硬件电路和软件流程。 相似文献
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一种新的多假目标干扰技战术研究 总被引:1,自引:0,他引:1
现代雷达的超低旁瓣、旁瓣对消等空间滤波技术使得旁瓣干扰收效甚微,脉冲压缩和脉冲多普勒等相参雷达体制使得传统非相参干扰的功率损失严重。鉴于此,通过多部干扰机组网形成多方位饱和干扰,利用数字射频存储技术,采用时延和移频调制产生相干假目标,从而对采取旁瓣对消技术的线性调频脉冲压缩雷达产生多方位多批次假目标干扰。分析了多方位饱和干扰和相参多假目标干扰的效果。计算机仿真表明,产生的多方位多批次假目标干扰能够取得较好的干扰效果。 相似文献
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在脉压体制的雷达中,正交插值和脉冲压缩是雷达信号处理的前端,通用的分开处理的方法增加了系统结构的复杂性以及成本的提高.本文通过对正交插值脉冲压缩各种工程实现方法的研究,采用合成算法,在一定条件下简化系统结构并不增加运算量,并通过仿真在理论上讨论其性能和可行性. 相似文献
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Ning Zhang Chwan-Hwa Wu 《Industrial Electronics, IEEE Transactions on》1997,44(5):726-734
The high demand on computation performance by multimedia information processing such as digital video compression and decompression has made multiprocessor computation more and more popular. In this paper, we present our study on adaptive job assignment for multiprocessor implementation of a Motion Picture Expert Group 2 (MPEG2) video encoding algorithm. Data partitioning technique is used for job assignment to the processors in the multiprocessor environment to exploit the data structure adopted by the MPEG standard that divides a frame of a picture into macro blocks (MBs) which are processed independently during encoding. An adaptive data partitioning scheme is developed to cope with the inherent nonuniform spatial distribution of motion activities, such that the computation load distribution over processors is as uniform as possible, which helps improve the speedup of the whole multiprocessor system. Simulations with several video sequences have shown that, in comparison to its nonadaptive counterpart, the adaptive scheme can effectively improve the speedup of the multiprocessor system. In addition, the speedup scales well with the increase of the number of processors used in the computation 相似文献
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Video hashing is a useful technique of many multimedia systems, such as video copy detection, video authentication, tampering localization, video retrieval, and anti-privacy search. In this paper, we propose a novel video hashing with secondary frames and invariant moments. An important contribution is the secondary frame construction with 3D discrete wavelet transform, which can reach initial data compression and robustness against noise and compression. In addition, since invariant moments are robust and discriminative features, hash generation based on invariant moments extracted from secondary frames can ensure good classification of the proposed video hashing. Extensive experiments on 8300 videos are conducted to validate efficiency of the proposed video hashing. The results show that the proposed video hashing can resist many digital operations and has good discrimination. Performance comparisons with some state-of-the-art algorithms illustrate that the proposed video hashing outperforms the compared algorithms in classification in terms of receiver operating characteristic results. 相似文献
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《Signal Processing: Image Communication》2007,22(4):389-402
Traditional video coders use the previous frame to perform motion estimation and compensation. Though they are less complex and have minimum coding delays, these coders lose their efficiency when subjected to scalability requirements. Recent 3D wavelet coders using lifting schemes offer high compression efficiency and scalability without significant loss in performance. The main drawback of 3D coders is that they process several frames at a time. This introduces additional delay, which makes them less suitable for real time applications.In this work, we propose a novel scheme to minimize drift in scalable wavelet based video coding, which gives a balanced performance between compression efficiency and reconstructed quality with less drift. Our drift control mechanism maintains two frame buffers in the encoder and decoder; one that is based on the base layer and one that is based on the base plus enhancement layers. Drift control is achieved by switching between these two buffers for motion estimation and compensation. Our prediction is initially based on the base plus enhancement layers buffer, which inherently introduces drift in the system if a part of the enhancement layer is not available at the receiver. A measure of drift is computed based on the channel information and a threshold is set. When the measure exceeds the threshold, i.e., when drift becomes significant, we switch the prediction to be based on the base layer buffer, which is always available to the receiver. We also developed an adaptive scheme with additional computation overhead at the encoder to decide the switching instance. The performance of the threshold case that needs fewer computations is comparable with the adaptive scheme. Our coder offers high compression efficiency and sustained video quality for variable bit rate wireless channels. This proves that we need not completely eliminate drift and decrease compression efficiency to get better received video quality. 相似文献
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Srivastava M.B. Chandrakasan A.P. Brodersen R.W. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》1996,4(1):42-55
With the popularity of portable devices such as personal digital assistants and personal communicators, as well as with increasing awareness of the economic and environmental costs of power consumption by desktop computers, energy efficiency has emerged as an important issue in the design of electronic systems. While power efficient ASIC's with dedicated architectures have addressed the energy efficiency issue for niche applications such as DSP, much of the computation continues to be implemented as software running on programmable processors such as microprocessors, microcontrollers, and programmable DSP's. Not only is this true for general purpose computation on personal computers and workstations, but also for portable devices, application-specific systems etc. In fact, firmware and embedded software executing on RISC and DSP processor cores that are embedded in ASIC's has emerged as a leading implementation methodology for speech coding, modem functionality, video compression, communication protocol processing etc. This paper describes architectural techniques for energy efficient implementation of programmable computation, particularly focussing on the computation needed in portable devices where event-driven user interfaces, communication protocols, and signal processing play a dominant role. Two key approaches described here are predictive system shutdown and extended voltage scaling. Results indicate that a large reduction in power consumption can be achieved over current day solutions with little or no loss in system performance 相似文献
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A scheme of backward Raman pulse compression is proposed in which the backward first Stokes pulse is amplified under stationary conditions and the backward second Stokes under transient conditions by choosing an appropriate Raman medium. The compression factor and efficiency are improved by insertion of selective absorbers for the second Stokes component. The feasibility of such a scheme is demonstrated by an experiment in which a 249-nm UV pulse of 20-ns duration has been compressed into a 30-ps pulse with an power gain of 150 and energy conversion efficiency of 22%. Higher compression ratio and higher efficiency is expected under improved conditions 相似文献
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