Material failure mechanisms and damage models

This work introduces a tutorial series on material failure mechanisms and damage models to familiarize nonspecialists with the fundamentals of failure mechanisms in engineering assemblies. Since failure is a complicated concept, four simple conceptual models for failure are discussed: stress-strength, damage-endurance, challenge-response, and tolerance-requirement. The specific failure mechanisms depend on material or structural defects, damage induced during manufacture and assembly, and on conditions during storage and field use. Conditions that affect the state of an item are broadly termed stresses (loads), e.g., mechanical stress and strain, electrical current and voltage, temperature, humidity, chemical environment, and radiation. The effects of stresses are influenced by geometry, constitutive and damage properties of the materials, manufacturing parameters, and the application environment     

Investigation of Arrhenius acceleration factor for integrated circuit early life failure region with several failure mechanisms

Use of the Arrhenius equation for analysis of burn-in and life test data has been called into question in recent years. Validity of the Arrhenius activation energy is asserted to be restricted to only one failure mechanism. Therefore, if multiple failure mechanisms apply to an integrated circuit type, the temperature acceleration factor must be complex. In this study a model is constructed using the Weibull distribution for the failure rate applicable when there are multiple failure mechanisms. In this model a different Arrhenius activation energy corresponds to each failure mechanism. It is shown that under conditions expected to be valid for most integrated circuits, an empirical effective Arrhenius activation energy can be computed that is valid for life test data taken under typical conditions to better than 10%. This provides some justification for the continued usage of a simple Arrhenius equation as an empirical model to analyze life test data.     

Modeling bimodal electromigration failure distributions

One of the major tasks in reliability methodology is the correct modeling of electromigration failure distributions. Usually the failures within a sample of test devices are caused by a single physical failure mechanism and the resulting failure distribution can be tight-fitted by a single log-normal distribution. However, it is possible that several failure mechanisms are active within the sample or even one specimen implying multimodal failure distributions. In this paper bimodal log-normal distributions will be discussed, which show two distinct branches as a consequence of two failure mechanisms. In order to describe these failure distributions we use two models – the superposition model and the weak-link model. Both are composed of two log-normal distributions and consider different failure scenarios. We show that they are special cases of one general bimodal model. For each model, coinciding experimental data sets will be presented, which were observed on different via-line structures. The physical failure analysis confirms the model assumptions and supports the bimodal distribution concept.     

Reliability test and failure analysis of high power LED packages

A new type application specific light emitting diode(LED) package(ASLP) with freeform polycarbonate lens for street lighting is developed,whose manufacturing processes are compatible with a typical LED packaging process.The reliability test methods and failure criterions from different vendors are reviewed and compared.It is found that test methods and failure criterions are quite different.The rapid reliability assessment standards are urgently needed for the LED industry.85℃/85 RH with 700 mA is used to test our LED modules with three other vendors for 1000 h,showing no visible degradation in optical performance for our modules,with two other vendors showing significant degradation.Some failure analysis methods such as C-SAM,Nano X-ray CT and optical microscope are used for LED packages.Some failure mechanisms such as delaminations and cracks are detected in the LED packages after the accelerated reliability testing.The finite element simulation method is helpful for the failure analysis and design of the reliability of the LED packaging.One example is used to show one currently used module in industry is vulnerable and may not easily pass the harsh thermal cycle testing.     

The common thread for operational reliability and failure physics

Operational reliability and failure physics constitute the two extreme ends of the reliability engineering spectrum. One critical common thread that ties these two extremes together is stress. Studies that relate failures and failure mechanisms to operational reliability through this common thread have been near non-existent. This paper is an attempt to stimulate interest to fill the gap for electronic systems. Flaws exist in a piece of electronic equipment at the time of manufacture, and stresses exacerbate these flaws to the point of equipment failure. There are no random failures. Every failure is relatable to certain stresses. Estimated flaw population distributions and stress versus time-to-failure characteristics show that electronic equipment failure rates should decrease with respect to time of stress application, such as operating time. Failure rate expressions have been developed for selected stresses (i.e., high temperature, thermal cycling, electrical stresses and vibration) and are discussed in detail in the text. Much more work is still required in equating the quantitative measures of stress to failure rates and operational reliability. This paper will help in paving the way towards that end.     

PCB的腐蚀失效及其分析

通过一个电子辞典用PCB腐蚀失效的分析案例,介绍了PCB的失效现象、分析过程和分析技术．阐述了其失效机理,并提出了相应的改进措施。     

Towards an efficient failure detection in MANETs

Mobile ad hoc networks (MANETs) are characterized by a dynamic topology and generally deployed in a hostile environment with limited resources. As a result, the nodes are more vulnerable and are often subject to failures. Therefore, the design of an efficient failure detector in MANETs is a very challenging issue as the detection is proved to be unreliable. Such an achievement amounts to balance between the performances of the accuracy, the completeness and the resource consumption. We present and discuss in this paper a solution for an efficient failure detection in MANETs. This new protocol, called efficient failure detection for MANETs, exploits different mechanisms to improve the completeness and the accuracy of the detection while reducing the traffic overhead. The number of used timers are limited to two for each node thus reducing the complexity of the algorithm. The simulations performed on NS2 platform show the efficiency of efficient failure detection for MANETs comparing with other protocols. Copyright © 2016 John Wiley & Sons, Ltd.     

MEMS reliability from a failure mechanisms perspective

Over the last few years, considerable effort has gone into the study of the failure mechanisms and reliability of micro-electromechanical systems (MEMS). Although still very incomplete, our knowledge of the reliability issues relevant to MEMS is growing. This paper provides an overview of MEMS failure mechanisms that are commonly encountered. It focuses on the reliability issues of micro-scale devices, but, for some issues, the field of their macroscopic counterparts is also briefly touched. The paper discusses generic structures used in MEMS, stiction, creep, fatigue, brittle fatigue in silicon, wear, dielectric charging, breakdown, contamination and packaging.     

Selected failure mechanisms of modern power modules

This paper reviews the main failure mechanisms occurring in modern power modules paying special attention to insulated gate bipolar transistor devices for high-power applications. This compendium provides the main failure modes, the physical or chemical processes that lead to the failure, and reports some major technological countermeasures, which are used for realizing the very stringent reliability requirements imposed in particular by the electrical traction applications.     

Nano- and micrometer-scale thin-film-interconnection failure theory and simulation and metallization lifetime prediction,Part 2: Polycrystalline-line degradation and bulk failure

The degradation and bulk failure of a polycrystalline interconnect line caused by vacancy electromigration along grain boundaries and vacancy-cluster nucleation at triple points in the bulk conductor are investigated within the general theory of the electromigration-induced degradation and failure of thin-film on-chip interconnect lines, presented in Part 1 [1]. The general equations are tailored to deal with vacancy electromigration, mechanical-stress generation, and void nucleation at triple points. Appropriate boundaryvalue problems are formulated, and numerical methods and procedures to solve them are developed and implemented in software. Computer simulations are performed to identify a pattern of electromigration failure at triple points. On this basis, (1) interconnect lifetime is investigated over wide ranges of variation of material, structural, geometric, and operating parameters, and (2) the current-density and temperature dependence—of the mechanical stress, vacancy concentration, and level of vacancy supersaturation at a triple point, and of void radius and time to nucleation-is examined and explained. The simulation results are found to agree well with previous experiments. This investigation could be seen as a natural continuation of our study of electromigration failures developed by multilevel-metallization systems as a result of interconnect failure near via junctions or at open ends [1]. Together they cover most mechanisms of electromigration failure suffered by metallization systems.     

Solving agreement problems with failure detectors: a survey

This paper surveys problems related to achieving agreement in distributed systems. Various agreement problems can be specified as a variant of the basic consensus problem. Unfortunately, this fundamental problem cannot be solved in asynchronous systems if crash failures can occur. In order to overcome this impossibility result, Chandra and Toueg have augmented the asynchronous system model with the notion of failure detectors. A failure detector is associated with each process of the distributed computation and is responsible for detecting external failures. Suspicions are essentially implemented using time-out mechanisms, which means that (1) the detection of a real failure is usually delayed and (2) a failure detector can make mistakes by incorrectly suspecting a process to have crashed. In this paper, various classes of failure detectors are presented. All are specified by a completeness property and an accuracy property. A completeness property puts a condition on the detection of crashed processes, while an accuracy property restricts the possible mistakes made by a failure detector. After reviewing the hierarchy of failure detector classes, two particular solutions to the consensus problem are examined. In each case, a different class of failure detectors is used. The proposed solutions have liveness properties and deliver their expected results provided that a minimal set of well-defined conditions is satisfied. After a detailed presentation of the consensus problem, various agreement problems are reviewed and their relationship with the consensus problem are underlined. Finally, for each agreement problem, we indicate under which minimum assumptions a solution can be found.     

Mechanism of misalignment failure of liquid-crystal display devices

Misalignment failure mechanisms which are a problem in twisted nematic liquid-crystal display devices were investigated. A life test which changes the driving conditions of the applied multiplexing voltage was implemented for devices which use estercy-clohexane liquid crystals. The life tests showed that misalignment life is longer with a lower voltage, a smaller duty ratio, and a higher frequency. These results are highly appropriate for models with alternating current electrolysis of the liquid-crystal material. In addition, electrostatic capacity and applied voltage properties were used to study the relationship of liquid-crystal dielectric anisotropy and the coupling coefficient with temporal misalignment changes. The coupling coefficient decreases along with misalignment failure     

Mechanism of electromigration failure in submicron Cu interconnects

This paper reports on two different electromigration-failure mechanisms competing in Cu interconnects. Accelerated electromigration tests are conducted on identical single-level, 0.25-μm Cu interconnects with SiN or SiCN passivation. The results indicate that the failure mechanism can vary with the interface condition of the capping layer. The first failure mechanism, seen primarily in SiN-capped samples, is characterized by extensive interface damage, believed to be a result of failure led by interface electromigration. In this failure mode, damage initiates at the capping interface but gradually spreads along all interfaces of the Cu to form an isolated strand. The competing failure mechanism, found in SiCN-capped samples, is characterized by the formation and growth of a localized void without extensive interface damage. The absence of interface damage, in addition to the higher activation energy for failure, suggests that the failure occurs at a more localized inhomogeneity than the interface, such as grain boundaries. While the exact mechanism of how the capping layer suppresses one mechanism and promotes the other is unknown, this study reveals that the passivation-interface material and condition have a decisive role in determining the failure mechanism in Cu interconnects.     

Mapping the failure envelope of board-level solder joints

Single solder interconnects were subjected to a series of combined tension-shear and compression-shear tests to determine their failure load. The failure envelope of these interconnects was obtained by plotting the normal component against the shear component of the failure load. The interconnect failure force map was found to be elliptical like the failure envelopes of many materials. The failure map can be described by a simple mathematical expression to give a simple force-based criterion for combine loading of solder joints. Post mortem analyses were conducted on the solder joint specimens to identify the failure mechanisms associated with various segments of the failure map. Computational simulations of actual board tests show that the failure map obtained for joint tests provides good predictions of board-level interconnect failures and hence suggest that such failure maps are useful in the design and analysis of board assemblies subjected to mechanical loads. The industry could adopt the methodology to obtain failure envelopes for solder joints of different alloys, bump size and reflow profiles which they could later use to aid in board-level and system-level designs of their products for mechanical reliability.     

Effects of microstructure on interconnect and via reliability: Multimodal failure statistics

The reliability of interconnects and contacts depends on their microstructure. However, a large change in the average grain size does not necessarily positively affect reliability. When grain sizes and feature sizes are comparable, interconnect and via reliability depends much more strongly on the nature of the grain size distribution and the probability of occurrence of specific microstructural features, than on the average grain size. Also, when grain sizes and feature sizes are comparable, different microstructure-specific failure mechanisms can occur, and multimodal failure statistics are often observed. In this case, if failure data are incorrectly fit to a single failure-time distribution, the resulting reliability assessment may be pessimistic or optimistic, but is in any case, incorrect. In this regime, accurate reliability assessment requires a detailed knowledge of the microstructure of the interconnects, and a characterization of the failure of the weakest microstructural features present in the population to be assessed.     

Effect of test condition and stress free temperature on the electromigration failure of Cu dual damascene submicron interconnect line-via test structures

Atomic flux divergence (AFD) based finite element analyses have been performed to show the difference in the electromigration (EM) failure mechanisms at different test conditions for Cu dual damascene line-via test structures. A combined driving force approach adapted in the model consists of driving forces from electron-wind, stress-migration and thermo-migration. It is shown that the failure mechanisms depend on the test condition and the stress free temperature of the structure. As the failure time depends on the failure mechanisms, the life-time prediction from accelerated test would be inaccurate if the invariability of failure mechanisms is assumed. It is also found that the interconnect life-time can be improved by lowering the final annealing temperature of the structure.     

The ESD protection mechanisms and the related failure modes and mechanisms observed in SOI snapback nMOSFET's

The objective of this paper is to discuss the characteristics of SOI nMOSFET's that can be exploited to clamp HBM ESD stresses and to explain the related failure modes and mechanism observed in these devices. The influence on the HBM ESD protection capability of the first order main parameter: the nMOSFET gate length is investigated. The ESD protection capability for both positive and negative polarity HBM stresses is elaborated and compared. The ESD clamping and device failure mechanisms limiting the ESD protection performance are identified.     

Recent progress of physical failure analysis of GaN HEMTs

Gallium nitride (GaN)-based high-electron mobility transistors (HEMTs) are widely used in high power and high frequency application fields,due to the outstanding physical and chemical properties of the GaN material.However,GaN HEMTs suffer from degradations and even failures during practical applications,making physical analyses of post-failure devices extremely significant for reliability improvements and further device optimizations.In this paper,common physical characterization techniques for post failure analyses are introduced,several failure mechanisms and corresponding failure phenomena are reviewed and summarized,and finally device optimization methods are discussed.     

The temperature dependence of component failure rate

Data from MIL-HDBK-217B is used to examine the temperature dependence of failure rate of electronic components in actual usage. The dependence is much smaller than expected from the published values of activation energy of component failure mechanisms, or assumed in some commonly used rules-of-thumb.     

Shared risk link group failure restoration with in-band approximate failure localization

This paper proposes a novel failure recovery framework for multi-link shared risk link group (SRLG) failures in optical mesh networks, called failure presumed protection (FPP). The proposed framework is characterized by a failure dependent protection (FDP) mechanism where the optical layer in-band failure identification and restoration tasks for route selection are jointly considered. FPP employs in-band monitoring at each node to obtain on-off status of any working lightpath in case the lightpath is terminated at (or traversing through) the node. Since the locally available failure status at a node may not be sufficient for unambiguous failure localization, the proposed framework reroutes the interrupted lightpaths in such a way that all the suspicious links which do not have 100% restorability under any SRLG failure are kept away. We claim that this is the first study on FDP that considers both failure localization and FDP survivable routing. Extensive simulations are conducted to examine the proposed FPP method under various survivable routing architectures and implementations. The results are further compared with a large number of previously reported counterparts. We will show that the FPP framework can overcome the topological limitation which is critical to the conventional failure independent protection method (e.g., shared path protection). In addition, it can be served as a viable solution for FDP survivable routing where failure localization is considered.