Low-temperature operation of Ge picosecond logic circuits

Low temperature operation of emitter-coupled logic circuits offers potential advantages in reliability, noise immunity, power dissipation, and speed. Experimental picosecond germanium integrated circuits exhibit significant improvements in delay with moderate cooling, in contrast to observed degradation in the performance of comparable silicon circuits. The results of a study of the design factors and performance of germanium circuits at low temperatures are described, with comparisons to silicon. The effect of temperature on circuit propagation delay is emphasized. Brief discussions are included relating observed circuit and transistor temperature dependences to those of more fundamental parameters and processes.     

Ultracompact SOI CMOS frequency doubler for low power applications at 26.5-28.5 GHz

In this paper, a complementary metal oxide semiconductor (CMOS) frequency doubler for wireless applications at Ka-band is presented. The microwave monolithic integrated circuit (MMIC) is fabricated using digital 90 nm silicon on insulator (SOI) technology. All impedance matching, filter and bias elements are implemented on the chip, which has a very compact size of 0.37 mm/spl times/0.27 mm. At an output frequency of 27 GHz, source/load impedances of 50 /spl Omega/, a supply voltage of 1.25 V, a supply current of 8 mA and an input power of -4.5 dBm, a conversion gain of 1.5 dB was measured. To the knowledge of the authors, the circuit has by far the highest operation frequency for a CMOS frequency multiplier reported to date and requires lower supply power than circuits using leading edge III/V and silicon germanium (SiGe) technologies.     

硅光子器件及其集成技术的研究

主要探讨了偏振分集光路、可调光衰减器、波导耦合型锗光电探测器等硅光器件的研究进展,分析了其结构及技术参数,随后探讨了VOA-PD单片集成技术以及VMUX单片集成技术两种硅基单片集成技术,指出硅光子器件的性能指标已经能满足现代光纤通信系统的要求。     

Silicon bipolar integrated circuits for multi-Gb/second opticalcommunication systems

The authors discuss several important circuits for fiber-optic transmission, implemented in an advanced silicon bipolar integrated circuit technology. Specifically, the authors discuss the design considerations and measured performance of a 2:1 multiplexer, front end receiver, limiting amplifier, and decision circuit IC. Also discussed are three hybrid circuit modules: a 2:1 multiplexer, 1:2 demultiplexer, and parallel processing decision circuit. These ICs and hybrid circuit modules operate at multi-Gb/s data rates. The performance of these ICs indicates that advanced silicon bipolar integrated circuits with their high speed, functionality and low cost potential could play an important role in alleviating the electronic bottleneck in future multigigabit optical communication systems     

Design of RF integrated circuits using SiGe bipolar technology

We report on design aspects and the implementation of radio-frequency integrated circuits using TEMIC's SiGe technology. The differences between the device parameters of silicon bipolar junction transistor and silicon germanium heterojunction bipolar transistor technology and their influence on IC design are discussed. Design and measurement results of RFICs, including low noise amplifier, power amplifier, and single-pole, double-throw antenna switch for application in a 1.9 GHz digital enhanced cordless telecommunications RF front end are presented     

A metallisation providing two levels of interconnect for beam-leaded silicon integrated circuits

A two-level-metal structure is described for beam-leaded silicon integrated circuits. The two-level structure consists of a Ti-Pt first level, plasma-deposited silicon nitride as interlevel dielectric, and Ti-Pt-Au as a second level. The Ti-Pt layers of both levels are sputter deposited. Sputter etching is used for pattern definition of the Pt layer of the first level and the Pt-Au layers of the second level. Two examples are presented of the application of the structure to bipolar integrated circuits. One is a LSI circuit consisting of a 24/spl times/9-bit sequential access memory implemented in a Schottky I/SUP 2/L technology and the other is a seven-gate inverter implemented in a standard buried collector technology.     

Emerging multigigahertz digital and mixed-signal integratedcircuits targeted for military applications: dependence on advancedelectronic packaging to achieve full performance

A revolution is occurring in several device and integrated circuit technologies (silicon CMOS and its extensions such as silicon germanium and silicon on insulator [SOI] and the so-called III-V compound semiconductors including indium phosphide and gallium arsenide), as well as in solid-state sensors such as infrared detectors enabled by the new materials and devices. These new components are being used to enhance the performance of many systems, and even to create systems never before available, of present interest to the U.S. Department of Defense and of likely near-term interest to parts of the commercial electronics industry such as the landline, wireless, and satellite telecommunications industry. These new components require advanced electronic packaging that does not restrict or degrade their performance. Unfortunately largely due to commercial cost pressures, research in and small-lot manufacture of high-performance packaging though still feasible and not lacking for good ideas for possible enhancement, are no longer being actively pursued either by the principal U.S. government agencies (e.g., DARPA, Air Force), by the commercial electronic packaging industry, or by commercial consortia such as the Microelectronics and Computer Technology Corporation (defunct as of June 2000), Semiconductor Research Corporation (SRC), or Sematech Inc. This paper discusses recent examples of high-performance components and integrated circuit technologies and describes how they are being exploited in new or upgraded systems. Advances in packaging technology that will be required to support the new integrated circuits are also described. In conclusion, several possible approaches are reviewed by which the United States can regain momentum in the development of performance-driven packaging technologies     

Process technology for radiation-hardened CMOS integrated circuits

A process technology for radiation-hardened CMOS integrated circuits has been defined. Process parameters for the SiO/SUB 2/ gate insulator have been optimized for radiation hardness, and circuit latch-up due to parasitic p-n-p-n structures on the integrated circuits has been prevented by gold-doping the silicon substrate to reduce carrier lifetime. The device yields for the hardened technology have been evaluated and the reliability has been characterized by bias-temperature life testing.     

Integrated circuit design for physical unclonable function using differential amplifiers

A physical unclonable function (PUF) based on process variations on silicon wafers is a very promising technology which finds various applications in identification and authentication, but only a few integrated circuits have been reported so far. As those circuits are vulnerable to power supply noises, switching noises and environmental variations, they lead to a reliability issue such as time-varying or metastable responses. To resolve this issue, this letter proposes a new integrated circuit design for PUFs using differential amplifiers. The feasibility of the proposed circuit has been theoretically analyzed and validated through HSPICE simulations for the previous and proposed circuits.     

GaAs HBT's for analog circuits

Silicon bipolar integrated circuit (IC) technology has dominated the analog IC world for over two decades. As the push for wider bandwidths with higher precision continues, the emergence of GaAs HBT technology is destined to challenge silicon bipolar's domination at the high end of the analog market. This paper discusses the analog application areas best suited to GaAs HBT technology, points out its unique characteristics for analog circuits, describes the design issues for key analog building block circuits, and provides comparative examples of demonstrated state-of-the-art analog circuits. Finally, a projection of future direction in this application area is provided     

Interconnection and packaging of solid-state circuits

The growing interaction between the technologies used to interconnect and package solid-state circuits, the circuit design process, and the performance of such circuits in a system or subsystem is reviewed. The nature of this interaction is discussed at all levels of interconnection and packaging for silicon integrated circuits, and examples of novel developments which present further opportunities to the circuit designer are given. Particular attention is given to the emerging multichip module packaging concept, which offers a similar level of circuit complexity and integration to wafer-scale integration     

Electromigration behavior analysis of aluminum alloys thin film conductors using maximum likelihood methods

Advances in integrated circuit fabrication technology over the past two decades have resulted in integrated circuits with smaller device dimensions and larger area and complexity.Due to this technology evolution, Electromigration became a major reliability concern in silicon VLSI circuits.Various Electromigration test structures are presented, to illustrate the interrelationship of current density, test structures geometry and material, and the Electromigration phenomena. Bayesian (non-classical) procedures have been applied to analyze the results of conventional Electromigration accelerating life tests.This enables to optimize the numerical results on the base of the results data.     

单片集成MEMS中的阳极键合工艺

分析了阳极键合工艺的原理及其工艺条件对CMOS电路的影响，并通过理论分析和实验研究了单片集成MEMS中的两种阳极键合方法：对于玻璃在硅片上方的键合方式，通过在电路部分上方玻璃上腐蚀一定深度的腔及用氮化硅层保护电路可以在很大程度上减轻阳极键合工艺的影响；而玻璃在硅片下方的键合方式，硅片上的电路几乎不受阳极键合工艺的影响，两种方法各有优缺点。     

A broad-band lumped element analytic model incorporating skin effect and substrate loss for inductors and inductor like components for silicon technology performance assessment and RFIC design

We present a broad-band lumped element planar inductor model that is suitable for RFIC design in silicon technologies. We provide extensions of the modeling methodology to similar components such as differential inductors, baluns, and solenoid inductors. The analytic computation of the physics-based model components, incorporating both metal skin effect and substrate loss, is described. The model is validated using measured data from over 200 inductors made with five different silicon back-end process technologies. The physics-based implementation of the model allows its use for determining the optimum process technology characteristics for specific radio frequency integrated circuit (RFIC) designs. The analytical based implementation with lumped elements enables effective integration into a robust CAD system for efficient design of RFIC circuits.     

Reducing photoelectric response when functionally trimming with lasers

A laser processing technology has been developed that dramatically reduces, or virtually eliminates, laser-induced performance shift of a device during functional trimming. While functional laser trimming of monolithic integrated circuits and thick-film hybrid circuits has been used for over 20 years to improve yields and device performance, photoelectric response in the silicon itself to the conventional wavelengths created long delays in processing and even circuit latch-up. The answer to these problems turned out to be an alternative laser wavelength which is absorbed well by both thin-film and thick-film resistor materials but is "invisible" to silicon-based structures. This paper describes the results obtained by using the 1.3-/spl mu/m wavelength of a diode-pumped Nd:YLF laser for trimming deposited, thin-film-on-silicon integrated circuits and the 1.3-/spl mu/m wavelength of Nd:YAG laser for screen-printed, thick-film hybrid circuits. The trimming, or "tuning" of thin-film-on-silicon circuits with a low-power version of the alternative wavelength has permitted both the shrinking of resistor geometries and the expansion of the types of circuits that can be functionally tuned. Secondly, the advent of higher laser power output of the same wavelength has eliminated the photoelectric response problems associated with functionally laser trimming hybrid and multichip module circuits that incorporate silicon devices in their construction. Results are given from actual production devices.     

A three-dimensional high-throughput architecture usingthrough-wafer optical interconnect

This paper presents a three-dimensional, highly parallel, optically interconnected system to process high-throughput stream data such as images. The vertical optical interconnections are realized using. Integrated optoelectronic devices operating at wavelengths to which silicon is transparent. These through-wafer optical signals are used to vertically optically interconnect stacked silicon circuits. The thin film optoelectronic devices are bonded directly to the stacked layers of silicon circuitry to realize self-contained vertical optical interconnections. Each integrated circuit layer contains analog interface circuitry, namely, detector amplifier and emitter driver circuitry, and digital circuitry for the network and/or processor, all of which are fabricated using a standard silicon integrated circuit foundry. These silicon circuits are post processed to integrate the thin film optoelectronics using standard, low cost, high yield microfabrication techniques. The three-dimensionally integrated architectures described herein are a network and a processor. The network has been designed to meet off-chip I/O using a new offset cube topology coupled with naming and renting schemes. The performance of this network is comparable to that of a three-dimensional mesh. The processing architecture has been defined to minimize overhead for basic parallel operations. The system goal for this research is to develop an integrated processing node for high-throughput, low-memory applications     

A compatible technique for the formation of thin tantalum film resistors on silicon integrated circuits

A problem in the production of silicon integrated circuits has been yield limitation and applicability restriction due to the large variation and temperature sensitivity of diffused silicon resistors. Use of a thin-film resistive complement on silicon integrated circuits improves performance of many microcircuits heretofore made by the silicon planar process alone. The technique for thin-film on silicon integrated circuits is based on a two-metal resistor-conductor system: tantalum and aluminum. Tantalum was selected as the resistive material because it can be cathodically sputtered with ease, and a wide range of specific resistivity is available as a result of the controlled energy sputtering technique. The process involves production of the active element part of the circuit with standard silicon integrated circuit planar techniques, including contacting the cuts with deposited aluminum. The only deviation from the standard process lies in leaving some unetched SiO2surface area for resistor deposition. Tantalum is cathodically sputtered over the wafer, and delineated by standard photolithographic techniques to form resistor, conductor, and pad areas. A second layer of aluminum is then vacuum deposited over the wafer, and this is delineated to cover the pad and conductor areas of the tantalum with a high conductivity overlay. The exposed tantalum is then thermally stabilized and the final sheet resistivity adjusted by the resulting controlled sheet resistivity increase. The resulting circuits contain stable resistors with tolerance distributions of ±5 percent to ±10 percent, and TCR of -200 to -300 PPM/°C. The silicon active elements in the circuits do not degrade as a result of the thin-film resistor formation.     

Semiconductor diode amplifiers and pulse modulators

The reverse recovery characteristic of a semiconductor diode depends not only on the crystal properties and the physical dimensions of the diode but also on the circuit in which it is used. The effects of the circuit parameters, namely, forward current, reverse voltage and reverse loop impedance, on the diode recovery characteristics were studied experimentally on germanium and silicon junction diodes. The results are given in curves which illustrate the relationships between these circuit parameters and the maximum reverse current, as well as the constant current duration. Based on these curves, circuit applications were developed. The experiments on a pulse amplifier performed by the National Bureau of Standards, were repeated. The results showed a maximum power gain of 22 db per stage. Four pulse modulator circuits were designed. They are amplitude modulator, sampler, pulse duration and position modulators. Linearity and frequency response tests on these modulator circuits were conducted. The results indicated that they have small distortion and flat frequency response from dc up to several tens of kilocycles per second. Modifications of the pulse amplitude modulator provides amplifiers for continuously varying signals. Four such circuits are given.     

Integrated micromechanical sensors and actuators in silicon

The integrated silicon microsensor and microactuator field is a rapidly developing branch of the microelectronic technology research. The vast potential of these sensors lies in the compatibility with conventional microelectronic circuits in silicon. Special efforts are often required to maintain this fundamental material compatibility, while enabling the fabrication of versatile sensors and actuators. Sensors in silicon are possible for the measurement of many different non-electrical quantities. This overview is focussed on micromechanical sensors and actuators. The basic technologies used for the fabrication of micromechanical structures in silicon are presented with a special emphasis on their compatibility with integrated electronic readout circuits. The performance and the limitations are outlined using several successfully-fabricated integrated sensor and actuator structures.     

A 3.5-mW, 2.5-GHz diversity receiver and a 1.2-mW, 3.6-GHz VCO insilicon on anything

In this paper, first results of radio-frequency (RF) circuits processed in a novel silicon bipolar technology called silicon on anything (SOA) are presented. This technology was developed with the application of low-power, high-frequency circuits in mind. Three test ICs are discussed: a fully integrated 3.6-GHz voltage-controlled oscillator, a fully integrated 2.5-GHz diversity receiver front end, and an intermediate-frequency IC containing channel selectivity and demodulation circuits. Measurement results show that using this technology, significant power savings are possible for RF circuits