Electronically tunable generalized impedance converter structures

New generalized impedance converter (GIC) structures realizable with four and six active components (operational amplifiers (OA) and operational transconductance amplifiers (OTA)) in the grounded and floating configurations, respectively, only three passive elements are derived. The resulting circuits enable a wide range linear tuning of impedance through the control voltage or current of the OTA and are expected to find applications in tunable circuits (filter and oscillator for instance). The viability of the proposed structures has been confirmed by SPICE simulation results. Copyright © 1999 John Wiley & Sons, Ltd.     

可控电抗器APEX大功率运算放大器实现

分析了回转器与电容器实现功率可控电感器存在电阻消耗功率的技术难题。基于目前技术大功率回转器无法实现的问题,提出了用阻抗变换方法实现功率可控电感器(即可控电抗器),给出了可控电抗器运算放大器实现电路,分析了可控电抗器运算放大器实现电路原理和运算放大器的选择。由于可控电抗器运算放大器实现电路中不存在电阻,仅有功耗很低的电容器和A-PEX运算放大器,所以实现可控电抗器具有功耗低的特点。     

Analytical comparison of frequency compensation techniques in three‐stage amplifiers

In this paper, design equations of the most common Nested Miller topologies are derived. Moreover, a coherent and comprehensive analytical comparison among the different topologies is also presented. In particular, after deriving design equations, following the approach previously proposed by the authors that have the phase margin as the main design parameter, the different solutions are compared by evaluating a novel figure of merit that expresses a trade‐off between gain‐bandwidth product, load capacitance and total transconductance, for equal values of phase margin. It is shown that there is no unique optimal solution as this depends on the load condition and the relative magnitude of the transconductance of each stage. From this point of view, the proposed comparison also provides useful design guidelines for the optimization of small‐signal performance. Simulations confirming the effectiveness of the comparison are also given. Copyright © 2006 John Wiley & Sons, Ltd.     

Current differential amplifiers: new circuits and applications

New CMOS current differential amplifiers are proposed suitable for analogue signal processing at high frequencies. They consist of simple current mirrors, which are easy to design and to implement in IC form. Low‐voltage low‐power design is feasible. Relying on these devices a number of applications are obtained, including lossy and lossless integrators, simulated inductors, active filters, and harmonic oscillators. Theoretical expressions are given for all of the proposed new circuits. The verification of the circuits is also achieved by simulation. Copyright 2001 © John Wiley & Sons, Ltd.     

Development and design of wave SC filters

A direct z-domain simulation of LC ladder and unit-element filters by means of wave SC circuits is presented. the development of a wave SC circuit is achieved by interconnecting a limited number of basic SC building blocks. the derived circuits are fully parasitic-free, symmetric and can be optimally designed for dynamic range maximization and capacitance area minimization. the number of operational amplifiers in the simulated unit-element filters is essentially low in comparison to earlier presented parasitic-insensitive wave SC filters and to leap-frog-type SC filters. Four- and two-phase multiplexed simulated LCR filters can be developed. Bilinear s-z transformation applies for all the circuits; thus the design is exact and there is no requirement for a high clock frequency. Filters with transmission zeros can be developed. the simulated responses of various types of filters are in good agreement with the theory. Detailed examples of different designs are given.     

Active RC impedances revisited

The aim of this paper is to review the synthesis, analysis and design of active RC impedances. First of all, major gaps in this classical research topic are identified. Second, a synthesis procedure is outlined to generate op-amp-based circuits which can simulate several classes of impedances of practical interest. From the resulting classification, all circuits are analysed from a perspective wider than those normally used in previous works, yielding some new interesting design conditions. A method is suggested to convert ladder passive prototypes containing either grounded inductors or FDNRs into MOSFET-C equivalent circuits using some of the new structures obtained. Finally, the use of current feedback amplifiers instead of op amps is considered. Experimental results corroborating all our theoretical predictions are incorporated in the work. © 1997 John Wiley & Sons, Ltd.     

Structural generation of two integrator loop filters using CDTAs and grounded capacitors

A versatile family of two integrator loop filter structures using current differencing transconductance amplifiers (CDTAs) and grounded capacitors is generated. The basic filter building blocks consist of current proportional blocks, current lossless integrators and a current lossy integrator based on the use of CDTAs as the major active components. It is demonstrated that the derived filter structures can realize a general class of second‐order current transfer functions. Since the resulting structures contain only CDTAs and grounded capacitors, they are general and very appropriate for integration, cascading and electronic tuning. The influences of the CDTA non‐idealities are also discussed. The functionality of the resulting filters has been verified by simulation results. Copyright © 2009 John Wiley & Sons, Ltd.     

Design methodology for common‐mode stability of OTA‐based gyrators

This paper presents a design methodology for common‐mode (CM) stability of operational transconductance amplifier (OTA)‐based gyrators. The topology of g_m ? C active inductors is briefly reviewed. Subsequently, a comprehensive mathematical analysis on the CM stability of OTA‐based gyrators is presented. Sufficient requirements for the gyrator's CM stability, which easily can be considered during the design process of common‐mode feedback (CMFB) amplifiers, are defined. Based on these stability requirements, a design methodology and a design procedure are proposed. Finally, in order to validate the proposed procedure, a resonator with 20 MHz resonance frequency and a quality factor of 20 is fabricated with UMC 180 nm complementary metal‐oxide‐semiconductor technology, and its CM stability is examined. Copyright © 2015 John Wiley & Sons, Ltd.     

Current-mode multiple-loop feedback filters using dual-output OTAs and grounded capacitors

A systematic method is presented for the generation, analysis and synthesis of current-mode continuous-time multiple-integrator-loop all-pole filters using dual-output operational transconductance amplifiers and grounded capacitors (DO-OTA-GC). The general theory based on a multiple-loop feedback model is formulated. A number of architectures including canonical realizations are developed, with particular emphasis on high-order configurations. A sensitivity analysis method is also given and parasitic effects on the structures are discussed. The general formulations are verified by direct analysis of the generated individual circuits. Design examples are also presented. © 1997 by John Wiley & Sons Ltd.     

Coupling effects between lumped elements [MMICs]

The coupling effects between various lumped elements have shown that the effect on inductors is less than 1% for inductors having reactance of about 50 Ω and separated by 20 μm on a 75 μm thick GaAs substrate. Thus, a distance of 20 μm between lumped elements is safe for monolithic circuits at RF frequencies     

基于物理结构的电感杂散电容计算方法

介绍了一种计算电感杂散电容的解析方法,以电感的物理结构为基础,将电感绕组分割成彼此相同的基本单元,求出基本单元的电容,即可获得单层、多层电感的电容。实验证明计算的精确度令人满意,可对电感的设计和仿真提供帮助。     

基于开关耦合电感单元的Z源逆变器

在常见的几种Z源逆变器拓扑结构的基础上引入一种开关耦合电感单元,提出了基于开关耦合电感单元的Z源逆变器。这种逆变器利用开关耦合电感单元取代传统Z源逆变器中Z源网络的电感,可以提高Z源逆变器电压增益。研究发现,利用的开关耦合电感单元个数越多,开关耦合电感单元一二次侧电压变比越大,Z源逆变器电压增益能力越强。以由2个电压变比都为2的开关耦合电感单元组成的Z源逆变器为例进行了仿真和实验,仿真与实验的结果验证了理论分析的正确性。     

Realization of a general all‐pole current transfer function by using CBTA

In this article, a general all‐pole current transfer function synthesis procedure using current backward transconductance amplifiers (CBTAs) is proposed. The proposed configuration uses n current backward transconductance amplifiers and n grounded capacitors as the only type of passive elements. The circuit is eligible to realize any all‐pole transfer characteristics with a given strictly Hurwitz (stable) denominator polynomial. Further, it is straightforward to find the values of the passive elements from the coefficients of this polynomial by using the Routh–Hurwitz algorithm as in the realization of a two‐element kind passive network synthesis. In this sense and as far as the author's knowledge, it is the only active structure that can be synthesized like a passive two‐element kind Cauer circuit. The simulations that are performed using PSPICE exhibit satisfactory results coherent with the theory. Copyright © 2011 John Wiley & Sons, Ltd.     

Active inductance simulation with grounded condensers

A technique is presented for grounding the condensers of active RC networks, which requires an additional difference amplifier stage per capacitor grounded. A generalized grounded capacitor (GC) circuit is derived for simulating a grounded inductance and it is shown that the GC-versions of the circuits proposed by Prestcott, Rao–Venkateswaran, and Berndt–Dutta Roy form special cases of this circuit. A critical investigation is made of the sensitivity performances and the frequency limitations introduced by the operational amplifiers (OA's).     

Symbolic factorization methodology for multistage amplifier transfer functions

In this paper, we discuss a symbolic simplification methodology to derive approximated factorized forms of the transfer function of multistage amplifiers in the complex frequency domain. The developed approach is useful for hand calculation and is also suitable to be implemented in symbolic computer‐aided design tools. Although the proposed methodology is mainly intended for the analysis and design of operational transconductance amplifiers, it can straightforwardly be applied to the small‐signal analysis of any analog linear circuit. Design examples are provided to verify the effectiveness of the proposed approach implemented through a Matlab function. Copyright © 2015 John Wiley & Sons, Ltd.     

Low‐voltage rail‐to‐rail switched buffer topologies

This paper presents some CMOS rail‐to‐rail low‐voltage (1.2 V) switched buffer topologies, to be used as input stages in switched‐opamp circuits. The main buffer is based on the use of an op‐amp featuring rail‐to‐rail input and output swing with constant transconductance over the input common mode voltage. The designed buffer exhibits a total harmonic distortion of about ‐61 dB for 5 MHz clock frequency with 2 V_pp input amplitude. Its characteristics have been compared with those of other rail‐to‐rail switched buffers, based on the main CMOS OTA (simple, symmetrical, Miller), showing good distortion even at frequencies in the MHz range and satisfying the requirements for the series switches. Copyright © 2001 John Wiley & Sons, Ltd.     

On a class of pseudo‐logarithmic amplifiers suitable for use with digitally switched resistors

This paper describes three circuits that implement pseudo‐logarithmic functions, which are simple and easy to implement. The circuits can be realized using operational amplifiers or current feedback amplifiers. Tuning can be achieved using switched resistors, or active resistors, or tunable transconductors, but are best suited for use with digitally switched resistors. Frequency response and stability considerations for two of the circuits are thoroughly discussed and PSPICE results confirming the theoretical results are presented alongside measured results. Copyright © 2007 John Wiley & Sons, Ltd.     

On the realization of OTA-C filters

A synthesis procedure based on the signal flow graph is given for generating second-order active filters using a minimum number of operational transconductance amplifiers and grounded capacitors. the pole quality factor and pole frequency sensitivities are studied for the proposed filters. Furthermore, the limitations on input signal amplitude are studied and a simple formula is derived for the input signal amplitude not causing clipping and slew-rate-limiting problems.     

有源箝位ZVS-PWM控制串联谐振变换器的研究

对提高有源箝位ZVS PWM控制串联谐振变换器的同步整流效率作了深入而较详尽的分析。为解决输入电压偏离特定值时而导致效率严重下降的问题 ,提出了分立电感和耦合电感的倍流型同步整流电路的两种方案。     

On the two‐port network analysis of common amplifier topologies

Using two‐port network transmission parameters, we derive exact expressions for the voltage/current gains and the input/output impedances of common amplifier topologies. The derived expressions are valid both for BJT and MOS‐based amplifiers and are independent of any particular small signal transistor model. Copyright © 2009 John Wiley & Sons, Ltd.