A realization of a high-frequency monolithic integrator with low power dissipation and its application to an active RC filter

According as the fine LSI process technique develops, the technique to reduce power dissipation of high-frequency integrated analog circuits is getting more important. This paper describes a design of high-frequency integrator with low power dissipation for monolithic leapfrog filters. In the design of the conventional monolithic integrators, there has been a great difficulty that a high-frequency integrator which can operate at low supply voltage cannot be realized without additional circuits, such as unbalanced-to-balanced conversion circuits and common-mode feedback circuits. The proposed integrator is based on the Miller integrator. By a PNP current mirror circuit, high CMRR is realized. However, the high-frequency characteristic of the integrator is independent of PNP transistors. In addition, it can operate at low supply voltage. The excess phase shift of the integrator is compensated by insertion of the compensation capacitance. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator shows that the common-mode gain is efficiently low and the virtual ground is realized, and that moderate phase compensation can be achieved. The simulation results of the 3rd-order leapfrog filter using the integrator shows that the 50 MHz-cutoff frequency filter is obtained. Its power dissipation in operating 2 V-supply voltage is 5.22 mW.     

适宜集成的KHN滤波器设计

为了获得高精度的电压模KHN滤波器,以Deboo积分器为原型,先给出一种高精度、易集成的变形Deboo积分器,再借助Meson公式,用变形Deboo积分器设计出极点频率为31.8 kHz、品质因素为1、通带增益为2的通用电压模KHN滤波器.该电路不仅可同时实现高通、带通和低通输出,且极点频率与品质因素能实现正交、精确调节,电路的参数取决于电阻比,两积分电容接地,因而适合单片集成技术.计算机仿真结果与理论分析一致.     

用对数域电流模式积分器实现的高频集成滤波器

文本提出了全差动对数域电流模式积分器．该积分器的时间常数受参考偏流控制,其直流增益可达60dB,在高频它具有比较平坦的相频特性。用该积分器设计的二阶滤波器和1dB波纹五阶Chebyshev低通滤波器,计算机仿真显示,“实际”频响特性几乎是理想的．且频率可在很宽的范围内调控．这种滤波器具有很低的THD。     

Parasitic compensated switched capacitor circuits

A parasitic-insensitive switched capacitor circuit is presented which can functionally replace the `toggle-switched? capacitor. Its properties are established via an inverting integrator application. A related parasitic-insensitive realisation is also shown for a noninverting integrator, which can provide a 3/2 clock period transmission delay.     

Sampled-data recursive integrator for ultra-low-frequency wideband phase shifter

A simple sampled-data recursive integrator suitable for processing an ultra-low-frequency signal is proposed. The principle for realising the integrator can be extended to a wideband phase shifter by varying the sampling frequency in proportion to the input signal frequency.     

New inverting integrator with imp1roved high-frequency response

A new active compensated inverting integrator is presented. The proposed integrator has a variable phase shift which is controlled by a resistor. This can be conveniently used in active filters to compensate for the excess phase shift of the operational amplifiers.     

插值FIR视频积累器

扫描雷达的最优视频积累器因运算量大而难以实时实现.本文提出了一种新的FIR视频积累器——插值FIR积累器.与最优积累器相比,新积累器运算效率高,舍入噪声小.而且,它与最优积累器具有几乎相同的性能.因而新积累器具有较好的实用性.     

基于微透镜阵列的光束积分系统的性能分析

为了提升高功率固体激光器抽运光束的均匀性,研究了成像型和非成像型光束积分系统光束匀化机理。从光斑尺寸、最大入射角及光斑均匀性三个方面,详细对比了两种积分系统的性能特点。分析表明,成像型光束积分系统不但具有更好的匀化效果,相比非成像型还降低了对半导体激光器(LD)光束准直的要求,并且可调整微透镜阵列间距实现光斑尺寸的改变,拓展了系统应用范围。经实验测试,在照明范围内LD阵列光束经成像型积分系统后光斑不均匀性小于10%。     

Digital integrator design using Simpson rule and fractional delay filter

The IIR digital integrator is designed by using the Simpson integration rule and fractional delay filter. To improve the design accuracy of a conventional Simpson IIR integrator at high frequency, the sampling interval is reduced from T to 0.5T. As a result, a fractional delay filter needed to be designed in the proposed Simpson integrator. However, this problem can be solved easily by applying well-documented design techniques of the FIR and all-pass fractional delay filters. Several design examples are illustrated to demonstrate the effectiveness of the proposed method.     

A 230-nW 10-s time constant CMOS integrator for an adaptive nerve signal amplifier

This paper describes a micropower CMOS integrator with an extremely large time constant for use in a variety of low-frequency signal processing applications. The specific use of the integrator in an implantable biomedical integrated circuit is described. The integrator is based on the OTA-C approach and a very small transconductance of 100 pA/V was achieved by cascading a short chain of transconductance-transimpedance stages. The time constant of the integrator is tunable between about 0.2 and 10 s, and any offset voltages at the output terminal can be trimmed out. The circuit was fabricated in a 0.8-/spl mu/m CMOS process, dissipates 230 nW from /spl plusmn/1.5 V power supplies (excluding the bias circuitry and output buffers) and has a core area of 0.1 mm/sup 2/. The integrator offers superior performance in terms of power consumption, die area and time constant when compared to previously published work.     

Time-interleaved sigma-delta modulator using output prediction scheme

A time-interleaved sigma-delta modulator using the output prediction scheme is proposed. This approach uses only one integrator channel along with incomplete integrator output terms to eliminate the quantizer domino which is a key limit for practical circuit implementation of conventional time-interleaved sigma-delta modulators. In addition, channel mismatch effects due to mismatch within multiple integrator feedback paths can be reduced by optimizing the feedback path. An equivalent two-channel time-interleaved version of the conventional second-order sigma-delta modulator is realized to verify the proposed method.     

Integrator and differentiator with time constant multiplicationusing current feedback amplifier

A set comprising an active RC integrator and differentiator with time constant multiplication is presented. The proposed integrator and the differentiator can be used for low-frequency signal processing applications. Moreover, no extremely large-valued passive components are needed. In the integrator, the unlimited multiplication of time constants is allowed. Both have been implemented using commercially available current feedback amplifiers. Experimental results demonstrate the theoretical predictions     

Novel switched-capacitor generalised integrator

A novel circuit arrangement is proposed for a generalised integrator using the switched-capacitor (SC) technique. This generalised integrator (which integrates with respect to a dependent variable) can easily be constructed in IC form using MOS technology. It possesses some attractive features, for instance simplicity and low cost. It can find applications in many analogue systems such as curve-fitting devices, adaptive filters, RMS convertors etc.     

On distributed order integrator/differentiator

In this paper, we derive the impulse response of the distributed order integrator/differentiator and its asymptotic property by using the complex path integral. Based on the derived analytical impulse response, we present a technique to perform the discretization of the above distributed order integrator/differentiator. The derived asymptotic property can be applied to verify the feasibility of this method. Some new features of the distributed order integrator/differentiator are shown in time and frequency domains. A number of illustrated figures are presented to validate the concepts.     

GaAs FET Current-Mode Integrators and Their Application to Filters

In this paper, current-mode integrators which consist of only n-channel depletion-mode FET and their application to filters are presented. Lossy integrator is simply realized with a capacitor and a grounded gate FET. Lossless integrator can be obtained by providing a lossy integrator with a positive feedback. To do this, multi-output current mirror is proposed. To reduce 2nd-order harmonic and THD of the filter, unbalanced/balanced conversion circuit is proposed. As an application example, 3rd-order leapfrog low-pass Chebyshev filter is simulated with GaAs MESFET process parameters. Simulation results show good performances.     

一种对数域电流模式积分器及其在高频滤波中的应用

提出了一种新颖的对数城电流模式积分器。该积分器的时间常数由参考偏置电流控制。用该积分器设计了二阶带通滤波器和0．1dB纹波三阶Chebyshev低通滤波器。计算机仿真表明，所设计的滤波器实际频响特性几乎是理想的，而且高频谐波失真很小，通频带灵敏度很低，频率在很宽的范围内可控。电路由双极型晶体管和接地电容构成，适合于全集成实现。     

Linear CMOS transconductance element for VHF filters

A differential transconductance element based on CMOS inverters is presented. With this circuit a linear, tunable integrator for very high-frequency continuous-time integrated filters can be made. This integrator has good linearity properties (THD<0.04%, V/sub ipp/=1.8 V), nondominant poles in the gigahertz range and a 40 dB DC gain.<>     

A high-slew integrator for switched-capacitor circuits

A new method for improving the slew rate of a switched-capacitor integrator is introduced. A booster circuit is used to measure the integrator input voltage and then inject a proportionate amount of charge at the integrator output. The boosted integrator significantly reduces the settling time due to amplifier slewing. In addition, the booster has no adverse effect on the noise and stability performance of the integrator. The booster stage increases the total static integrator power by 36% and the total die area by 22%     

开关电容滤波器的计算机辅助分析

开关电容滤波器(SCF)在集成电路中占有极为重要的地位,它具有集成度高,设计精度高,温度稳定性好,并可采用成熟的MOS工艺实现等优点,为了提高电路设计的效率和准确性,计算机辅助分析受到越来越多的重视。 本文采用SPICE电路模拟程序和等效电路变换方法,讨论了对SCF电路进行计算机辅助分析的步骤和方法,并用此方法设计了一个用于脉码调制(PCM)电话系统的D3通道的五阶椭圆低通滤波器,所得结果与传输函数结果一致。     

Micropower log-domain active inductor

An alternative implementation for emulating an active inductor is proposed. Based on a classical gyrator active inductor architecture, the new active inductor is implemented by using a log-domain current integrator instead of a voltage integrator. Inductance and Q-factor can be tuned independently Simulation results confirming the idea are shown. The proposed circuit is a micropower active inductor operating in the weak inversion region of the MOSFETs