Facile polymer gate dielectric surface-modification for organic thin-film transistors using self-assembled surfactant layer

We demonstrate facile polymer gate dielectric surface-modification method for organic thin-film transistors (OTFTs). We simply introduce self-assembled surfactant layer onto the top surface of poly(4-vinylphenol) (PVP) dielectric by spin coating PVP solution mixed with sodium dodecyl sulfate and tridecafluorohexane-1-sulfonic acid potassium salt as additive agents. The surfactant-modified PVP layer acquires various merits compared to pristine PVP layer in terms of surface smoothness and hydrophobicity, as confirmed by contact angle measurement, atomic force microscopy analyses, grazing incident X-ray diffraction and near-edge X-ray absorption fine structure spectroscopy. The resulting OTFTs with the conventional semiconducting poly(2,5-bis(3-hexadecylthiophen-2-yl)thieno[3,2-b]thiophene) as the active layer and surfactant-modified PVP as the dielectric layer reveal overall ascendency over the OTFT with pristine PVP, especially in terms of operating hysteresis and reliability. The effects of hydrophobicity of surfactants on the surface properties of PVP as well as the OTFT performances are fully discussed in conjunction with various characterization tools.     

Solution processable bilayered gate dielectric towards flexible organic thin film transistors

In this study, we have successfully explored the potential of a new bilayer gate dielectric material, composed of Polystyrene (PS), Pluronic P123 Block Copolymer Surfactant (P123) composite thin film and Polyacrylonitrile (PAN) through fabrication of metal insulator metal (MIM) capacitor devices and organic thin film transistors (OTFTs). The conditions for fabrication of PAN and PS-P123 as a bilayer dielectric material are optimized before employing it further as a gate dielectric in OTFTs. Simple solution processable techniques are applied to deposit PAN and PS-P123 as a bilayer dielectric layer on Polyimide (PI) substrates. Contact angle study is further performed to explore the surface property of this bilayer polymer gate dielectric material. This new bilayer dielectric having a k value of 3.7 intermediate to that of PS-P123 composite thin film dielectric (k ∼ 2.8) and PAN dielectric (k ∼ 5.5) has successfully acted as a buffer layer by preventing the direct contact between the organic semiconducting layer and high k PAN dielectric. The OTFT devices based on α,ω-dihexylquaterthiophene (DH4T) incorporated with this bilayer dielectric, has demonstrated a hole mobility of 1.37 × 10⁻² and on/off current ratio of 10³ which is one of the good values as reported before. Several bending conditions are applied, to explore the charge carrier hopping mechanism involved in deterioration of electrical properties of these OTFTs. Additionally, the electrical performance of OTFTs, which are exposed to open atmosphere for five days, can be interestingly recovered by means of re-baking them respectively at 90 °C.     

High performance organic thin film transistors using chemically modified bottom contacts and dielectric surfaces

A compatible process of orthogonal self-assembled monolayers (SAMs) is applied to intentionally modify the bottom contacts and gate dielectric surfaces of organic thin film transistors (OTFTs). This efficient interface modification is first achieved by 4-fluorothiophenol (4-FTP) SAM to chemically treat the silver source–drain (S/D) contacts while the silicon oxide (SiO₂) dielectric interface is further primed by either hexamethyldisilazane (HMDS) or octyltrichlorosilane (OTS-C8). Results show that the field effect mobilities of the bottom-gate bottom-contact PTDPPTFT4 transistors were significantly improved to 0.91 cm² V⁻¹ s⁻¹.     

Megahertz operation of flexible low-voltage organic thin-film transistors

Bottom-gate, top-contact (inverted staggered) organic thin-film transistors with a channel length of 1 μm have been fabricated on flexible plastic substrates using the vacuum-deposited small-molecule semiconductor 2,9-didecyl-dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (C₁₀-DNTT). The transistors have an effective field-effect mobility of 1.2 cm²/V s, an on/off ratio of 10⁷, a width-normalized transconductance of 1.2 S/m (with a standard deviation of 6%), and a signal propagation delay (measured in 11-stage ring oscillators) of 420 ns per stage at a supply voltage of 3 V. To our knowledge, this is the first time that megahertz operation has been achieved in flexible organic transistors at supply voltages of less than 10 V.     

Parylene based bilayer flexible gate dielectric layer for top-gated organic field-effect transistors

In this paper, we report on a bilayer insulating film based on parylene-c for gate dielectric layers in top-gate/bottom-contact inkjet-printed organic field-effect transistors (OFETs) with indacenodithiophene-co-benzothiadiazole (IDTBT) and poly([N,N’-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5’-(2,2’-bitthiophene)) (P(NDI2OD-T2)) as with p- and n-channel semiconductors. The thin parylene-c film (t = 210 nm) show large gate leakage density (2.52 nA/cm² at 25 V) and low breakdown voltage (2.2 MV/cm). In addition, a degraded field-effect mobility (μ) was observed in printed IDTBT and P(NDI2OD-T2) OFETs with the parylene-c single-layered dielectric. X-ray photoelectron spectroscopy (XPS) analysis reveals that the degradation of μ is due to unwanted chemical interaction between parylene-c and the conjugated polymer surface during the parylene-c deposition process. By inserting 50-nm thick poly(methyl-methacrylate) (PMMA) and polystyrene (PS) layer in-between the parylene-c and conjugated polymer film, highly improved gate leakage density and breakdown voltage are achieved. The printed IDTBT and P(NDI2OD-T2) OFETs with a bilayer dielectric compose of parylene-c and PMMA and PS show significantly improved hole and electron μ of 0.47 cm²/Vs and 0.13 cm²/Vs, respectively, and better operation stability. In addition, we demonstrate inkjet-printed polymer complementary inverter with a high voltage gain of 25.7 by applying a PS/parylene-c bilayer dielectric.     

Cardanol-based polymeric gate dielectric for solution-processed organic field-effect transistors on flexible substrates

A cardanol-based polymer, poly(2-hydroxy-3-cardanylpropyl methacrylate) (PHCPM), was utilized as the gate dielectric of an organic field-effect transistor (OFET). PHCPM has good surface properties, appropriate gate dielectric characteristics, and good compatibility with solution-processed semiconducting polymers. The electrical properties of an FET that was prepared with natural resource-based PHCPM as a gate dielectric layer and solution-processed poly[2,5-bis(3-dodecylthiophen-2-yl)thieno[3,2-b]thiophene] (PBTTT) as a semiconducting layer were investigated on flexible substrates. The flexible PBTTT-OFET device with the PCHPM gate dielectric exhibited high mobility and reliable performance, even in the bending state, without significant hysteresis.     

Role of ultrathin Al2O3 layer in organic/inorganic hybrid gate dielectrics for flexibility improvement of InGaZnO thin film transistors

We investigated flexible amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) on a polyimide (PI) substrate by using organic/inorganic hybrid gate dielectrics of poly-4vinyl phenol (PVP) and ultrathin Al₂O₃. IGZO TFTs were fabricated with hybrid PVP/Al₂O₃ gate dielectrics having Al₂O₃ layers of different nanoscale thicknesses, which were deposited by atomic layer deposition (ALD). The electrical characteristics of the TFTs with the organic/inorganic hybrid gate dielectrics were measured after cyclic bending up to 1,00,000 cycles at the bending radius of 10 mm. The ultrathin Al₂O₃ layer in the hybrid gate dielectrics improved the mechanical flexibility and protected the organic gate dielectric against damage during the sputter deposition of the IGZO layer. Finite elements method (FEM) simulations along with the structural characterization of the cyclically bent device showed the importance of optimizing the thickness of the Al₂O₃ layer in the hybrid gate dielectrics to obtain mechanically stable and flexible a-IGZO TFTs.     

聚酰亚胺为栅绝缘层的并五苯场效应晶体管

以真空蒸发的有机半导体材料并五苯为有源层,以旋涂的聚酰亚胺作为栅绝缘层,以真空蒸发的Al为栅、源和漏电极,成功制作了顶接触式并五苯有机场效应晶体管(OFET).测试表明,在源漏电压为70 V时,器件的载流子迁移率μ为0.079 cm2/V·s,器件的开关电流比为1.7×104.     

Performance enhancement of p-type organic thin-film transistors by surface modification of hybrid dielectrics

The quality of the dielectric/organic semiconductor interface is a critical issue, because it determines the charge transport properties in organic thin-film transistors (OTFTs). High-k organic-inorganic hybrid films have received considerable attention for their outstanding dielectric properties, including low leakage currents, high breakdown fields, and suitable band offsets against the organic semiconductor. However, Hf and Zr hybrid gate dielectrics on p-type OTFTs show poor charge transport properties in the organic semiconductor channel, due to the polaron disorder elicited by the high-k properties and the presence of the –N(CH₃)₂ polarity (hole trapper) on the dielectric/semiconductor interface. In this report, the surface of the Hf and Zr hybrid dielectrics was capped by an ultra-thin poly-1,3,5-trivinyl-1,3,5,-trimethyl-cyclosiloxane (pV3D3) layer formed via an initiated chemical vapor deposition (iCVD) process, to modify the hybrid dielectrics/semiconductor interface. The pV3D3-capped Hf and Zr hybrid OTFTs show an enhanced V_T stability while a large amount of V_T shift was observed from the Hf and Zr hybrid OTFTs. This large amount of V_T shift is attributed to the hole trap sites originated by –N(CH₃)₂ on the uncapped hybrid dielectrics. Furthermore, the p-type OTFTs with the pV3D3-capped hybrid dielectrics show a higher mobility than those with the uncapped hybrid dielectrics. The presence of the non-polar/low-k pV3D3 on the hybrids contribute to narrow the density of state (DOS) in the organic channel, improving the charge transport properties. This combined approach using the bulk layer of Hf and Zr hybrid films and the pV3D3 capping layer can overcome the limitations of single-layer hybrid dielectrics and improve the overall device performance of the OTFTs.     

Holography and plasma oxidation for uniform nanoscale two dimensional channel formation of vertical organic field-effect transistors with suppressed gate leakage current

Vertical organic field-effect transistors (VOFETs) with nanoscale channel openings have been fabricated using pentacene as an active layer material. To achieve uniform nanoscale two-dimensional channel openings, a laser holography lithography has been introduced. Uniformly distributed and well-aligned holes with 250 nm diameter were successfully obtained with the laser holography lithography. VOFET devices with these channel openings have shown high on/off ratio of about 10³ without any further treatment. Gate leakage current was also decreased with an additional insulating layer generated on the gate electrode sidewall via plasma oxidation.     

Air-flow navigated crystal growth for TIPS pentacene-based organic thin-film transistors

6,13-Bis(triisopropylsilylethynyl)pentacene (TIPS pentacene) is a promising active channel material of organic thin-film transistors (OTFTs) due to its solubility, stability, and high mobility. However, the growth of TIPS pentacene crystals is intrinsically anisotropic and thus leads to significant variation in the performance of OTFTs. In this paper, air flow is utilized to effectively improve the TIPS pentacene crystal orientation and enhance performance consistency in OTFTs, and the resulted films are examined with optical microscopy, X-ray diffraction, and thin-film transistor measurements. Under air-flow navigation (AFN), TIPS pentacene drop-cast from toluene solution has been observed to form thin films with improved crystal orientation and increased areal coverage on substrates, which subsequently lead to a fourfold increase of average hole mobility and one order of magnitude enhancement in performance consistency defined by the ratio of average mobility to the standard deviation of the field-effect mobilities.     

Optimization of nanocomposite gate insulators for organic thin film transistors

Nanocomposite gate insulators consisting of (Ba, Sr)TiO₃ (barium strontium titanate; BST) nanoparticles and crosslinked poly(4-vinyl phenol) (PVP) polymers were fabricated. Well-dispersed nanocomposite films were prepared by optimizing the BST nanoparticle size sorting process (ultrasound crushing and centrifuge method). The size-sorted BST nanoparticles (∼30 nm in size) were homogeneously mixed in the PVP host polymer in various BST contents, from 0 to 70 wt%, to tune the dielectric constant (κ) of the resulting nanocomposite films. The composite films exhibit three-fold increase in the κ value from 3.9 to 11.3. The physical properties including leakage current and surface roughness of the composites were also measured as a function of the BST loading content and particle dispersion. The relationship between these properties and the electrical performance of the corresponding organic thin film transistor were explored.     

High-performance diketopyrrolopyrrole-based organic field-effect transistors for flexible gas sensors

We demonstrate high-performance flexible polymer OFETs with P-29-DPP-SVS in various geometries. The mobilities of TG/BC OFETs are approximately 3.48 ± 0.93 cm²/V s on a glass substrate and 2.98 ± 0.19 cm²/V s on a PEN substrate. The flexible P-29-DPP-SVS OFETs exhibit excellent ambient and mechanical stabilities under a continuous bending stress of 1200 times at an R = 8.3 mm. In particular, the variation of μ_FET, V_Th and leakage current was very negligible (below 10%) after continuous bending stress. The BG/TC P-29-DPP-SVS OFETs on a PEN substrate applies to flexible NH₃ gas sensors. As the concentration of NH₃ increased, the channel resistance of P-29-DPP-SVS OFETs increased approximately 100 times from ∼10⁷ to ∼10⁹ Ω at V_SD = −5 V and V_GS = −5 V.     

Pentacene thin-film transistors with sol-gel derived amorphous Ba0.6Sr0.4TiO3 gate dielectric

An amorphous Ba_0.6Sr_0.4TiO₃ (BST) film with the thickness of 200 nm was deposited on indium-tin-oxide (ITO)-coated glass substrate through sol-gel route and post-annealing at 500 °C. The dielectric constant of the BST film was determined to be 20.6 at 100 kHz by measuring the Ag/BST/ITO parallel plate capacitor, and no dielectric tunability was observed with the bias voltage varying from −5 to 5 V. The BST film shows a dense and uniform microstructure as well as a smooth surface with the root-mean-square (RMS) roughness of about 1.4 nm. The leakage current density was found to be 3.5 × 10⁻⁸ A/cm² at an applied voltage of −5 V. The transmittance of the BST/ITO/glass structure is more than 70% in the visible region. Pentacene based transistor using the as-prepared BST film as gate insulator exhibits a low threshold voltage of −1.3 V, the saturation field-effect mobility of 0.68 cm²/Vs, and the current on/off ratio of 3.6 × 10⁵. The results indicate that the sol-gel derived BST film is a promising high-k gate dielectric for large-area transparent organic transistor arrays on glass substrate.     

Crosslinked polymer-mixture gate insulator for high-performance organic thin-film transistors

In this paper, we report on the fabrication of a crosslinked polymer-mixture gate insulator for high-performance organic thin-film transistors (TFTs). We used cyanoethylated pullulan (CEP) as a crosslinkable high-k polymer matrix and poly(ethylene-alt-maleic anhydride) (PEMA) as a polymeric crosslinking agent. Because PEMA has a high number of functional groups reactive to the hydroxyl groups of CEP, the use of PEMA is effective for minimizing the amount of remaining hydroxyl groups strongly related to the large current hysteresis and high off current of the organic TFTs. To investigate the potential of the CEP-PEMA mixture as a gate insulator, we fabricated 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C₈-BTBT) TFTs. The C₈-BTBT TFT with the 60 nm-thick CEP-PEMA gate insulator showed excellent TFT performance with a field-effect mobility of 1.4 cm²/V s and an on/off ratio of 2.4 × 10⁶.     

Bias stress effect in solution-processed organic thin-film transistors: Evidence of field-induced emission from interfacial ions

Though bias-stress instability in organic thin film transistors (OTFTs) has been studied in a variety of architectures, it is as yet poorly understood. We have investigated the bias-stress effect in fully solution-processed TIPS-pentacene based OTFTs with polymer dielectric by applying prolonged gate-source voltage (V_GS). The interface is deliberately defect engineered to obtain excellent adhesion and reasonably good steady state characteristics. Both increasing and decreasing behavior of drain-source current (I_DS) drift over 3000s have been observed, and analyzed in terms of electron capture and emission respectively. The step-by-step change in V_GS is compared with the one step change from V_GS = 0V to V_GS = −40V. It has been observed that, for the case of step-wise increase in gate bias, the I_DS transients are slower by many orders of magnitude than if the V_GS is directly switched to deep bias (−40V) in a single step. A phenomenological model is used to explain the I_DS decaying transients. The field induced emission of carriers from interfacial traps is shown to be central to the model and experimental features. The effect due to a prolonged application of drain-source voltage (V_DS) is small, though noticeable in terms of increasing the I_DS only by 3% with continuous application of V_DS for 3000 s.     

Morphology transformations of pentacene on an UV-patternable polymer insulator and their effect on performance of flexible organic thin-film transistors

This work presents a low temperature with high resolution capability UV-patternable polymer, i.e. mr-UVCur06, for use as a gate insulator in OTFTs, by investigating the morphology transformation of pentacene deposited on the mr-UVCur06. The device structure is polyethylene terephthalate (PET)/indium-tin oxide (ITO)/mr-UVCur06/pentacene/Au (source/drain). In addition to its solution-processable capability, mr-UVCur06 is directly patterned by UV light in a low-temperature process. UV/ozone post-treatment of the patternable mr-UVCur06 can illuminate organic contaminants from its surface and increases surface energy. Experimental results indicate that a high surface energy existing at the mr-UVCur06 surface has produced in a larger ratio of I_{thin film phase}/I_{triclinic bulk phase} in pentacene. Then, the distance of pentacene molecular crystal structure, which is arranged in the thin film phase, is shorter than that in triclinic bulk phase. The performance of pentacene-based OTFTs can be enhanced with few contaminants and a high surface energy on the UV-patternable gate insulator. By performing UV/ozone post-treatment on the mr-UVCur06 insulator surface for 60 s, the OTFTs demonstrate a mobility, on/off drain current ratio, and V_T of 0.34 cm²/V s, 5.5 × 10⁴, and 2.5 V, respectively. Furthermore, the low-temperature photopatternable polymer dielectric paves the way for a relatively easy and low-cost fabrication of an OTFT array without expensive and complicated photolithography and dry etching.     

Solution-processed single-crystal perylene diimide transistors with high electron mobility

We have successfully demonstrated a single-crystal field-effect transistors (FETs) based on an asymmetric perylenetetracarboxylic diimide (a-PDI) compound with polystyrene (PS)/SiO₂ bilayer as gate dielectric. The single crystals are in-situ grown on substrate from simple solution evaporation method, thus may be suitable for large area electronics applications. The PS modified gate dielectric could minimize charge trapping by the hydroxyl groups of the SiO₂ surface. The resulting solution processed single crystals transistors are characterized in ambient air, and exhibited maximum electron mobility of ca. 1.2 cm² V⁻¹ s⁻¹ and high I_on:I_off > 10⁵.     

Flexible complementary inverter with low-temperature processable polymeric gate dielectric on a plastic substrate

We report low-temperature processability of poly(4-vinylphenol) based gate dielectric by investigating the effect of composition and processing temperature on the thermal, mechanical and electrical characteristics of the gate dielectric. We found that the processing temperature of the gate dielectric could be reduced up to 70 °C by optimizing the composition of the gate dielectric solution. Based on this finding, we have fabricated a flexible organic complementary inverter by integrating n- and p-type organic thin-film transistors (OTFTs) with the low-temperature processable gate dielectric on a plastic substrate. Pentacene and F16CuPc were used as p-type and n-type semiconductor, respectively. The inverter shows that the swing range of V_out is same as V_DD, which ensures “zero” static power consumption in digital circuits. The logic threshold of the inverter with G5 gate dielectric cured at 70 °C is 21.0 V and the maximum voltage gain (∂V_out/∂V_in) of 8.1 is obtained at V_in = 21.0 V. In addition, we have discussed in more detail the characteristics of the OTFTs and the complementary inverter with respect to the process condition of the gate dielectric.