基于gm/Id参数的CMOS运算放大器设计重用方法

模拟电路的设计重用是提高模拟与混合信号集成电路设计效率的重要途径.本文提出了一种基于g_m/I_d参数的不同工艺之间同一结构电路的设计移植方法.方法的基本思想是保持移植前后电路中部分关键MOS管的g_m/I_d参数,从而使移植后电路的性能也基本保持不变.介绍了基于BSIM等模型的g_m/I_d匹配及移植电路参数确定方法.给出了一个Miller补偿两级运放及一个折叠共源共栅运放从0.35μm工艺到0.18μm、0.13μm、90nm工艺的移植仿真结果.与现有方法相比,本文方法可以更小的计算代价,得到性能基本相同、但功耗与面积缩减的电路.     

A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling

In this paper, we present an efficient approach for technology scaling of MOS analog circuits by using circuit optimization techniques. Our new method is based on matching equivalent circuit parameters between a previously designed circuit and the circuit undergoing redesign. This method has been applied to a MOS operational amplifier. We were able to produce a redesigned circuit with almost the same performance in under 4 h, making this method 5 times more efficient than conventional methods.     

Exploiting bounds optimization for the semi-formal verification of analog circuits

This paper proposes a semi-formal methodology for modeling and verification of analog circuits behavioral properties using multivariate optimization techniques. Analog circuit differential models are automatically extracted and their qualitative behavior is computed for interval-valued parameters, inputs and initial conditions. The method has the advantage of guaranteeing the rough enclosure of any possible dynamical behavior of analog circuits. The circuit behavioral properties are then verified on the generated transient response bounds. Experimental results show that the resulting state variable envelopes can be effectively employed for a sound verification of analog circuit properties, in an acceptable run-time.     

Operational-amplifier compilation with performance optimization

A method for designing analog circuits in which topological design is followed by simultaneous device sizing and layout design is described. By merging circuit and layout design into a single design process, analog circuits can be optimally designed taking layout parasitics fully into account. Using the method, a CMOS operational-amplifier compiler (OAC) has been developed. Given a set of performance specifications and process parameters, OAC generates a layout with circuit performance optimized to meet specified performance constraints. A procedural layout technique is employed to generate a compact and practical layout. A nonlinear optimization method for device sizing which relies on the results of simulations based on the circuit extracted from the layout is applied. Design experiments have shown that OAC can produce satisfactory results with respect to both circuit performance and layout density     

基于拓扑优化的微带天线奇异方向图设计

拓扑优化方法避免了结构的参数化扫描,直接优化材料排布,用于无源微波器件设计,可极大程度拓展设计解域。文中基于拓扑优化方法研究了微带天线的奇异辐射方向图设计。首先分析了具有奇异辐射方向图的伴随敏感度,其次构建了基于过渡边界条件的二维金属优化模型,再次提出了针对奇异辐射的多种目标场函数,分别实现了高增益定向指向波束、等幅双波束和任意方向线极化波束等奇异方向图。为验证算法有效性和准确性,最后加工并测试了具有高增益指向偏转方向图的微带天线,测试结果与拓扑优化结果吻合较好。此方法特别适合具有复杂目标的无源电磁器件设计。     

Gradient-based adjoint-variable optimization of broadband microstrip antennas with mixed-order prism macroelements

This paper describes a new finite element method (FEM)-based adjoint-variable approach to design and optimization of planar microwave circuits using sensitivity analysis, with respect to small variations of their design parameters. The implementation is based on a specially developed class of mixed-order prismatic macroelements, suitable for an efficient analysis of planar microwave structures. Their use, combined with a simple probe feed model, not only reduces the overall computational effort but also facilitates a straightforward derivation of port parameter sensitivities. Explicit expressions are given for the adjoint solution and S-parameter sensitivity and the process is verified through the design and optimization of two slotted broadband microstrip patch antennas.     

Optimization-based multifrequency test generation for analog circuits

A robust test set for analog circuits has to detect faults under maximal masking effects due to variations of circuit parameters in their tolerance box. In this paper we propose an optimization based multifrequency test generation method for detecting parametric faults in linear analog circuits. Given a set of performances and a frequency range, our approach selects the test frequencies that maximize the observability on a circuit performance of a parameter deviation under the worst masking effects of normal variations of the other parameters. Experimental results are provided and validated by HSpice simulations to illustrate the proposed approach.     

Feasible adjoint sensitivity technique for EM design optimization

An adjoint-variable approach to frequency-domain design sensitivity analysis is proposed for the optimization of high-frequency structures with full-wave electromagnetic solvers. We investigate sensitivity estimations based on a feasible perturbation technique which is versatile and requires only minor modifications of existing analysis algorithms. It extends the feasible adjoint-sensitivity technique previously applied in nonlinear microwave circuits to full-wave electromagnetic analysis. The solution to the adjoint problem is obtained with very little overhead once the original problem is solved. The gradient of the objective function is consequently computed through a single analysis regardless of the number of the design parameters. The concept is illustrated through the sensitivity analysis and the design of a Yagi-Uda array and a rectangular patch antenna using suitable method of moments simulators.     

A decomposition approach for testing large analog networks

This article presents an efficient method for testing large scale analog and mixed mode networks. Test equations are derived for a partitioned network from Krichhoff current law equations at the partition points. Voltages at the partition points are used to identify network parameters. The method has applications to circuit modeling, fault diagnosis, testing and calibration. The conventional testing methods for dynamic, nonlinear networks are based on the sensitivity approach, which uses incremental changes in voltages to estimate changes in network parameters. However, this conventional approach cannot handle large scale circuits because the sensitivity matrix is dense. This results in enormous requirements for memory space and computing time when the circuit size becomes large. The new method overcomes these deficiencies of the sensitivity approach. In this article, we introduce the decomposition method, describe its basic features and its algorithm, and compare this method with a conventional, sensitivity technique using testing network examples.This work was supported in part by the National Institute of Standards and Technology, U.S. Department of Commerce, Under Grant No. 70NANBGH0662.     

Efficient sensitivity analysis of transmission-line networks usingmodel-reduction techniques

An efficient algorithm, based on congruent transformation and model reduction, is proposed for evaluation of frequency- and time-domain sensitivity of large linear networks containing lossy coupled transmission lines. The sensitivity of the voltage and current waveforms can be calculated with respect to lumped components and parameters of transmission lines. The algorithm is based on projecting the adjoint network equations on a reduced-order subspace that preserves the circuit moments. The proposed algorithm provides a significant decrease in the computational expense for sensitivity analysis     

精确的短沟MOSFET电路模型及参数提取

给出一套具有较高精度且同时适用于数字电路和模拟电路ＣＡＤ的短沟ＭＯＳ器件直流模型。该模型精确、高效，可移植到ＨＳＰＩＣＥ等通用线路分析软件中。结合解析和数值两种参数提取方法，文中采用局部优化参数提取法进行ＭＯＳ器件参数提取。优化算法采用单纯形直接搜索法。参数提取过程中考虑了输出电导的精确性。通过对１．２μｍＣＭＯＳ工艺ＮＭＯＳ器件的测试及参数提取，并进行模型计算，结果表明理论和实际值符合很好。     

Automatic layout synthesis of analog ICs using circuit recognition and constraint analysis techniques

A systematic method for automatic layout synthesis of analog integrated circuit modules is presented. This method uses analog circuit recognition and critical net analysis techniques to derive proper layout constraints for analog circuit performance optimization. These layout constraints are analyzed and prioritized according to the recognized analog circuit topologies and classified net sensitivities. The weighted constraints are then used to drive the physical layout generation process to obtain a high-quality custom circuit layout. An efficient, constraint-driven analog floorplanning technique based on a zone-sensitivity partitioning algorithm is specially developed to generate a slicing floorplan incorporating the layout constraints. This layout synthesis approach has three key advantages. First, it can produce a satisfactory analog circuit performance with negligible degradation due to the layout-introduced parasitic effects. Second, it allows a complete automation for netlist-to-layout synthesis so that the layout tool can be used by VLSI system designers. Finally, this method is quite general and can be applied to handle a wide variety of analog circuits. Experimental results in CMOS operational amplifiers and a comparator are presented.     

基于RS-PSO-SVM集成的模拟电路软故障诊断

针对模拟电路软故障诊断准确度不高的问题,提出一种基于粗糙集(RS)-粒子群算法(PSO)-支持向量机(SVM)集成的模拟电路软故障诊断方法。首先利用粗糙集理论对采集的模拟电路软故障特征信息进行维数约简,然后利用粒子群算法对支持向量机的参数进行优化,以提高支持向量机分类器的诊断性能,最后进行故障诊断。对四运放双二次高通滤波器进行仿真,实验结果表明,基于RS-PSO-SVM集成的模拟电路软故障诊断方法是有效的。与其他常用方法相比,该诊断方法具有更好的故障诊断性能。     

Soft Fault Diagnosis of Analog Circuit Based on Particle Swarm Optimization

A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization （PSO） is proposed. The parameter deviation of circuit elements is defined as the element of particle. Node-voltage incremental equations based on the sensitivity analysis are built as constraints of a linear programming （LP） equation. Through inducing the penalty coefficient, the LP equation is set as the fitness function for the PSO program. After evaluating the best position of particles, the position of the optimal particle states whether the actual parameter is within tolerance range or not. Simulation result shows the effectiveness of the method.     

A size sensitivity method for interactive CMOS circuit sizing

A new device sizing method for CMOS analog integrated circuit is proposed. This method employs graphical sensitivity curves of certain performance metric with respect to device sizes, called size sensitivity, to guide the designer to choose proper device sizes semi-automatically. It is shown that the plot of sensitivity curves in the frequency-domain can exhibit quantitative performance dependence to device sizes nearby dominant pole/zero locations. For accurate sensitivity calculation, the dependence on dc sensitivity in the computation of ac sensitivity to device size is emphasized and an EKV model-based implementation is outlined. The proposed graphical semi-automatic analog sizing methodology differentiates itself from the traditional black-box approaches with which the user has no interference in the optimization process. An interactive semi-automatic analog sizing tool with a graphical interface allows the user to decide which device sizes are more rewarding to tune. An operational amplifier is sized by using the proposed interactive tool.     

A tunable all-pass MMIC active phase shifter

This paper describes a novel structure for a monolithic-microwave integrated-circuit active phase shifter based on a bridge all-pass network. The design procedure has been developed, leading to a fixed-frequency circuit with large tunable phase variation, associated to a low-gain ripple, and requiring nearly no design optimization. Simulated results predicted an analog tunable 180/spl deg/ phase variation, at 5-GHz operation frequency. The circuit was implemented using GEC-Marconi pseudomorphic high electron-mobility transistor H40 technology, and measured results validated the proposed design method and circuit structure.     

Design of a frequency selective structure with inhomogeneous substrates as a thermophotovoltaic filter

In this paper, the design of a thermophotovoltaic (TPV) filter with high-pass characteristics is presented. The filter is in the form of a frequency selective structure (FSS) with cascaded inhomogeneous dielectric substrates. The goal is to allow for more design flexibility using dielectric periodic structures to deliver a sharper filter response. Therefore, the primary focus is to design a periodic material substrate composition (supporting FSS elements) using a topology optimization technique known as the density method. The design problem is formulated as a general nonlinear optimization problem and sequential linear programming is used to solve the optimization problem with the sensitivity analysis based on the adjoint variable method for complex variables. A key aspect of the proposed design method is the integration of optimization tools with a fast simulator based on the finite element-boundary integral method. The capability of the design method is demonstrated by designing the material distribution for a TPV filter subject to pre-specified bandwidth and compactness criteria.     

A unified theory for frequency-domain simulation and sensitivityanalysis of linear and nonlinear circuits

The harmonic balance technique from nonlinear simulation is extended to nonlinear adjoint sensitivity analysis. This provides an efficient tool for the otherwise expensive but essential gradient calculations in design optimization. The hierarchical approach widely used for circuit simulation, is generalized to sensitivity analysis and to computing responses in any subnetwork at any level of the hierarchy. Important aspects of frequency-domain circuit computer-aided design (CAD) such as simulation and sensitivity analysis, linear and nonlinear circuits, hierarchical and nonhierarchical approaches, voltage and current excitations, or open- and short-circuit terminations are unified in this general framework. The theory provides a basis for the next generation of microwave CAD software. It takes advantage of mature techniques such as syntax-oriented hierarchical analysis, optimization, and yield-driven design to handle nonlinear as well as linear circuits. The sensitivity analysis approach has been verified by a MESFET mixer example, exhibiting a 90% saving of CPU time over the prevailing perturbation method     

Integrated physics-oriented statistical modeling, simulation, andoptimization [MESFETs]

Physics-based modeling of MESFETs is addressed from the point of view of efficient simulation, accurate behavior prediction and robust parameter extraction. A novel integration of a large-signal physics-based model into the harmonic balance equations for simulation of nonlinear circuits, involving an efficient Newton update, is presented and exploited in a gradient-based FAST (feasible adjoint sensitivity technique) circuit optimization technique. For yield-driven MMIC design a relevant physics-based statistical modeling methodology is presented. Quadratic approximation of responses and gradients suitable for yield optimization is discussed. The authors verify their theoretical contributions and exemplify their computational results using built-in and user-programmable modeling capabilities of the CAE systems OSA90/hope and HarPE. Results of device modeling using a field-theoretic nonlinear device simulator are reported     

Analog circuit design optimization based on symbolic simulation andsimulated annealing

A methodology for the automatic design optimization of analog integrated circuits is presented. A non-fixed-topology approach is realized by combining the optimization program OPTIMAN with the symbolic simulator ISAAC. After selecting a circuit topology, the user invokes ISAAC to model the circuit. ISAAC generates both exact and simplified analytic expressions, describing the circuit's behavior. The model is then passed to the design optimization program OPTIMAN. This program is based on a generalized formulation of the analog design problem. For the selected topology, the independent design variables are automatically extracted and OPTIMAN sizes all elements to satisfy the performance constraints, thereby optimizing a user-defined design objective. The global optimization method used on the analytic circuit models is simulated annealing. Practical examples show that OPTIMAN quickly designs analog circuits, closely meeting the specifications, and that it is a flexible and reliable design and exploration tool