All-Inkjet-Printed Bottom-Gate Thin-Film Transistors Using UV Curable Dielectric for Well-Defined Source-Drain Electrodes

Technological restrictions of the inkjet printing technology for printed electronics can hinder its application potential, mainly due to the limited resolution and layer homogeneity in comparison to conventional manufacturing techniques for electronics. The manufacturing of active devices such as thin-film transistors with appropriate performance using printing technologies is still one of the current challenges towards industrial applications. This work demonstrates the application of an ultraviolet (UV) curable ink as insulating material for the gate dielectric. The advantage of the UV curable ink is its fast curing and the smooth surface enabling high resolution patterns on top of it. In this way, all-inkjet-printed organic thin-film transistors (OTFTs) were fabricated with silver electrodes, UV curable gate dielectric, and 6,13-bis(triisopropylsilylethynyl)pentacene for the active semiconductor layer. By fine tuning of processing parameters and pattern geometries, a stable channel length of about 10 μm was obtained in the bottom-gate configuration without the need of additional steps, suggesting a way to build low-cost all-inkjet-printed OTFTs with well-defined source-drain electrodes and fast UV curable dielectric without any additional steps. The inkjet-printed device is characterized by an electron mobility of 0.012 cm² V^?1 s^?1 and on/off ratio of 10³.     

Inkjet printable and low annealing temperature gate-dielectric based on polymethylsilsesquioxane for flexible n-channel OFETs

We report on inkjet printable gate-dielectric based on a spin-on-glass (SOG) material for applications in n-type organic field-effect transistors (OFETs). The SOG material is polymethylsilsesquioxane in alcohol mixture. After annealed at 135 °C in air, the SOG films are well crosslinked and have a good resistance against alcohol, which allows for the inkjet printing of Ag gate electrodes on top of the SOG dielectric. The crosslinked SOG films are very dense, and can withstand high electric field. This is very beneficial to the operation of transistors. In addition, the SOG films have very low hydroxyl content after annealing. This property is very important for n-type transistors. After ink formulation, this SOG dielectric has an excellent inkjet-ability with good uniformity and reproducibility. By using Polyera's P(NDI2OD-T2) as the semiconductor and SOG as the dielectric, bottom-contact top-gated n-type transistors were successfully fabricated on PET substrates with electron mobility above 0.1 cm²/V and high on/off ratio well above 10⁵. These remarkable results demonstrate that this newly formulated SOG dielectric is a promising candidate for the future development of flexible electronic devices.     

Polymer Field‐Effect Transistors Fabricated by the Sequential Gravure Printing of Polythiophene,Two Insulator Layers,and a Metal Ink Gate

The mass production technique of gravure contact printing is used to fabricate state‐of‐the art polymer field‐effect transistors (FETs). Using plastic substrates with prepatterned indium tin oxide source and drain contacts as required for display applications, four different layers are sequentially gravure‐printed: the semiconductor poly(3‐hexylthiophene‐2,5‐diyl) (P3HT), two insulator layers, and an Ag gate. A crosslinkable insulator and an Ag ink are developed which are both printable and highly robust. Printing in ambient and using this bottom‐contact/top‐gate geometry, an on/off ratio of >10⁴ and a mobility of 0.04 cm² V^?1 s^?1 are achieved. This rivals the best top‐gate polymer FETs fabricated with these materials. Printing using low concentration, low viscosity ink formulations, and different P3HT molecular weights is demonstrated. The printing speed of 40 m min^?1 on a flexible polymer substrate demonstrates that very high‐volume, reel‐to‐reel production of organic electronic devices is possible.     

Printed Transistors on Paper: Towards Smart Consumer Product Packaging

The integration of fully printed transistors on low cost paper substrates compatible with roll‐to‐roll processes is demonstrated here. Printed electronics promises to enable a range of technologies on paper including printed sensors, RF tags, and displays. However, progress has been slow due to the paper roughness and ink absorption. This is solved here by employing gravure printing to print local smoothing pads that also act as an absorption barrier. This innovative local smoothing process retains desirable paper properties such as foldability, breathability, and biodegradability outside of electronically active areas. Atomic force microscopy measurements show significant improvements in roughness. The polymer ink and printing parameters are optimized to minimize ink absorption and printing artifacts when printing the smoothing layer. Organic thin film transistors (OTFT) are fabricated on top of this locally smoothed paper. OTFTs exhibit performance on par with previously reported printed transistors on plastic utilizing the same materials system (pBTTT semiconductor, poly‐4‐vinylphenol dielectric). OTFTs deliver saturation mobility approaching 0.1 cm²V^–1s^–1 and on‐off‐ratio of 3.2 × 10⁴. This attests to the quality of the local smoothing, and points to a promising path for realizing electronics on paper.     

R2R gravure and inkjet printed RF resonant tag

The fabrication of passive circuitry by gravure and inkjet printing is studied. A chipless inductively coupled RF resonant tag is analyzed as a test structure. A floating-bridge layout is employed to provide high yield when fabricated by roll-to-roll (R2R) printing. The conducting first layer and insulating second layer are R2R gravure printed with silver nanoparticle ink and a thermally cross-linkable dielectric ink, respectively. Above 10 MS/m conductivity is obtained for the first layer, which passes three times through the 5 m long drying unit at 5 m/min speed. The floating bridge is inkjet printed with silver nanoparticle ink and the prototype tag is measured over a reading distance of ca. 2 cm. An equivalent circuit model is presented and the model parameters are optimized to obtain a best fit to the measured frequency response. This indirect measurement provides an estimate of 4.3 μm for the thickness of the dielectric layer sandwiched between the conducting top and bottom layers. Application possibilities for the all-printed RF resonant tag are outlined.     

A printing technology combining screen-printing with a wet-etching process for the gate electrodes of organic thin film transistors on a plastic substrate

We have developed a practical printing technology for the gate electrode of organic thin film transistors (OTFTs) by combining screen-printing with a wet-etching process using nano-silver (Ag) ink as a conducting material. An Ag film was deposited onto a PVP (polyvinylphenol)-coated PC (polycarbonate) plastic substrate by screen-printing with nano-Ag ink, where Ag content of 20 wt.% was mixed using a terpineol solvent. Subsequently, the film was cured at 200 °C for 60 min, and then finally wet-etched through patterned positive photo-resist masks. The screen-printed Ag electrode exhibited a minimum line width of ∼5 μm, a thickness of ∼65 nm, and a resistivity of ∼10⁻⁶ Ω cm, producing good geometrical and electrical characteristics for a gate electrode. Additionally, it also provided good step coverage with the PVP dielectric layer, and consequently leakage current between the gate and source/drain electrodes was eliminated. Moreover, the electrical characteristic of the screen-printed Ag electrode was not significantly changed even after a bending test in which the Ag electrodes were bent with a bending radius of 6 mm and 2500 iterations of cyclic bending. OTFTs with the screen-printed Ag electrode produced a saturation mobility of 0.13 cm²/Vs and a current on/off ratio of 1.79 × 10⁶, being comparable to those of an OTFT with a thermally evaporated Al gate electrode.     

Highly Customizable All Solution–Processed Polymer Light Emitting Diodes with Inkjet Printed Ag and Transfer Printed Conductive Polymer Electrodes

Inkjet and transfer printing processes are combined to easily form patterned poly(3,4‐ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) films as top anodes of all solution–processed inverted polymer light emitting diodes (PLEDs) on rigid glass and flexible plastic substrates. An adhesive PEDOT:PSS ink is formulated and fully customizable patterns are obtained using the inkjet printing process. In order to transfer the patterned PEDOT:PSS films, adhesion properties at interfaces during multistep transfer printing processes are carefully adjusted. The transferred PEDOT:PSS film on the plastic substrates shows not only a sheet resistance of 260.6 Ω/□ and a transmittance of 92.1% at 550 nm wavelength but also excellent mechanical flexibility. The PLEDs with spin‐coated functional layers sandwiched between the transferred PEDOT:PSS top anodes and inkjet‐printed Ag bottom cathodes are fabricated. The fabricated PLEDs on the plastic substrates show a high current efficiency of 10.4 cd A^?1 and high mechanical stability. It is noted that because both Ag and PEDOT:PSS electrodes can be patterned with a high degree of freedom via the inkjet printing process, highly customizable PLEDs with various pattern sizes and shapes are demonstrated on the glass and plastic substrates. Finally, with all solution process, a 5 × 7 passive matrix PLED array is demonstrated.     

Effects of the Ag content on the geometrical and electrical characteristics of the screen-printed etched gate electrodes of OTFTs using Ag ink

During the fabrication of gate electrodes by Ag ink screen-printing combined with a wet-etching process, the effects of the Ag content on the geometrical and electrical characteristics such as the thickness and surface roughness of gate electrode, step coverage with the gate dielectric, leakage current associated with the step coverage, and the electrical performance of organic thin film transistors (OTFTs) were investigated. An increase of Ag content resulted in the thick and densely-packed Ag electrode, which had a stable and excellent conductivity. But, the large thickness of Ag electrode caused the worse step coverage of PVP (polyvinylphenol) dielectric layer on the edge of the Ag gate electrode, therefore, for Ag contents more than 40 wt.%, MIM (metal-insulator-metal) devices and OTFTs with the Ag gate electrodes had very large leakage current (>10⁻⁴ A/cm²) and off-state current (>∼19 pA/μm) due to the poor step coverage of PVP dielectric layers, respectively. Finally, we found that an Ag content of 20-30 wt.% was suitable for the screen-printed etched gate electrode of OTFTs using Ag ink. This range generated a mobility of 0.18 cm²/V s, an on/off current of 5 × 10⁶, and an off-state current of 0.002 pA/μm, which are suitable to drive e-paper.     

Self‐Organization of Inkjet‐Printed Organic Semiconductor Films Prepared in Inkjet‐Etched Microwells

The high‐precision deposition of highly crystalline organic semiconductors by inkjet printing is important for the production of printed organic transistors. Herein, a facile nonconventional lithographic patterning technique is developed for fabricating banks with microwell structures by inkjet printing solvent droplets onto a polymer layer, thereby locally dissolving the polymer to form microwells. The semiconductor ink is then inkjet‐printed into the microwells. In addition to confining the inkjet‐printed organic semiconductor droplets, the microwells provide a platform onto which organic semiconductor molecules crystallize during solvent evaporation. When printed onto the hydrophilic microwells, the inkjet‐printed 6,13‐bis(triisopropylsilylethynyl) pentacene (TIPS_PEN) molecules undergo self‐organization to form highly ordered crystalline structures as a result of contact line pinning at the top corner of the bank and the outward hydrodynamic flow within the drying droplet. By contrast, small crystallites form with relatively poor molecular ordering in the hydrophobic microwells as a result of depinning of the contact line along the walls of the microwells. Because pinning in the hydrophilic microwells occurred at the top corner of the bank, treating the surfaces of the dielectric layer with a hydrophobic organic layer does not disturb the formation of the highly ordered TIPS_PEN crystals. Transistors fabricated on the hydrophilic microwells and the hydrophobic dielectric layer exhibit the best electrical properties, which is explained by the solvent evaporation and crystallization characteristics of the organic semiconductor droplets in the microwell. These results indicate that this technique is suitable for patterning organic semiconductor deposits on large‐area flexible substrates for the direct‐write fabrication of high‐performance organic transistors.     

Effect of active layer thickness on environmental stability of printed thin-film transistor

We have studied the effect of active layer thickness on the performance and environmental stability of the 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS pentacene) thin-film transistor. The organic thin-film transistors (OTFTs) were fabricated by inkjet printing using a solution based TIPS pentacene. To get thick organic semiconductor, the surface of gate insulator was treated with n-octyltrichlorosilane (OTS-C₈) before jetting. The on-currents of the OTFT with ～1 μm active layer decreases a little in air, but the OTFT with 0.05 μm TIPS pentacene shows a significant degradation in drain currents.     

Polymer Inverter Fabricated by Inkjet Printing and Realized by Transistors Arrays on Flexible Substrates

We have fabricated organic thin-film transistors (OTFTs) and implemented inverters on flexible substrates using polythiophene (PHT) as the semiconductor and polyvinylphenol (PVP) as the gate dielectric. The semiconductor was defined by inkjet printing. The poor consistency of the printing process has affected the uniformity of inkjet-printed OTFTs enormously. We also proposed a method to increase the yield by incorporating a pre-testing step during circuit fabrication. We designed and fabricated a basic unit of circuits called a thin-film transistor (TFT) array. These devices were then connected to each other to form a gate via printed nano-silver. To verify the implementation flow, we designed and measured bootstrap inverters and ring oscillator composed of them. The five-stage ring oscillator has been fabricated and oscillated at the frequency, 60 Hz, when the supply voltage is 40 V      

High-resolution direct-writing of metallic electrodes on flexible substrates for high performance organic field effect transistors

We report on organic field-effect transistors (OFETs) with sub-micrometer channels fabricated on plastic substrates with fully direct-written electrical contacts. In order to pattern source and drain electrodes with high resolution and reliability, we adopted a combination of two digital, direct writing techniques: ink-jet printing and femtosecond laser ablation. First silver lines are deposited by inkjet printing and sintered at low temperature and then sub-micrometer channels are produced by highly selective femtosecond laser ablation, strongly improving the lateral patterning resolution achievable with inkjet printing only. These direct-written electrodes are adopted in top gate OFETs, based on high-mobility holes and electrons transporting semiconductors, with field-effect mobilities up to 0.2 cm²/V s. Arrays of tens of devices have been fabricated with high process yield and good uniformity, demonstrating the robustness of the proposed direct-writing approach for the patterning of downscaled electrodes for high performance OFETs, compatibly with cost-effective manufacturing of large-area circuits.     

Inkjet printed silver nanowire percolation networks as electrodes for highly efficient semitransparent organic solar cells

In this work, we demonstrate inkjet printing of silver nanowires (AgNW) with an average length of 10's of μm using industrial printheads with nozzle diameters in the same size range. The printed silver nanowire mesh reveals uniform distribution and a good balance between conductivity and transmittance, which is comparable to layers fabricated by conventional methods like slot-die or spray coating. Employing a novel AgNW ink formulation based on a high boiling alcohol allows printing directly on PEDOT:PSS and prevents nozzle clogging. Using silver nanowire meshes as bottom and top electrodes, a fully inkjet printed semitransparent organic solar cell with a power conversion efficiency of 4.3% for 1 cm² area is demonstrated, which is the highest value reported so far for fully inkjet printed organic photovoltaic cells.     

High-performance thin-film transistor with 6,13-bis(triisopropylsilylethynyl) pentacene by inkjet printing

We have studied the performance improvement of organic thin-film transistor (OTFT) with a solution based TIPS pentacene (6,13-bis(triisopropylsilylethynyl)pentacene) by inkjet printing. The TIPS pentacene with 1.0 wt.% solution in 1,2-dichlorobenzene was used for printing of an active layer of OTFT. The OTFT printed at room temperature shows a shoulder-like behavior but it disappears for the OTFT printed at the substrate temperature of 60 °C. The OTFT on plastic exhibited an on/off current ratio of ∼10⁷, a threshold voltage of −2.0 V, a gate voltage swing of 0.6 V/decade and a field-effect mobility of 0.24 cm²/Vs in the saturation region.     

A new patterning process concept for large-area transistor circuitfabrication without using an optical mask aligner

A new concept to produce large thin film transistor liquid crystal displays (TFT-LCD's) without using an optical mask aligner is proposed which emphasizes patterning technology. Some experimental thin film transistors (TFT's) are fabricated according to the concept and operated like conventional transistors fabricated by using an optical mask aligner. The concept includes improvement of printing technology and development of a double-layer resist method. The latter method employs a printed ink pattern and a photoresist. This prevents contamination of thin films by metal impurities which affect electrical characteristics of the TFT's. A special gravure offset printing technology is proposed, composed of a large thixotropy valued UV ink, and a fine, precision etched glass intaglio. The experimental TFT's, with a designed minimum gate length of 10 μm, have comparable electric characteristics to those of conventional poly-Si TFT's     

Triacetate cellulose gate dielectric organic thin-film transistors

Here, we report on the performance and the characterization of all solution-processable top-contact organic thin-film transistors (OTFTs) consisting of a natural-resourced triacetate cellulose gate dielectric and a representative hole-transport poly[2,5-bis(3-dodecylthiophen-2-yl)thieno[3,2-b]thiophene] (pBTTT) semiconductor layer on rigid or flexible substrates. The bio-based triacetate cellulose layer has an important role in the OTFT fabrication because it provides the pBTTT semiconducting polymer with highly suitable gate dielectric properties including a low surface roughness, hydrophobic surface, appropriate dielectric constant, and low leakage current. The triacetate cellulose gate dielectric-based pBTTT OTFTs exhibit an average filed-effect mobility of 0.031 cm²/Vs similar to that obtained from a SiO₂ gate dielectric-based OTFT device in ambient conditions. Even after a bending stimulation of 100 times and in an outward bending state, the flexible triacetate cellulose gate pBTTT OTFT device still showed excellent electrical device performance without any hysteresis.     

具有低电压、低“迟滞效应”的C60薄膜晶体管

以C60为激活层,同时以聚合物/高K氧化物双绝缘层结构研制了N型有机场效应晶体管。结果表明,采用这种双层结构的绝缘层能够很好的将Ta2O5和PMMA的优点结合在一起,即既利用了Ta2O5的高介电常数又利用了PMMA与半导体层良好的界面接触特性。与采用单一Ta2O5或这PMMA绝缘层的器件相比,这种具有双层结构的器件性能大幅提升。最终研制了能够在10V低电压下正常工作的C60晶体管,其场效应迁移率、阈值电压和开关电流比分别为0.26 cm2/Vs, 3.2V和8.31×104。同时,利用修饰绝缘层PMMA的疏水性大大降低了这种具有双层结构的N型有机晶体管的“迟滞效应”,从而让器件工作时有较好的稳定性。     

High-resolution inkjet-printed organic thin film transistor array with commercially applicable source-drain electrode process

High-resolution inkjet printing of an organic thin film transistor (OTFT) array for mass-production is still regarded as an immature technology due to the difficulty in controlling the dimension of pattern and registry with other layers in commercial large-scale substrates. Especially, in the case of on organic gate insulator (OGI) in an inkjet-printed OTFT array, it is impossible to use plasma pre-treatment of the OGI for the hydrophobicity required for high-resolution inkjet printing of an organic semiconductor (OSC) due to its non-selectivity between organic layers, both inside and outside the channel area. A novel and commercially applicable process of the source-drain (SD) electrode prior to inkjet printing of the OSC in the bottom contact structure not only allowed a selective plasma treatment for high-resolution inkjet printing of OSC on OGI without the extra photolithographic process, but also protected the channel interface from the harmful outcomes of wet or plasma processes. This method enabled uniform electrical characteristics of more than 300 thousand pixels of an OTFT array for a backplane. Based on these results, a 5.7 inch electrophoretic display (EPD), with a high resolution of 140 dots per inch (DPI), on a plastic substrate was successfully demonstrated.     

Direct writing of inkjet-printed short channel organic thin film transistors

A direct-writing fabrication process for fully inkjet-printed short-channel organic thin-film transistors (OTFTs) has been developed. Channels as narrow as 800 nm between two printed Ag electrodes were achieved by printing a special Ag ink on an SU-8 interlayer, which can be partially dissolved by the solvents used in the Ag ink. The ridge formed along the printed Ag line edges due to redistribution of the interlayer material during the drying process limits the ink spread, and separates neighboring printed lines, and is the key to defining an ultra-narrow channel for transistor fabrication. The short-channel OTFTs fabricated using this technique have demonstrated well-defined linear and saturation regimes. An extracted mobility of 0.27 cm²/Vs with an on/off ratio of 10⁵ was obtained at a driving voltage of −12 V. The excellent performance of these devices demonstrates the potential of this technique in fabrication of short-channel devices using standard printing technologies.     

Degradation of all-inkjet-printed organic thin-film transistors with TIPS-pentacene under processes applied in textile manufacturing

Printed electronics represent an alternative solution for the manufacturing of low-temperature and large area flexible electronics. The use of inkjet printing is showing major advantages when compared to other established printing technologies such as gravure, screen or offset printing, allowing the reduction of manufacturing costs due to its efficient material usage and the direct-writing approach without requirement of any masks. However, several technological restrictions for printed electronics can hinder its application potential, e.g. the device stability under atmospheric or even more stringent conditions. Here, we study the influence of specific mechanical, chemical, and temperature treatments usually appearing in manufacturing processes for textiles on the electrical performance of all-inkjet-printed organic thin-film transistors (OTFTs). Therefore, OTFTs where manufactured with silver electrodes, a UV curable dielectric, and 6,13-bis(triisopropylsilylethynyl) pentance (TIPS-pentacene) as the active semiconductor layer. All the layers were deposited using inkjet printing. After electrical characterization of the printed OTFTs, a simple encapsulation method was applied followed by the degradation study allowing a comparison of the electrical performance of treated and not treated OTFTs. Industrial calendering, dyeing, washing and stentering were selected as typical textile processes and treatment methods for the printed OTFTs. It is shown that the all-inkjet-printed OTFTs fabricated in this work are functional after their submission to the textiles processes but with degradation in the electrical performance, exhibiting higher degradation in the OTFTs with shorter channel lengths (L = 10 μm).