Memristive retinomorphic grid architecture removing noise and preserving edge

In this paper, special memristor circuit and memristive retina network structure for analogue image processing have been presented. The new developments on memristor element have opened various possibilities due to its being in nano-scale and having nonlinear behavior. The proposed memristor emulator consists of only one Operational Transconductance Amplifier (OTA) and two MOS transistors which are operated in sub-threshold region. The memristor fuse structure is obtained by connecting two proposed memristor emulators. In the second section of our paper, we proposed a circuit block which is composed of 16 × 16 pixels retinomorphic memristive grid to maintain a smoothed and edges preserved image. All simulation results for both proposed memristor circuits and retinomorphic grid are obtained as expected.     

基于FPGA的二值忆阻器仿真器研究及应用

基于FPGA的可重构性,提出了一种基于数字电路的二值忆阻器仿真器。与模拟电路忆阻器仿真器相比,所提出基于数字电路的忆阻器仿真器易于重新配置,与它所基于的数学模型表现出很好的匹配性,符合忆阻器仿真器所有要求的特点。实现了基于该仿真器的与门、或门、加法器及三人表决器。使用Altera Quartus II和ModelSim工具对仿真器功能和基于该仿真器实现的逻辑电路进行验证。给出所有设计电路的原理图、仿真结果和FPGA资源消耗。仿真结果表明,该二值忆阻器仿真器相比其他数字电路忆阻器仿真器具有更少的硬件资源消耗,更适合用于大规模忆阻器阵列研究。     

A new DDCC based memristor emulator circuit and its applications

Memristor is a new passive circuit element. The interaction of the memristor with other circuit elements is important for designers. In this paper, new memristor emulator circuit is designed using DDCC (differential difference current conveyor) based on CMOS. It is realized that the proposed emulator causes less complexity compared to other designed emulator circuits. Compatibility of memristor with CMOSs and its operation ability at high frequencies are very important for circuit design based on memristor. The emulator based on CMOS can manage to provide these two fundamental properties successfully. In order to test the proposed emulator, it is connected to memristor with both ways, serial and parallel, than MC circuit is analyzed and results are shown at the end of the paper.     

Fully electronically tunable sinusoidal oscillator employing single VDTA and all grounded components

Analog Integrated Circuits and Signal Processing - In this paper a robust design of a dual mode grounded memristor using single output operational transconductance amplifier (OTA) and differential...     

On the realization of electronically current-tunable CMOS OTA

A CMOS operational transconductance amplifier (OTA) called as an EOTA, where its transconductance gain can be electronically and linearly tuned is proposed in this paper. The realization method is achieved by squaring the transconductance gain of the balanced CMOS OTA. The EOTA transconductance gain can be linearly tuned by an external bias current for three decades. The linear input-voltage range of about 1 Vp with less than 1% nonlinearity is obtained. The usefulness of the proposed EOTA is demonstrated through application example with a current multiplier. The performance of the proposed circuit is discussed and confirmed through PSPICE-simulation results.     

Floating memristor emulator with subthreshold region

Memristor which is recently discovered and known as missing circuit element is an important for memory, nonlinear and neuromorphic circuit designs. Modeling of memristor devices is essential for memristor based circuit design. In this paper, compact memristor which has high memristance value is introduced. The simulations are completed in LTspice program and expected results are obtained applying sinusoidal. Two memristor emulators are connected in serial, in parallel and promising results presented. The simulation results of applying positive pulse train to both of terminals of memristor are showed. The simulations of the proposed emulator showed the expected memristor characteristics.     

New grounded passive elements-based external multiplier-less memelement emulator to realize the floating meminductor and memristor

A novel memelement emulator configuration has been reported in the presented work. This proposed configuration can be used to realize the function of a floating meminductor as well as the memristor element through proper selection of employed passive elements. The presented emulator circuit is based on MVDCC (modified VDCC) and OTA, which are CMOS implemented electronically tunable ABBs (Active Building Blocks). The designed circuit employs only two ABBs and three grounded passive elements. As per the knowledge of the authors, no such emulation configuration with a floating architecture has been reported so far, which can realize the behaviour of two mem-elements without the use of any external multiplier IC/circuitry, passive inductor or mutation through any externally employed memelement. It can be considered as a notable design feature along with its other advantages like electronically/resistively tunable emulated response and use of only grounded passive elements. Moreover, proposed circuit has been investigated for the consideration of non-idealities and different port parasitics of employed blocks. For the verification purpose, PSPICE simulation environment with CMOS 0.18 µm TSMC technology parameters, has been selected. The functioning of the realized meminductive and memristive behaviour has also been verified through the application example circuits designed using developed emulator circuit. Afterwards, the commercial IC based realization of the proposed emulator circuit has been shown and experimental results are discussed.

     

非对称忆阻诱导的吸引子非对称演化与机理研究

紧磁滞回线是评测物理器件或数学模型是否为忆阻的关键依据,其对称特性也是忆阻的重要特征之一。该文提出一种有源非对称忆阻二极管桥模拟器,它通过改变二极管桥中并联二极管的数量可实现紧磁滞回线非对称度的控制。首先,验证了该非对称忆阻模拟器的指纹特征,并着重探讨了激励频率和对称度控制参数对紧磁滞回线非对称度的影响。进一步地,将该非对称忆阻模拟器耦合到Sallen-Key高通滤波器,构建了一种无感忆阻蔡氏电路;建立了相应的无量纲系统,并揭示了系统吸引子的非对称演化现象。结合平衡点稳定性分析、分岔分析和多吸引子状态初值空间分布,阐明了吸引子非对称演化的产生机理。结果表明,受非对称忆阻的影响,无感忆阻蔡氏电路的两个不稳定鞍焦点失去平衡,导致了非对称共存分岔、多稳定模态等行为的产生。最后,由硬件电路实验验证了理论分析与数值仿真的正确性。     

High Frequency Electronically Tunable Floating Memristor Emulators employing VDGA and Grounded Capacitor

This paper introduces novel electronically tunable floating and grounded memristor emulator circuits using voltage differencing gain amplifier and one capacitor. The decremental and incremental memristor emulators have been suggested for both floating as well as grounded type configurations. Decremental to incremental and incremental to decremental configurations of memristor emulators can be easily obtained. The fingerprint of memristor is the pinched hysteresis loops that are maintained for the significant range of frequencies from 5 kHz to 1 MHz. The proposed memristor emulator sustains its range of frequency for both grounded and floating configurations. The simulations have been done in Eldo simulation tool of Mentor Graphics using TSMC 0.18 µm complementary metal-oxide semiconductor (CMOS) technology parameters. The proposed electronically tunable memristor emulators are used to realize analog filters in view of performance verification.

     

A highly linear bulk-driven CMOS OTA for continuous-time filters

In this paper we present a bulk-driven CMOS triode-based fully balanced operational transconductance amplifier (OTA) and its application to continuous-time filters. The proposed OTA is linearly tunable with the feature of low distortion and high output impedance. It can achieve wide input range without compromising large transconductance tuning interval. Using a 0.18 μm n-well CMOS process, we have implemented a third-order elliptic low-pass filter based on the proposed OTA. Both the simulation and measurement results are reported. The total harmonic distortion is more than −45 dB for fully differential input signals of up to 0.8 V peak–peak voltage. A dynamic range of 45 dB is obtained under the OTA noise integrated over 1 MHz.     

Full-wave rectifiers based on operational transconductance amplifiers

The implementation of full-wave rectifiers using operational transconductance amplifiers (OTAs) as only main active circuit elements is presented in this paper. The proposed scheme makes use of the characteristic of the differential amplifier inside the OTA and avoids the use of diodes. The typical problems of the OTA circuit, the input voltage swing limitation and the temperature dependence of the OTA transconductance gain, have been improved. Simulation and experimental results demonstrate the performance of the proposed rectifier are included.     

Ultra Low Power Improved Differential Amplifier

In this paper, a low voltage and ultra low power operational transconductance amplifier (OTA) is presented. As will be shown, the transient response and open loop gain of the proposed OTA are improved using adaptive biasing and DC gain enhancement techniques. The contributions of the proposed OTA are ultra low power consumption (only 3.977 μw), low supply voltages (±0.6 V), high swing, high speed, and high gain. It can clearly be seen that for the proposed OTA, the gain of the differential half-circuit in the input stage (A _d ), DC gain (A ₀), gain bandwidth (GBW), and slew rate (SR) are increased, whereas the settling time (T _S ) is decreased. The results of simulations done using 0.18 μm Silterra CMOS process technology and the measurement results are presented to validate and compare the advantages of this work and other related works.     

Low-distortion low-voltage operational transconductance amplifier

A new operational transconductance amplifier (OTA) is proposed, which is based on the flipped voltage follower and source degeneration techniques. The OTA is simulated in a standard TSMC 0.18 μm CMOS process with a 1.8 V supply voltage. The simulation results show that the total harmonic distortion of the proposed OTA is less than 1% up to 0.85 Vp-p.     

A field programmable analog array for CMOS continuous-time OTA-Cfilter applications

A programmable high-frequency operational transconductance amplifier (OTA) is proposed and analyzed. A general configurable analog block (CAB) is presented, which consists of the proposed programmable OTA, programmable capacitor and MOSFET switches. Using the CABs, the universal tunable and field programmable analog array (FPAA) can be constructed, which can realize many signal-processing functions, including filters. A tuning circuit is also discussed. The proposed OTA has been simulated and fabricated in CMOS technology. The results show that the OTA has the transconductance tunable/programmable in a wide range of 700 times and the -3-dB bandwidth larger than 20 MHz. A universal 5×8 CAB array has been fabricated. The chip has also been configured to realize OTA-C 60-kHz and 500-kHz bandpass filters based on ladder simulation and biquad cascade     

High current efficiency single-stage bulk-driven subthreshold-biased class-AB OTAs with enhanced transconductance and slew rate for large capacitive loads

This paper introduces two high-performance single-stage bulk-driven (BD) operational transconductance amplifiers (OTA) in weak-inversion with rail-to-rail input and output voltage ranges suited for the excessively low-voltage of 0.5 V supply. The strategy depends on adopting a modified bulk-driven non-tailed input core to achieve high input core transconductance with a minimum power supply and an enhanced input common-mode range. Moreover, a partial positive feedback loop provides an overall improved DC gain and effective transconductance further. The input core of OTA1, named composite class-AB OTA, comprises two combined non-tailed differential pairs as composite differential pairs. The proposed OTA2, named composite super class-AB BD-OTA, exploits a matched bulk-input Flipped voltage follower (FVF) pair to adaptively bias the input core used in the composite class-AB BD OTA. As a result, a significant increase in large-signal input current to the output side due to super class-AB behavior improves the slew rate. The post-layout simulation results using the Cadence Spectre simulator with UMC 0.18 µm process technology confirm that the proposed OTAs have improved small-signal and large-signal performances over the conventional OTA driving a high capacitive load of 5 nF. The proposed composite class-AB and super class-AB BD OTA deliver 2.29 times, and 3.77 times open-loop DC gain, 10.6 times, and 117 times unity-gain bandwidth with 2 times, and 12.03 times slew rate at the expense of almost 0.52 times and 1.21 times power consumed over conventional counterpart, respectively.

     

Mutator-Based Meminductor Emulator for Circuit Applications

A mutator-based meminductor emulator whose inductance can be varied by an external current source is proposed. The implementation of a meminductor emulator is very important, since real meminductors are not physically realizable with current technology. Though there is active research on memristor or memcapacitor emulators, no significant contribution for the meminductor emulator has been presented yet. In this paper, a meminductor emulator has been built using the principle of a mutator, in that a memristor with \(v-i\) at one port functions as a meminductor in the other port, whose input is characterized by \(\varphi - i\) curve. It is shown that multiple meminductor circuits can be built in various configurations with memristors combined with a single mutator. The feasibility of our meminductor emulator and its expandable configurations are verified experimentally and SPICE simulation.     

CMOS low-voltage class-AB operational transconductance amplifier

The authors present a new low-voltage class-AB operational transconductance amplifier (OTA). The proposed OTA achieves a fast non slew-rate limited settling time with low power consumption. The circuit is power efficient when driving large capacitive loads. The OTA circuit is well suited for low-voltage low-power switched capacitor applications. Experimental results of the proposed circuit are included     

一种新颖的OTA结构的数模转换器

介绍了一种新颖结构的数模转换器，此转换器的设计核心是采用跨导运算技术，由CMOS运算跨导放大器（OTA）构成。此D／A转换器以模拟电流作为主要信号变量，以跨导运算放大器取代电压运算放大器，以基于OTA的有源元件取代部分无源元件，通过改变OTA的偏置电流，从而改变其互导增益gm和电压放大器增益Au，更适合于IC的集成。采用9个OTA构成一个8位的加法电路，8个OTA的互导增益gm对应8位的数字信号，8个MOS管作为开关运用由8位的数字信号控制，从而实现数字信号到模拟信号的转换。     

Improved common-mode feedback circuit suitable for operational transconductance amplifiers with tuning

A simple modification is proposed for a popular common-mode feedback circuit used in operational amplifiers, such that it can be used in an operational transconductance amplifier (OTA) without leading to significant DC offset caused by the unavoidable tuning of the OTA. Simulation results show that the improved circuit has nearly zero DC offset for the whole tuning range.<>     

A 1-V low power gain boosted self-cascoding current mirror operational transconductance amplifier

A low-voltage, micro-power, low-noise, high-gain, high-output swing current mirror-based operational transconductance amplifier (OTA) is presented. The proposed OTA achieves high DC gain and output swing by the adoption of gain boosted current mirroring and self-cascoding techniques. From the simulation, the proposed OTA implemented on a 0.18 μm CMOS shows the DC gain up to 90 dB with a gain bandwidth of 700 KHz for a load capacitor of 1 pF and an output voltage swing of 600 mV. The OTA dissipates only 750 nW from 1.0 V supply.