基于IEEE 802.11a/g的视频传输系统

介绍了一种基于IEEE 802.11a/g无线传输DVD视频信号的系统.介绍了IEEE 802.11a/g协议的特点及其一些重要的技术机制,阐述了基于该协议实现视频传输的优势和应用前景,以DVD无线视频传输为例,介绍了基于IEEE 802.11a/g和嵌入式系统的无线视频传输的实现方案,概述了它的系统结构、工作流程和软件部分所要完成的工作,分析了实现过程中的若干关键技术.     

IEEE802.11g研究综述

全面介绍了IEEE802.11g标准的WLAN，详细讲述了IEEE802.11g草案标准的概念、特点、构件及体系结构、发展前景等，并探讨了实现IEEE802.11g WLAN所需的几项关键技术，同时分析了IEEE802.11g标准的网络性能。其关键技术包括直序列扩频调制技术及补码键控技术，包二进制卷积，正交频分复用技术等。有关IEEE802.11g的兼容性，同频共存性，自身的OFDM问题分析将成为研究的热点。     

适用于IEEE 802.11a/g的联合信道估计和均衡算法

基于IEEE 802.11a/g协议,提出了一种联合信道估计和均衡的算法,该算法采用自适应信道估计方式在低信噪比情况下实现精确的信道估计,并且具有较低的设计复杂度。信道均衡采用频域内MMSE(FD-MMSE)均衡方式,与自适应信道估计配合在系统性能和计算复杂度方面取得较好折中。仿真表明该算法结构性能满足IEEE 802.11a/g协议规定,与同类算法相比在低信噪比区域提高系统性能的前提下算法的计算复杂度也有所降低。     

A multi‐mode IFFT/FFT processor for IEEE 802.11ac: design and implementation

In this paper, we present 64/128/256/512‐point inverse fast Fourier transform (IFFT)/FFT processor for single‐user and multi‐user multiple‐input multiple‐output orthogonal frequency‐division multiplexing based IEEE 802.11ac wireless local area network transceiver. The multi‐mode processor is developed by an eight‐parallel mixed‐radix architecture to efficiently produce full reconfigurability for all multi‐user combinations. The proposed design not only supports the operation of IFFT/FFT for 1–8 different data streams operated by different users in case of downlink transmission, but also, it provides different throughput rates to meet IEEE 802.11ac requirements at the minimum possible clock frequency. Moreover, less power is needed in our design compared with traditional software approach. The design is carefully optimized to operate by the minimum wordlengths that fulfill the performance and complexity specifications. The processor is designed and implemented on Xilinx Vertix‐5 field programmable gate array technology. Although the maximum clock frequency is 377.84 MHz, the processor is clocked by the operating sampling rate to further reduce the power consumption. At the operation clock rate of 160 MHz, our proposed processor can calculate 512‐point FFT with up to eight independent data sequences within 3.2~μs meeting IEEE 802.11ac standard requirements. Copyright © 2015 John Wiley & Sons, Ltd.     

A Carrier Synchronization Algorithm for IEEE 802.11a System

1　Introduction　OFDMisaneffectivetransmissionschemetocombatmultipathfading[1～2 ] .Ithasbeenappliedinmanycommunicationfields,suchasDigitalAudioBroadcast (DAB ) [4] ,AsymmetricalDigitalSub scriberLoop (ADSL) [5] andIEEE 80 2 1 1 .a[6] .OneoftheprincipaldisadvantagesofOFDMisthesensi tivitytofrequencyoffset.TheCFOdestroystheor thogonalityofthesubcarriers,inducesInter CarrierInterference (ICI)anddegradesthesystem perfor mancesignificantly[7～8] .　Manymethodshavebeen proposedtoestim…     

Toward enhanced wireless coexistence in ISM band via temporal characterization and modelling of 802.11b/g/n networks

This paper presents extensive experimental characterization and empirical modelling of 802.11 temporal behavior. A detailed characterization of 802.11b/g/n homogeneous and heterogeneous network traffic patterns is featured, including idle time distribution and channel utilization. A complete modelling of 802.11 networks in the 2.4 GHz Industrial, Scientific, and Medical band is also presented. Such information can assist the development of other wireless technologies aiming to utilize the crowded Industrial, Scientific, and Medical band more efficiently and to achieve enhanced wireless coexistence. In this work, models are derived for both homogeneous and heterogeneous 802.11 network idle time distributions. Also presented is a case study utilizing 802.15.4 ZigBee transmitter packet size that was adaptively modified based on channel idle time distribution. Results demonstrate superior ZigBee performance and significant enhancement in throughput. Copyright © 2016 John Wiley & Sons, Ltd.     

IEEE802.11a标准中OFDM系统的同步新算法

根据IEEE802．1la的数据分组结构,利用短训练序列时域响应的特点,对接收到的短训练序列进行窗口平移相关,由相关峰确定符号定时,并利用短训练序列进行粗频偏估计。仿真结果表明,该算法能有效地克服噪声及频偏的影响,定时准确,较好地消除了频偏。与其它文献提出的算法相比,具有定时准确、计算量小、频偏估计范围大的特点。     

A fully integrated 23.2 dBm P1 dB CMOS power amplifier for the IEEE 802.11a with 29% PAE

A two-stage fully integrated power amplifier (PA) for the 802.11a standard is presented. The PA has been fabricated using UMC 0.18 μm CMOS technology. Measurement results show a power gain of 21.1 dB, a P_1 dB of 23.2 dBm and a P_SAT of 26.8 dBm. The PAE is 29% and it is kept high by means of several integrated inductors. These inductors present low-DC resistance and high Q characteristics. The inductors must include extra design considerations in order to withstand the high-current levels flowing through them, so that they have been called power inductors.     

一种应用于IEEE 802.11 a_n的高线性度InGaP/GaAs功率放大器

A three-stage 4.8-6 GHz monolithic power amplifier(PA) compatible with IEEE 802.11a/n designed based on an advanced 2μm InGaP/GaAs hetero-junction bipolar transistor(HBT) process is presented.The PA integrates input matching and closed-loop power control circuits on chip.Under 3.3 V DC bias,the amplifier achieves a ~31 dB small signal gain,excellent wide band input and output matching among overall 1.2 GHz bandwidth,and up to 24.5 dBm linear output power below EVM 3%with IEEE 802.11a 64QAM OFDM input signal.     

A dual polarized antenna on a novel broadband multilayer Artificial Magnetic Conductor backed surface for LTE/CDMA/GSM base station applications

The paper presents a low profile dual polarized dipole antenna topology backed by a novel broadband multilayer Artificial Magnetic Conductor (AMC) based reflecting surface. The antenna consists of a pair of square loop shaped dipoles with T-shaped feed structures arranged orthogonally to provide dual slant polarizations at ±45°. The antenna structure is backed by a novel multilayered AMC structure consisting of stacked square patches with via connected at middle and an air filled ground plane at the bottom. Experimental results show that the proposed antenna operates from 700 to 1000 MHz with bandwidth of 35% and an average gain of 8.5 dBi over the bandwidth. The Simulated and measured results of the antenna structure indicate the antenna to be suitable for interoperable Long Term Evolution (LTE), Code Division Multiple Access (CDMA) and Global System for mobile communications (GSM) applications.     

A <Emphasis Type="Italic">G</Emphasis><Subscript><Emphasis Type="Italic">m</Emphasis></Subscript><Emphasis Type="Italic">-C</Emphasis> continuous-time analog filter for IEEE 802.11 a/b/g/n wireless LANs

A CMOS transconductor for multi-mode wireless channel selection filter is presented. The linear transconductor is designed based on the flipped-voltage follower (FVF) circuit and an active resistor to achieve the transconductance tuning. The transconductance tuning can be obtained by changing the bias current of the active resistor. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18-μm CMOS process. The results show that the filter can operate with the cutoff frequency of 10–20 MHz. The tuning range would be suitable for the specifications of IEEE 802.11 a/b/g/n Wireless LANs under the consideration of saving chip areas. In the design, the maximum power consumption is 13 mW with the cutoff frequency of 20 MHz under a 1.8 V supply voltage.