Junction model and transport mechanism in hybrid PEDOT:PSS/n-GaAs solar cells

This study investigates the junction formation and interface properties of PEDOT:PSS/n-GaAs hybrid solar cells on planar GaAs substrates. Barrier height, photocurrent, dark saturation current and build-in potential at this hybrid interface are measured by varying n-GaAs doping concentrations. The work function and valence band edge of the polymer are extracted from ultraviolet photoelectron spectroscopy to construct the band diagram of the hybrid n-GaAs/PEDOT:PSS junction. The current-voltage characteristics were analyzed by using abrupt (p⁺n) junction and Schottky junction models. Contrary to the earlier results from the PEDOT:PSS/n-Si solar cells, the experimental evidence clearly suggested that the interface between n-GaAs and PEDOT:PSS more likely exhibited a Schottky type instead of a p⁺n junction. The current transport is governed by the thermionic emission of majority carriers over a barrier and not by diffusion. The dark saturation current density increases markedly owing to the increasing surface recombination rate in heavier n-doped GaAs substrates, leading to significant deterioration in solar cells performance.     

Si基HgCdTe变面积光伏探测器的变温特性研究

通过变面积Si基HgCdTe器件变温I-V测试和暗电流特性拟合分析,研究了不同偏压下n-on-p型Si基HgCdTe光伏器件的暗电流成分与Si基HgCdTe材料少子扩散长度和少子寿命随温度的变化规律.在液氮温度下,随着反向偏压的增大器件的表面漏电流在暗电流中所占比重逐渐增加.在零偏压下,当温度低于200 K时材料的少子...     

非故意掺杂吸收层InP/InGaAs异质结探测器研究

为了获得低噪声铟镓砷（InGaAs）焦平面,需要采用高质量的非故意掺杂InGaAs（u-InGaAs）吸收层进行探测器的制备。采用闭管扩散方式,实现了Zn元素在u-InGaAs吸收层晶格匹配InP/In_0.53Ga_0.47As异质结构材料中的P型掺杂,利用扫描电容显微技术(SCM)对Zn在材料中的扩散过程进行了研究,结果表明,随着扩散温度和时间增加,p-n结结深显著增加,u-InGaAs吸收层材料的扩散界面相比较高吸收层浓度材料（5×1016 cm?3）趋于缓变。根据实验结果计算了530 ℃下Zn在InP中的扩散系数为1.27×10?12 cm2/s。采用微波光电导衰退法(μ-PCD)提取了InGaAs吸收层的少子寿命为5.2 μs。采用激光诱导电流技术(LBIC)研究了室温下u-InGaAs吸收层器件的光响应分布,结果表明:有效光敏面积显著增大,对实验数据的拟合求出了少子扩散长度L_D为63 μm,与理论计算基本一致。采用u-InGaAs吸收层研制的器件在室温(296 K)下暗电流密度为7.9 nA/cm2,变温测试得到激活能E_a为0.66 eV,通过拟合器件的暗电流成分,得到器件的吸收层少子寿命τ_p约为5.11 μs,与微波光电导衰退法测得的少子寿命基本一致。     

Semiconducting single-walled carbon nanotubes as interfacial modification layers for organic-Si solar cells

A semiconducting single-walled carbon nanotubes (s-SWCNTs) interlayer between poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) and n-Si was used for high performance organic-Si hybrid photovoltaic (PV) devices. The s-SWCNTs films with different thickness were utilized to investigate the PV effect on PEDOT:PSS/Si device performance. The surface potential of Si substrate with s-SWCNTs was dramatically reduced, which increased the compatibility between Si and PEDOT:PSS. In addition, s-SWCNTs with good semiconducting properties, guaranteed the charge transfer between Si and PEDOT:PSS. Therein, the electrical contact was dramatically improved with addition of s-SWCNTs interlayer, which led to increased fill factor. A power conversion efficiency (PCE) of 12.14% was achieved with an optimized thickness of s-SWCNTs layer. The s-SWCNTs interface layer was fabricated by a simple solution processed method, which was easily coupled with organic-Si solar cells to enhance the PCE.     

基于电致发光成像理论的硅太阳电池缺陷检测

基于半导体电致发光（EL）的基本理论,在理想P-N结模型条件下,定量计算正向偏压时硅太阳电池EL强度与少数载流子扩散长度的对应关系;分析了电池片中缺陷和扩散长度（EL强度）的关系,指出通过硅电池EL图像检测电池缺陷的可行性。搭建实验平台,分别拍摄单晶硅和多晶硅电池的EL图像,从中成功检测出各种缺陷;编写可视化裂纹自动检...     

Achieving a Record Fill Factor for Silicon–Organic Hybrid Heterojunction Solar Cells by Using a Full‐Area Metal Polymer Nanocomposite Top Electrode

Carrier collection in conventional n‐type Si (n‐Si)/organic hybrid heterojunction solar cells (HHSCs) is mainly limited by the nonoptimized top grid‐electrode and inadequate work function (WF) of the PH1000‐type poly(3,4‐ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS). Here, a novel modified metal polymer nanocomposite top electrode (M‐MPNTE) is designed to achieve a full‐area carrier collection in n‐Si/PEDOT:PSS HHSCs. The carrier collection in both lateral and vertical directions is significantly improved by the introduction of an ultrathin Au/MoO_x modified layer between 6 nm ultrathin Ag film and AI4083‐type PEDOT:PSS layer. In addition, the carrier separation is boosted by the enhanced built‐in potential owing to a high WF of M‐MPNTE, which also suppresses the carrier recombination at the surface of n‐Si. Due to these collaborative improvements, a record fill factor of 80.21% is obtained, which is even comparable to the best value of the traditional Si‐based solar cells. With the addition of a MoO_x antireflective coating layer on top of M‐MPNTE, the short‐circuit current density and open‐circuit voltage are finally increased to 23.13 mA cm^?2 and 621.07 mV, respectively, yielding a power conversion efficiency of 10.82%. The finding suggests a novel strategy for the development of highly efficient HHSCs with ideal carrier transport mechanism.     

Hybrid photovoltaic structures based on amorphous silicon and P3HT:PCBM/PEDOT:PSS polymer semiconductors

Hybrid thin film photovoltaic structures, based on hydrogenated silicon (Si:H), organic poly(3-hexythiophene):methano-fullerenephenyl-C61-butyric-acid-methyl-ester (P3HT:PCBM) and poly(3,4ethylenedioxythiophene):poly(4-styrenesulfonate) (PEDOT:PSS) films, have been fabricated. Organic semiconductor thin films were deposited by spin-coating technique and were exposed to radio frequency plasma enhanced chemical vapor deposition (RF PECVD) of Si:H films at deposition temperature T_d = 160 °C. Different types of structures have been investigated: H1) ITO/(p)SiC:H /P3HT:PCBM/(n) Si:H, H2) ITO/PEDOT:PSS/(i)Si:H/(n) Si:H and H3) ITO/PEDOT:PSS/P3HT:PCBM/(i)Si:H/(n)Si:H. Short circuit current density spectral response and current-voltage characteristics were measured for diagnostic of the photovoltaic performance. The current density spectral dependence of hybrid structures which contains organic layers showed improved response (50–80%) in high photon energy range (hν ≈ 3.1–3.5 eV) in comparison with Si:H reference structure. An adjustment in the absorbing layer thickness and in the contact material for ITO/PEDOT:PSS/(i)Si:H/(n)Si:H structure, resulted in a remarkably high short circuit current density (as large as 17.74 mA/cm²), an open circuit voltage of 640 mV and an efficiency of 3.75%.     

Direct Observation of Conductive Polymer Induced Inversion Layer in n‐Si and Correlation to Solar Cell Performance

Heterojunctions formed by ultrathin conductive polymer [poly(3,4‐ethylenedioxythiophene): poly(styrenesulfonate)—PEDOT:PSS] films and n‐type crystalline silicon are investigated by photoelectron spectroscopy. Large shifts of Si 2p core levels upon PEDOT:PSS deposition provide evidence that a dopant‐free p–n junction, i.e., an inversion layer, is formed within Si. Among the investigated PEDOT:PSS formulations, the largest induced band bending within Si (0.71 eV) is found for PH1000 (high PEDOT content) combined with a wetting agent and the solvent additive dimethyl sulfoxide (DMSO). Without DMSO, the induced band bending is reduced, as is also the case with a PEDOT:PSS formulation with higher PSS content. The interfacial energy level alignment correlates well with the characteristics of PEDOT:PSS/n‐Si solar cells, where high polymer conductivity and sufficient Si‐passivation are also required to achieve high power conversion efficiency.     

Defect‐Minimized PEDOT:PSS/Planar‐Si Solar Cell with Very High Efficiency

Hybrid solar cells made of a p‐type conducting polymer, poly(3,4‐ethyl thiophene):polystyrenesulfonate (PEDOT:PSS), on Si have gained considerable interest in the fabrication of cost‐effective high‐efficiency devices. However, most of the high power conversion efficiency (PCE) performances have been obtained from solar cells fabricated on surface‐structured Si substrates. High‐performance planar single‐junction solar cells have considerable advantages in terms of processing and cost, because they do not require the complex surface texturing processes. The interface of single‐junction solar cells can critically influence the performance. Here, we demonstrate the effect of adding different surfactants in a co‐solvent‐optimized PEDOT:PSS polymer, which, in addition to acting as a p‐layer and as an anti‐reflective coating, also enhances the device performance of a hybrid planar‐Si solar cell. Using time‐of‐flight secondary ion mass spectrometry, we conduct three‐dimensional chemical imaging of the interface, which enables us to characterize the micropore defects found to limit the PCE. Upon minimizing these micropore defects with the addition of optimized amounts of fluorosurfactant and co‐solvent, we achieve a PEDOT:PSS/planar‐Si cell with a record high PCE of 13.3% for the first time. Our present approach of micropore defect reduction can also be used to improve the performance of other organic electronic devices based on PEDOT:PSS.     

Electron beam-induced current investigation of GaN Schottky diode

In this article, we report the electron beam-induced current (EBIC) measurements in a GaN Schottky diode performed in the line-scan configuration. A theoretical model with an extended generation source was used to accurately extract some minority carrier transport properties of the unintentionally doped n-GaN layer. The minority hole diffusion length is found to increase from ∼0.35 μm near the junction to ∼1.74 μm at the bulk regions. This change is attributed to an increase of the carrier lifetime caused by the polarization effects, which are preponderant in this component. For depth distances exceeding 0.65 μm, it is shown that the measured current is produced by the reabsorption recombination radiation process. This corresponds to an absorption coefficient of 0.178 μm⁻¹, in good agreement with the optical absorption measurement.     

High quality GaAs qrowth by MBE on Si using GeSi buffers and prospects for space photovoltaics

III–V solar cells on Si substrates are of interest for space photovoltaics since this would combine high performance space cells with a strong, lightweight and inexpensive substrate. However, the primary obstacles blocking III–V/Si cells from achieving high performance to date have been fundamental material incompatibilities, namely the 4% lattice mismatch between GaAs and Si, and the large mismatch in thermal expansion coefficient. In this paper, we report on the molecular beam epitaxial (MBE) growth and properties of GaAs layers and single junction GaAs cells on Si wafers which utilize compositionally graded GeSi intermediate buffers grown by ultra‐high vacuum chemical vapor deposition (UHVCVD) to mitigate the large lattice mismatch between GaAs and Si. GaAs cell structures were found to incorporate a threading dislocation density of 0.9–1.5×10 cm⁻², identical to the underlying relaxed Ge cap of the graded buffer, via a combination of transmission electron microscopy, electron beam induced current, and etch pit density measurements. AlGaAs/GaAs double heterostructures were grown on the GeSi/Si substrates for time‐resolved photoluminescence measurements, which revealed a bulk GaAs minority carrier lifetime in excess of 10 ns, the highest lifetime ever reported for GaAs on Si. A series of growths were performed to assess the impact of a GaAs buffer layer that is typically grown on the Ge surface prior to growth of active device layers. We found that both the high lifetimes and low interface recombination velocities are maintained even after reducing the GaAs buffer to a thickness of only 0.1 μm. Secondary ion mass spectroscopy studies revealed that there is negligible cross diffusion of Ga, As and Ge at the III–V/Ge interface, identical to our earlier findings for GaAs grown on Ge wafers using MBE. This indicates that there is no need for a buffer to ‘bury’ regions of high autodoping, and that either pn or np configuration cells are easily accommodated by these substrates. Preliminary diodes and single junction AlGaAs heteroface cells were grown and fabricated on the Ge/GeSi/Si substrates for the first time. Diodes fabricated on GaAs, Ge and Ge/GeSi/Si substrates show nearly identical I–V characteristics in both forward and reverse bias regions. External quantum efficiencies of AlGaAs/GaAs cell structures grown on Ge/GeSi/Si and Ge substrates demonstrated nearly identical photoresponse, which indicates that high lifetimes, diffusion lengths and efficient minority carrier collection is maintained after complete cell processing. Copyright © 2000 John Wiley & Sons, Ltd.     

Experimental investigation of the excess charge

The open-circuit voltage of about 600 mV developed by 0.1 ohm-cm silicon solar cells under air mass zero illumination is about 100 mV less than voltages predicted from simple diffusion theory. The lower measured voltages appear to be controlled by junction current transport processes associated with the thin top diffused layer. Mechanisms such as low n⁺ layer minority carrier lifetime and bandgap narrowing due to heavy doping effects (HDE) have been suggested to explain these results. Experimental determinations of the properties of the diffused layer are required to assess which of these mechanisms predominate. While direct measurement is difficult, an indirect measurement methodology exists by which the lifetime or transit time in the diffused layer can be obtained. Nine p-type, 1×2 cm, 〈111〉 orientation silicon wafers were phosphorus diffused at 880°C for 45 minutes using P0Cl₃. Open-circuit voltages of 595-612 mV, typical of all 0.1 ohm-cm cell voltages, were obtained. From the open-circuit voltage and short-circuit current, the diffusion controlled I₀ was obtained. In addition to illuminated I-V characteristics, the time constants from the Open-Circuit Voltage Decay method, and the minority carrier diffusion lengths in the base region were measured. The base region charge was determined using the base region diffusion length measured by an X-ray method. The data from these experiments combined with simple theory can imply the minority carrier time constant and the excess charge in the diffused layer. From this, certain conclusions are drawn about the relative roles of bandgap shrinkage and recombination rates in the diffused layer.     

Perimeter governed minority carrier lifetimes in 4H-SiC p+n diodes measured by reverse recovery switching transient analysis

Minority carrier lifetimes in epitaxial 4H-SiC p⁺n junction diodes were measured via an analysis of reverse recovery switching characteristics. Behavior of reverse recovery storage time (t_s) as a function of initial ON-state forward current (I_F) and OFF-state reverse current (I_R) followed well-documented trends which have been observed for decades in silicon p⁺n rectifiers. Average minority carrier (hole) lifetimes (τ_p) calculated from plots of t_s vs I_R/I_F strongly decreased with decreasing device area. Bulk and perimeter components of average hole lifetimes were separated by plotting 1/τ_p as a function of device perimeter-to-area ratio (P/A). This plot reveals that perimeter recombination is dominant in these devices, whose areas are all less than 1 mm². The bulk minority carrier (hole) lifetime extracted from the 1/τ_p vs P/A plot is approximately 0.7 μs, well above the 60 ns to 300 ns average lifetimes obtained when perimeter recombination effects are ignored in the analysis. Given the fact that there has been little previous investigation of bipolar diode and transistor performance as a function of perimeter-to-area ratio, this work raises the possibility that perimeter recombination may be partly responsible for poor effective minority carrier lifetimes and limited performance obtained in many previous SiC bipolar junction devices.     

Analysis of leakage currents in MOCVD grown GaInAsSb based photodetectors operating at 2 µm

This paper reports the fabrication and characterization of GaInAsSb photodetectors operating at 2 μm. At room temperature, the performance of these photodiodes under reverse bias conditions is limited by the surface leakage. A model has been developed to separate the bulk (diffusion and generation-recombination (g-r)) and the surface leakage contributions toward the total leakage current. By fitting this model to the experimental data, values of material parameters such as minority carrier diffusion length and lifetime have been estimated. The highest R₀A of 55 Ω-cm² has been obtained with a responsivity of 0.44 A/W at 2 μm.     

Effect of band alignment and density of states on the collector current in p-Si/n-Si/sub 1-y/C/sub y//p-Si HBTs

p-Si/n-Si/sub 1-y/C/sub y//p-Si heterojunction bipolar transistors with varying carbon fractions in the base were grown by rapid thermal chemical vapor deposition (RTCVD), to better understand the potential of Si/sub 1-y/C/sub y/ in enhancing the performance of Si-based bipolar technology. The band line-up issues which make Si/sub 1-y/C/sub y/ a desirable choice for forming the base region in a p-n-p HBT are discussed. Electrical measurements performed on the p-Si/n-Si/sub 1-y/C/sub y//p-Si HBTs (y=0.6, 0.8 at.%) are used to extract important information regarding the electronic properties of the Si/Si/sub 1-y/C/sub y/ material system, e.g., the bandgap reduction in Si/sub 1-y/C/sub y/ compared to Si and minority carrier recombination lifetime in Si/sub 1-y/C/sub y/. Temperature dependent measurements of the collector current were performed to extract the bandgap narrowing at the Si/Si/sub 1-y/C/sub y/ heterojunction. This paper includes a detailed analysis of the impact of heavy doping and reduced density of states in Si/sub 1-y/C/sub y/ compared to Si on the extraction of the energy bandgap offset, and on the collector current of p-n-p HBTs. The impact of the reduced density of states on the design of p-n-p Si/Si/sub 1-y/C/sub y/ HBTs is discussed. The measured value of the energy band offset is (65 meV/at.% C) very close to previously measured values of the conduction band offset at the Si/Si/sub 1-y/C/sub y/ heterojunction. The results are thus consistent with a band line-up at the Si/Si/sub 1-y/C/sub y/ interface that is dominated by a conduction band offset with little if any valence band offset.     

一维均匀掺杂突变PN结伽马剂量率辐射解析模型

研究硅基半导体集成电路最基本结构之一PN结的伽马剂量率辐射模型,阐明PN剂量率辐射模型的重要意义。根据半导体物理基本方程,推导计算出在剂量率辐射下一维均匀掺杂突变PN结光电流响应的解析解模型,根据解析解,在不同参数下用Mathematica作图观察,并与计算机辅助设计技术(TCAD)数值模拟仿真结果对比,验证解析解的正确性;最后基于解析解,通过分析剂量率、偏压、PN结几何尺寸、掺杂浓度、载流子扩散系数、少子寿命等参数对稳态光电流的影响,提出一个更方便工程计算的稳态光电流模型。     

Characteristics of gradually doped LWIR diodes by hydrogenation

The hydrogenation effects on HgCdTe diode performance are presented and the mechanism of hydrogenation is revealed. By the hydrogenation, R₀A is increased by 30 times and photo-response is also improved. It is supposed that these are explained by the increased minority carrier lifetime by the hydrogenation. However, it is found from LBIC measurements that the minority carrier lifetime doesn’t increase by the hydrogenation. An important clue that explains the hydrogenation effects is found from Hall measurements. It is found that, after the hydrogenation, the doping concentration of Hg-vacancy doped substrate decreases and the mobility increases. For the heavily hydrogenated bulk substrate, it is also found that the hydrogen passivates the whole Hg-vacancy and reveals the residual impurity and p-type doping concentration is exponentially graded. From these measurements, the diffusion current model of gradually doped diode is proposed. This model shows that the diffusion current of the graded junction diode is 2 orders of magnitude smaller than that of the abrupt junction diode, which clearly explains the R₀A increase by the hydrogenation. Medicisimulation to investigate the change of LBIC signal by the doping grading also coincides with the measurements. From these measurements and model, the hydrogenation effects are attributed to the grading of Hg-vacancy doped p-type substrate by the diffused hydrogen.     

Electrical bistability,negative differential resistance and carrier transport in flexible organic memory device based on polymer bilayer structure

Bistable nonvolatile memory devices containing two different layers of polymers, viz. MEH-PPV (poly[2-methoxy-5-(2′-ethyl-hexyloxy)-1,4-phenyl vinylene]) and PEDOT:PSS (poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate)) has been fabricated by a simple spin-coating technique on flexible polyimide (PI) substrates with a structure Al/MEH-PPV/PEDOT:PSS/Ag-Pd/PI. The current–voltage measurements of the as-fabricated devices showed a nonvolatile electrical bistability with electric field induced charge transfer through the polymer layers and negative differential resistance (NDR) which is attributed to the charge trapping in the MEH-PPV layer. The current ON/OFF ratio between the high-conducting state (ON state) and low-conducting state (OFF state) is found to be of the order of 10³ at room temperature which is comparable to organic field effect transistor based memory devices. We propose that such an improvement of rectification ratio (ON/OFF ratio) is caused due to the inclusion of PEDOT:PSS, which serves as a conducting current path for carrier transport; however, NDR is an effect of the trapped charges in the MEH-PPV electron confinement layer. The device shows excellent stability over 10⁴ s without any significant degradation under continuous readout testing in both the ON and OFF states. The carrier transport mechanism of the fabricated organic bistable device has been explained on the basis of different conduction mechanisms such as thermionic emission, space-charge-limited conduction, and Fowler–Nordheim tunneling. A band diagram is proposed to explain the charge transport phenomena. These bilayer structures are free from the drawbacks of the single organic layer based memory devices where the phase separation between the nanoparticles and polymers leads to the degradation of device stability and lifetime.     

Numerical evaluation of the scanning method for the determination of minority carrier diffusion length in p-n junctions

A numerical model for the scanning method for determining minority carrier diffusion length is presented to include the effect of the built-in field and high-level injection. A numerical simulation is presented which shows that the scanning method for diffusion length measurements will not give accurate results for minority carrier diffusion length in the region where the presence of a built-in field is significant. No matter how poor the junction is made, the accuracy of the measurement method increases away from the depletion region. The problem of low magnitude in the induced short circuit current away from the physical junction could be overcome by increasing the generation level. For substrate dopant concentrations between 2.0 × 10¹⁵cm⁻³ and 6.0 × 10¹⁶cm⁻³ the distance into the device from the surface where the error of the measurement will be greater than 10% is expressed as a semi-empirical formula relating dopant concentration. When there are irregularities in minority carrier lifetime closer to the physical junction, the measurement method will accurately determine the minority carrier diffusion length in a particular region only if the width of that region is much larger than its diffusion length.     

The influences of traps on the generation-recombination current in silicon diodes

The recombination current in the space charge region of an abrupt Si P-N junction is calculated under the assumption that the electrochemical potentials or quasi-Fermi levels for the majority carriers are constant throughout the bulk and space-charge regions, and that the Hall-Shockley-Read centers are distributed uniformly with respect to position in the space-charge region, but can be either a single, discrete level or a continuous and uniform distribution with respect to energy. The results for the single level show that the slope can have constant value over a wide range of applied forward bias. These values are mainly dependent on the trap level position and are nearly independent of the minority carrier lifetime at a given doping concentration. They are also dependent on the lower doping concentration. Furthermore, very good linearity in the characteristic curve can be obtained if we assume that the recombination centers are uniformly distributed in energy throughout the energy gap.