A new course on supercomputers and parallel architectures

Parallel processing and distributed computing are two areas attracting a great deal of attention. Several universities and institutions are involved in the teaching of courses on parallel programming, distributed operating systems and parallel algorithms, but very few of them offer a course from the hardware point of view. The course structure presented in this paper gives a considerable emphasis on the hardware for parallel processing. Various topics such as the design of high speed computing devices, hardware design of multiple pipelines, design of a variety of memory configurations, design of an NXN interconnection network and the hardware for systolic architectures and neural network architectures are presented in this course. Students have the opportunity to actually design a distributed shared memory system using IBM PC machines and write software for them. The assignments for the course are in the form of both individual and group projects on the implementation of various schemes for parallel processing such as synchronization mechanisms (e.g., locks and barrier) in hardware. In addition, a group project deals with the design of a pipelined floating point unit. Further, a complementary course on VLSI provides the necessary skills for the students to implement the devices as a VLSI chip. Students also have the opportunity to do hands on work with transputers and develop hardware and software based around them. This course has received good feedback both from academia and industries within Australia     

Application of distributed and dependable computer systems in power systems

Recent developments in computer science in both distributed and dependable computing, together with the increasing diversity and flexibility in the type of hardware, has introduced new design possibilities for power system engineers. The advantages of using computer systems within power systems and the possible development of such systems are reviewed. The increased use of computers, however, also results in an increased number of new problems and these and their possible solution are reviewed.     

CUTTING THE COST OF COMPUTING - Hardware and softwaremakers are eager to help emerging economies join the information revolution

Widespread efforts are underway to bring computing to the developing world in an effort to make access to information more widely available, and so help developing countries help themselves. This paper describes a number of initiatives in both hardware and software engineering that are aimed at bringing down the cost of computing, and so make the communications and access to information that the developed world takes for granted much more widely available     

A simple hardware realization of switching table based direct torque control of induction motor

A simple hardware realization of direct torque control (DTC) scheme for fast control of induction motor torque has been presented. The proposed hardware scheme mimics the conventional switching table based DTC scheme and does not require use of any online fast computing device like microprocessor, PC or DSP. The controller uses only commonly used discrete hardware components. The experimental results of the proposed hardware implementation have been presented and supported with simulation results. Another alternate hardware scheme without using the switching table has also been proposed and the experimental results of both the schemes have been compared and found to be in agreement with each other.     

基于DSP的电能质量监测系统设计

以TMS320F2812DSP为核心处理器,研发了一款电能质量监测系统,实现了电网中的电压、谐波等参数的实时监测及统计记录,给出了硬件电路设计和软件设计方案,同时在软、硬件2个方面对系统采取了一系列抗干扰措施。与其他装置相比,该系统利用DSP控制器的精度高、运算能力强和集成硬件资源丰富等特点,实现了实时监测的要求,显著提高了监控系统的可靠性。     

基于STM 32的智能终端的设计与实现

智能家居技术是目前社会研究的热点,系统利用先进的计算机、综合布线、传感器、网络通信等技术,将家居安防、环境控制、通信、智能家电等系统有机地结合在一起,进行统一管理与控制.文章设计了智能家居控制终端的整体思路,包括软件和硬件2方面,难点在于系统中重要通信协议的实现,通过对系统软、硬件及整体测试,证明了系统的可用性.     

大型企业云计算技术框架研究分析

云计算的出现是软硬件技术发展到一定阶段的产物,是大型企业发挥资源规模效应的关键。文章旨在分析大型企业中的云计算技术框架,对云计算架构和各类技术组件进行了梳理,并分析了云计算技术对大型企业信息系统体系带来的冲击。     

GPUs surpass computers at repetitive calculations

Major performance gains can be obtained by implementing computational intelligence algorithms on graphics processing units. However, a certain amount of skill is needed for the implementation; in some cases the performance gains can be as high as 200 times, but as low as two times or actually less than CPU operation. It is necessary to understand the limitations of the graphics processing hardware and to take these limitations into account in developing algorithms targeted at the GPU. It is important to note that all the examples in this document were operating on last-generation hardware. The next generation of graphics hardware is now available, and includes an order of magnitude more shader units per processor, as well as improved branching capabilities. Consider the possible capability of 512 programmable pipelines working in parallel at 1.5 GHz each, providing the amount of computing power previously seen in large supercomputers on a single desktop machine, at a fraction of the cost. These extremely powerful computing tools are now at the disposal of software designers for entertainment, scientific- computing, and computational intelligence applications.     

云计算环境下仪器虚拟化研究

仪器技术与云计算技术的融合是测量仪器领域的新兴研究热点之一。要将仪器接入到云计算环境中,首先需要解决的问题就是仪器的虚拟化。文章从云计算技术的应用特性出发,对仪器资源在云计算环境中的虚拟化技术进行研究,试提出一种云计算环境下仪器虚拟化的新模式。首先对云计算环境下硬件的虚拟化技术进行分析,然后对当前仪器虚拟化技术进行讨论,结合对仪器在云计算环境中应用场景的探索,确定了仪器资源服务的IAAS模式。通过分析IAAS模式下硬件设备虚拟化的特点,并对比传统的仪器虚拟化技术,提出了适用于IAAS云计算模式下仪器虚拟化的方法。该方法通过推送仪器的连接信息并与仪器建立虚拟连接通道,来实现仪器在云计算环境中的虚拟化,如此,可最大限度地提供系统开发的灵活度。最后,对该虚拟化技术的实现给出了推荐的架构,旨在促进仪器资源与云计算环境的集成与融合,推动仪器设备和测量技术的进步。     

DNA computing

Extensive interest has been expressed in possibly using DNA (or other biological macromolecules) as computing hardware. We will briefly examine the possibilities DNA computing and general molecular computation open up and the problems faced in achieving them. Finally, we will try to put them in a broader perspective     

CORDIC算法及其展开结构的FPGA实现

针对FPGA系统中涉及三角函数等数学运算,而传统的查找表方法占用资源较多,计算精度不足等问题,提出了基于CORDIC算法的三角函数计算的实现方法.首先给出了CORDIC算法的硬件结构,然后使用Verilog HDL硬件描述语言,在Quartus ⅡⅢ 13.1中对算法进行编译和仿真,并对仿真结果和实际结果进行误差分析,最后选择Altera公司的Cyclone Ⅳ E系列中EP4CE30F23C6器件,完成了CORDIC算法的FPGA实现.实验结果表明,该算法能够利用较少的硬件资源,实现较高的计算精度,并且运算速度较快,可以满足实际应用中的计算需求.     

基于SoC FPGA硬件并行化计算的配电网电压控制技术

随着主动配电网以及物联网技术的发展,无功设备的接入呈现复杂化和边缘化的趋势,电压无功控制的计算也向边缘计算发展。然而由于算力受限,边缘节点纯软件式的计算所需时间较长,无法满足控制实时性的要求。针对此问题,本文提出一种基于SoC FPGA硬件并行化计算的配电网电压控制策略。首先设计了基于SoC FPGA的软硬件计算框架,在此基础上对配电网电压无功优化模型与遗传算法求解方法做了适用于FPGA的针对性改进,最后分模块设计了FPGA硬件求解结构。通过两个算例场景验证可知,相比于边缘节点纯软件式的求解方式,本方法的平均求解效率分别提升了2.41倍和2.15倍,可有效提升电压无功控制的实时性。     

基于流计算的大客户用能智能分析方法

针对大客户用电用能综合分析及无法及时发现用电异常的问题,设计了一种基于流计算下大客户用能智能分析方法.首先给出了大客户用能智能分析系统的整体构架,并从软硬件功能需求方面进行了描述.依托流计算技术实时处理能力和高性能数据吞吐能力实时处理采集到的数据,运用机器学习按照用户综合用能分析数学模型和窃电识别模型学习处理异常数据....     

基于FPGA的稀疏卷积神经网络加速器设计

剪枝是一种减少卷积神经网络权重和计算量的有效方法,为CNN的高效部署提供了解决方案。但是,剪枝后的稀疏CNN中权重的不规则分布使硬件计算单元之间的计算负载各不相同,降低了硬件的计算效率。文章提出一种细粒度的CNN模型剪枝方法,该方法根据硬件加速器的架构将整体权重分成若干个局部权重组,并分别对每一组局部权重进行独立剪枝,得到的稀疏CNN在加速器上实现了计算负载平衡。此外,设计一种具有高效PE结构和稀疏度可配置的稀疏CNN加速器并在FPGA上实现,该加速器的高效PE结构提升了乘法器的吞吐率,同时可配置性使其可灵活地适应不同稀疏度的CNN计算。实验结果表明,提出的剪枝算法可将CNN的权重参数减少50%～70%,同时精度损失不到3%。相比于密集型加速器,提出的加速器最高可实现3.65倍的加速比;与其他的稀疏型加速器研究相比,本研究的加速器在硬件效率上提升28%～167%。     

一种步进电机多轴插补器的设计

硬件插补器可以实现多轴插补的并行运算,插补速度高。CPLD的应用简化了硬件插补器的结构,提高了灵活性。     

Parallel computing for less

High speed networks and improved microprocessor performances are making workstations an appealing prospect for parallel computing. With just commodity hardware and software, networked workstations can offer parallel processing at a relatively low cost. Parallel computing can be implemented in two ways. The networked workstations can be set up as a processor bank with dedicated processors providing computing cycles. Or, it can consist of a dynamically varying set of machines that perform long running computations during idle periods. In the latter case, the hardware cost is essentially zero since many organizations already have extensive workstation networks. For some applications, networked workstations can approach or exceed supercomputer performance. However, these loosely coupled multiprocessors will by no means replace the more tightly coupled designs. Supercomputer lower latencies (time elapsed between issuing a memory request and receiving the corresponding data from memory) and higher bandwidths are more efficient for applications with stringent synchronization and communication requirements. But, advances in networking technology and processor performance are expanding the applications that can be executed efficiently on networked workstations     

Video information recovery from EM leakage of computers based on storage oscilloscope

A hardware platform using broadband antenna, oscilloscope, and spectrum analyzer is designed to receive radio frequency (RF) signals from electromagnetic radiation leakage of computers in the office environment. The process of receiving and the processing techniques have also been given. Then, the software radio-based computing models and software algorithms are proposed to demodulate and decode the RF signals. An experimental result shows that the text information can be recovered from electromagnetic (EM) leakage wave of computer by this interception system. This architecture not only reduces the cost of the system’s hardware but also makes interception more flexible. The innovation points of this paper are recovering the video information in EM leakage wave of computers in an ordinary office environment based on public equipments and proposing the process of receiving processing techniques that only use the software radio-based computing models and software algorithms.     

面向软件定义网络的配电边缘计算终端优化部署方法

为增强配用电物联网的业务支撑能力以及节省经济成本,提出了一种面向软件定义网络(software defined network, SDN)的配电边缘计算终端优化部署方法。电力无线专网基站具有丰富的数据流与业务流,利用无线基站站址部署配电边缘计算终端具有显著的优势。首先,介绍了面向软件定义网络的配用电物联网边缘计算架构,建立了配用电物联网的业务、智能终端和边缘计算终端等要素模型。进一步,考虑边缘计算终端、智能终端以及SDN控制器的通信方式约束、边缘计算终端的服务延时和硬件配置约束,以年均设备成本和年均运行成本之和为目标,建立了配电边缘计算终端优化部署模型。最后,基于多场景的算例仿真结果验证了所提方法的有效性。     

电力驱动系统实时控制虚拟实验平台

在研制复杂大功率电力驱动系统的过程中，实际测试前采用虚拟实验平台对控制器的中断延迟、计算速度、内存、接口、通信等瓶颈和瑕疵进行排查，可缩短开发周期，降低开发费用和技术风险。该文依据实际电力驱动系统结构，提出离散事件交流器系统与连续时间电机系统解耦的实时仿真框架，并基于Simulink开发电力驱动系统实时模型库；采用dSPACE实时仿真环境生成模型的实时C代码，基于两定时器任务实现交流驱动系统15～—20μs步长实时仿真。实时仿真系统具有与实际系统的实时硬件接口，可以与实际控制器或实际电机系统直接相连，构成硬件在回路仿真测试或快速控制原型系统。在一般的实验室中可以对大功率电力驱动系统进行测试、教学和操作培训。     

An integrated target field framework for point-of-care halbach array low-field MRI system design

Objective

Low-cost low-field point-of-care MRI systems are used in many different applications. System design has correspondingly different requirements in terms of imaging field-of-view, spatial resolution and magnetic field strength. In this work an iterative framework has been created to design a cylindrical Halbach-based magnet along with integrated gradient and RF coils that most efficiently fulfil a set of user-specified imaging requirements.

Methods

For efficient integration, target field methods are used for each of the main hardware components. These have not been used previously in magnet design, and a new mathematical model was derived accordingly. These methods result in a framework which can design an entire low-field MRI system within minutes using standard computing hardware.

Results

Two distinct point-of-care systems are designed using the described framework, one for neuroimaging and the other for extremity imaging. Input parameters are taken from literature and the resulting systems are discussed in detail.

Discussion

The framework allows the designer to optimize the different hardware components with respect to the desired imaging parameters taking into account the interdependencies between these components and thus give insight into the influence of the design choices.