A contribution to the current gain temperature dependence of bipolar transistors

In this paper it is demonstrated by a simple calculation that the temperature dependence of current gain may be significantly influenced by both the different freeze-out rates of mobile carriers in emitter and base and the different temperature dependences of mobilities in these two regions. These effects can considerably reduce the decrease of current gain towards low temperatures, caused by the effective bandgap difference between the emitter and base region.     

Degradation of gain in bipolar transistors

In this paper hot carrier related aging of n-p-n bipolar transistors is investigated experimentally and theoretically in order to bring physical insight into the bipolar h_FE (common emitter current gain) degradation. Electrical stress experiments are performed on transistors with different base doping profiles at varying temperatures. Detailed process simulations are performed to determine the doping profiles of the base-emitter junction. Monte Carlo transport simulations are then performed at different temperatures and bias conditions to determine the electron and hole distribution functions in the base-emitter junction. AT&T's 0.8 μm BICMOS technology is used to fabricate the experimental bipolar structures. For this non-self aligned technology we attribute h_FE degradation to the presence of hot holes and secondary electrons which are generated by hot hole impact ionization. This feedback due to impact ionization has a dominant effect on the high energy tails of the distribution of both holes and electrons even when the overall current multiplication is low. Simple hot electron energy transport models do not contain the complexity to properly describe ionization feedback and carrier heating, and are therefore inadequate. An exponential dependence of the transistor lifetime on BV_EBO is deduced for constant voltage stress (V_stressEBO) conditions, confirming the importance of secondaries in the process of degradation     

Temperature dependence of current gain of GaInP/GaAs heterojunctionand heterostructure-emitter bipolar transistors

The temperature effect on current gain is presented for GaInP/GaAs heterojunction and heterostructure-emitter bipolar transistors (HBTs and HEBTs). Experimental results showed that the current gain of the HEBT increases with the increase of temperature in the temperature range of 25-125°C and decreases slightly at temperatures above 150°C. The smaller the collector current, the larger is the positive differential temperature coefficient. At high current levels, the current gain dependence on temperature is significantly reduced. On the other hand, a large negative coefficient is observed in the HBT in all current range. This finding indicates that the HEBT is a better candidate than the HBT for power devices     

Unilateral gain of heterojunction bipolar transistors at microwavefrequencies

General expressions for the h parameters of small-signal equivalent circuit models for emitter-up and emitter-down heterojunction bipolar transistors (HBTs) are derived. The unilateral gain U is calculated from these h parameters for InGaAs/InAlAs n-p-n HBTs. When the device parasitics are sufficiently reduced, the unilateral gain is found to exhibit a resonance behavior at high frequencies that deviates from the traditionally assumed 6-dB/octave roll-off. This unusual behavior in the unilateral gain is found to be caused by the appearance of negative output conductance of the device in certain bands of frequencies. The occurrence of the negative output conductance is shown to be a transit-time effect, and its implication for the device performance at high frequencies is discussed     

Some aspects of current gain variations in bipolar transistors

This paper deals with the study of the main mechanisms involved in the bipolar transistor current-gain variations.In the first part, we describe some properties of characteristic parameters N_S and I_SR of the surface “diode”; an attempt is made to explain the strong correlation between N_S and I_SR.In a second part, we analyse the influence of emitter current crowding, high injection in the base region, and base widening effects on the high level bias current gain value. Critical current densities beyond which each of these effects takes place are defined, allowing us to evaluate their comparative importance at a given collector current value. Our study shows that, on the one hand, for transistors affected by emitter-current crowding, the surface currents play an essential part in the high level bias current gain fall off and, on the other hand, the base widening effect has a very great influence on the static (I_C, V_EB) characteristic and on the emitter injection efficiency value.In the third part, the experimental results obtained are reported and compared with previously proposed analytical relations.     

On the current dependence of low-frequency noise in bipolar transistors

The bias dependent characteristics of the base input flicker noise or 1/f noise current generator in bipolar transistors is examined. A simple technique is presented for the determination of the flicker noise magnitude at selected low frequencies with varying collector bias current. The results indicate that the bias dependence of the flicker noise is intimately rated to that of the input conductance parameter gπin the common-emitter configuration. Practical methods are given for the determination of the bias-independent noise parameter ρ0, which, in conjunction with the small-signal network parameters, fully characterize the device noise performance at low frequencies, ρ0, is an equivalent noise resistance representing the open-circuit flicker noise voltage at the base terminal at 1 Hz. Results of noise figure measurements on several representative commercially available devices are compared with those calculated with a knowledge of ρ0.     

Effect of masking geometry on gain of bipolar transistors

The gain of a double diffused bipolar transistor is found to depend upon the masking pattern. Experimental results show a significantly large systematic difference in the gains of transistors of different size and surrounding masking oxide geometry.     

Bias dependence of high-frequency noise in heterojunction bipolar transistors

Hawkins' isothermal model developed to study noise in bipolar junction transistors (BJTs) is modified to investigate bias-dependent noise in heterojunction bipolar transistors (HBTs) by incorporating thermal effects. It is shown that the inclusion of thermal effects into the high-frequency noise model of HBTs is necessary as the temperature of the device may become very different from the ambient temperature, especially at high bias current. Calculation of the noise figure by including the thermal effect shows that the isothermal calculation may underestimate the noise figure at high bias current. It is observed that noise at low bias is ideality factor n dependent whereas high bias noise is insensitive to the variation of n. Moreover, the common base current gain plays a major role in the calculation of the minimum noise figure. The excellent fit obtained between the theoretical calculation and the measured data are attributed to the inclusion of the bias-dependent junction heating as well as C/sub De/ and C/sub bc/ into the present calculation.     

High current gain 4H-SiC npn bipolar junction transistors

The authors report a common emitter current gain /spl beta/ of 55 in npn epitaxial-emitter 4H-SiC bipolar junction transistors. The spacing between the p+ base contact implant and the edge of the emitter finger is critical in obtaining high-current gain. V/sub CEO/ of these devices is 500 V, and V/sub CBO/ is 700 V.     

Base component of gain and delay time in base-implanted bipolar transistors

This paper uses a numerical analysis, backed by analytic solutions for some cases, to study the dependence of the base component of current gain and delay time in base implanted bipolar transistors on the base impurity porfile. Results are presented in normalised form to facilitate their use in predicting device performance during the processing-device design stage.     

Inverse current gain improvement of bipolar transistors by double-base diffusion

The double-base diffusion process is introduced and is experimentally shown to significantly improve the inverse or upward current gain of the n-p-n bipolar transistor. The technique consists of a deep p⁺diffusion into an external base region of multicollector transistors forming a close-in collar around the intrinsic base of each transistor. This technique, together with the use of deep diffusion n⁺guard rings around the complete unit cell, is shown to improve the inverse current gain significantly.     

Current dependence of forward delay time of bipolar transistors

The modelling of the high current falloff of the transition frequency f1 of bipolar transistors, relies on the definition of a current-dependent delay time. This current dependence of the forward delay time Tf (normal active mode), as expressed in some computer-aided design programs, is considered in the letter.     

Modeling of current gain's temperature dependence inheterostructure-emitter bipolar transistors

The temperature dependence of the current gain is investigated for GaAs-based heterostructure-emitter bipolar transistors (HEBT's). With the separation of the p-n junction and the heterojunction, the mechanism of hole injection from the base to emitter in the HEBT is different from that of a conventional HBT. Theoretical results demonstrate that the thermionic emission current plays an important role for the hole current which results in a smaller negative or even positive temperature coefficient for the current gain. Experimental data show that the base current for HEBTs is indeed dominated by thermionic emission as predicted. This finding indicates that the HEBT structure is the suitable choice for high power and high speed applications     

Junction temperature dependence of high-frequency noise inheterojunction bipolar transistors

The use of the Hawkins model, under isothermal condition, to calculate the bias dependent high frequency noise in Heterojunction Bipolar Transistors (HBTs) is questioned. The inclusion of thermal effects into the noise model of HBTs is necessary as the temperature of the device becomes progressively different from the ambient temperature with increasing bias current. Calculation of noise figure by including the thermal effects explains the experimental measurement whereas the isothermal calculation underestimates the noise figure at high bias current     

The influence of post-emitter processing on the current gain of bipolar transistors

The effects of post-emitter processing on the current gain of n-p-n and p-n-p transistors used in linear integrated circuits, is the subject of this paper. It is seen that during the emitter diffusion deep level impurities segregate into the bulk and space-charge regions of the emitter. The aluminum alloy process at 500°C provides a powerful scavenging action that getters the impurities. The post-alloy current gain increases by a factor of ten. This gettering is effective in phosphorus diffused emitters if the dielectric is either a CVD oxide, a plasma deposited oxide, or phosphorus glass under Si3N4. With thermally oxidized emitters there is no improvement in current gain. Boron diffused emitters, however, respond to the aluminum alloy process regardless of the dielectric. This study also identifies two processes that contribute to bandgap narrowing (DeltaE_{g}) these are the emitter diffusion and the post-emitter thermal oxidation. A value ofDeltaE_{g}= 0.04 eV measured after the emitter diffusion was found to increase to 0.09 eV after thermal oxidation at 975°C. This additional component ofDeltaE_{g}is a result of the anomalous accumulation of phosphorus at the silicon surface during oxidation.     

Analysis of the temperature dependence of hot-carrier-induceddegradation in bipolar transistors for Bi-CMOS

The temperature dependence of emitter-base reverse stress degradation in bipolar transistors for Bi-CMOS circuits was studied. A suitable measure of degradation in the operating temperature range was chosen after careful consideration of the fact that bipolar transistor characteristics are very sensitive to temperature changes. The worst-case temperature conditions within the transistors' operating range were determined. Degradation was found to be worst at around 50°C-a result of a tradeoff between thermal recovery from degradation and the effects of bandgap narrowing on bipolar characteristics. The recovery phenomena which had taken place after degradation were also investigated in detail     

Direct measurement of the available voltage gain of bipolar and field-effect transistors

A new method for the direct measurement of the available voltage gain of bipolar and field-effect transistors is presented. The method is easily automated using existing semiconductor parameter analysis systems. An example of direct measurement of the mismatch in available gain is also presented.     

Frequency response of advanced silicon bipolar transistors at lowtemperature

The high-frequency behavior of advanced bipolar silicon transistors has been measured at temperatures between 83 and 350 K. The cutoff frequency, DC gain, and associated frequency-dependent parameters are reported. Although the transistors are optimized for room-temperature operation, their performance at liquid-nitrogen temperature is not severely degraded. Though decreased, the current gain remains sufficiently high for use in some applications. The cutoff frequency is reduced by about a factor of two. It is suggested that this is primarily due to an increase of the base transit time and that increasing the base doping may improve the low-temperature response. Using the maximum frequency of oscillation to predict circuit switching speed, it appears that small, high-performance transistors suffer a speed degradation at near liquid-nitrogen temperature     

The temperature dependence of ideal gain in double diffused silicon transistors

Theoretical treatments predict higher injection efficiency for double diffused silicon transistors than the experimentally observed values. This paper shows that the discrepancy can be partly explained by the difference in the effective energy gaps in the emitter and base regions. Coulomb interaction of the free carriers results in lower energy gap in the heavily doped emitter than in the rest of the transistor. The difference in the energy gaps is experimentally determined from the activation energy difference of the emitter-current and the ideal component of the base Current. It is concluded that too much doping in the emitter lowers the transistor gain, increases the temperature dependence of the gain, and results in a higher excess noise.