利用外部晶体管降低线性稳压器压差

对于线性稳压电路,压差（VIN－VOUT）是在保证稳定输出的前提下所允许的最小输入电压与输出电压之差。由于负载电流连续流过调整管,因此,较低的压差意味着更长的电池寿命。图王所示电路,利用外部晶体管构成一线性稳压电路,负载电流为100mA时,压差仅有10mV;而低压差线性稳压器输出100mA负载电流时,压差为100mV。另外,利用外部晶体管还提高了负载驱动能力,电流可达1A。图1中,将IC1的IN脚与晶体管基极连接,基极电流经内部开关场效应管、由OUT引脚流过电阻R2到地。场效应管通过控制Q1的基极电流调节输出电压VOUT,电容C2…     

晶体管音频功放系列谈(四) 音频功率放大器的小信号级

一、输入级放大器的输入级,几乎一律都采用差分对管放大电路。由于它所处理的信号很小,由电压差分输入给出的是与输出端口处电压基本上无关的电流输出,所以它与输出级放大后的信号相比,其线性问题容易处理。但是,对输入级的设计也不能轻视,因为一个错误认识设计出来的输入级,即便是稍有不妥,也会很容易地出现对整机高频失真起主宰作用。     

晶体管放大电路入门：单管放大器

怎样把晶体管的电流放大作用转换成电压放大作用?这就必需外接元件构成放大电路,其中最简单的就是单管放大器。基本单管放大器的电路如图1所示.其中晶体管T作电流放大,将输入基极电流放大p倍产生输出集电极电流。R_B叫基极偏置电阻,由电源Ec通过R_B产生直流基极电流I_(BQ)     

基于电压阀和电流阀模型的晶体管放大电路分析

依据已经提出的电压阀和电流阀两种非线性电路模型以及由电压阀和电流阀构造出的晶体管模型,进一步对各种晶体管放大电路进行了非线性模型等效,并在等效的模型电路基础上,研究晶体管放大电路的静态工作点计算方法、动态参数计算方法.该方法具有电路直观、概念清晰、分析计算准确等特点,而且能够判断出晶体管是否截止或饱和、动态工作范围大小等.     

应用电源电流读出技术的运放转换器

在集成电路高度发展的今天,集成运算放大器是模拟电路中应用最为广泛的一种功能块.它配接不同的外部元件,能够完成多种信号变换、测量等操作.目前,它的使用几乎和单个晶体管器件一样普遍. 1979年以来,国际上有人应用电源电流读出技术把镜象电流源与运算放大器结合起来,组成一种新型电路,简称为OMA(OperationalMirroredAmplifier)电路.它具有完备的电流与电压间的转换功能.目前,国外已报道制出此类电路的单片集成电路. 根据四端网络理论,一个四端网络的输入与输出间的正向转换关系无非是下列四种. 电压-电压转换器,即电压控制电压源,常用符号     

基本放大电路工作波形的Multisim仿真

本文基于探索基本放大电路工作特性的目的,运用Multisim10软件对基本放大电路进行了虚拟仿真实验,给出了Multisim仿真实验方案,利用虚拟双踪示波器具有测试电路中任意两点电压波形的功能,仿真了电路输入电压、发射结电压、基极电流、集电极电流、集电极发射极电压及输出电压等有关电量的波形,虚拟仿真实验结果与理论分析结果相一致.结论是仿真实验可直观形象地描述电路的工作特性,有利于系统地研究电路的构成及电路的工作过程.     

基于二端口网络的放大电路全频段响应

本文基于二端口网络理论和Matlab软件,分析了基本共射放大电路的全频段交流性能参数,得到全频段的电压增益、输出相位和输入输出阻抗的频率响应曲线。EWB仿真验证了晶体管的GP模型在稳态和线性的计算条件下,可等效为混合π模型,仿真结果也验证了理论分析的正确性。本文是探索研究型教学的一次尝试。     

零值二端口网络分析

零值网络是指当输入端有电压时,输出端电压及电流均为零值的网络.也就是网络处于平衡状态.它在工程实际上应用广泛.分析这种网络的首要任务是求出使网络平衡的必要及充分的各元件间的关系,即平衡条件.平衡条件的求索采用二端口网络的理论是极易得到的.根据二端口网络理论,可以知道:如果满足下列任一条件,二端口网络输出端的电压及电流为零:(假定电路处于正弦稳态)     

可用太阳能电池供电的锂电池充电管理芯片CN3063应用电路

<正> CN3063简介CN3063输入电压范围是4.35V～6V;片内功率晶体管;不需要外部限流二极管和电流检测电阻;内部集成有8位模拟-数字转换电路,能够根据输入电压源的电流输出能力自动调整充电电流,可用在利用太阳能电池等输出电流能力有限的电压源供电的锂电池充电应用     

一种低失调高压大电流集成运算放大器

基于结型场效应晶体管(JFET)和双极型晶体管(BJT)兼容工艺,设计了一种低失调高压大电流集成运算放大器。电路输入级采用p沟道JFET (p-JFET)差分对共源共栅结构;中间级以BJT作为放大管,采用复合有源负载结构;输出级采用复合npn达林顿管阵列,与常规推挽输出结构相比,在输出相同电流的情况下,节省了大量芯片面积。基于Cadence Spectre软件对该运算放大器电路进行了仿真分析和优化设计,在±35 V电源供电下,最小负载电阻为6Ω时的电压增益为95 dB,输入失调电压为0.224 5 mV,输入偏置电流为31.34 pA,输入失调电流为3.3 pA,单位增益带宽为9.6 MHz,具有输出9 A峰值大电流能力。     

Improved Feedback Theory

A previous cut-insertion theorem for linear circuits and its application to a generalization of the elementary feedback theory are further extended. The new theorem is based on the splitting of an arbitrary node into two nodes and on the insertion between them and another arbitrary ldquoreferencerdquo node, of a three-terminal circuit which keeps the network currents and voltages unchanged. The system analysis is in turn performed on the equivalent cut network by means of the techniques for two-port circuits, using generic variables, i.e., either voltages or currents. The new approach allows one to define a two-port circuit as an open loop around the split and reference nodes, as well to define a new feedback model specifically focused on it. Furthermore, it allows one to retrieve all the results of the previous general feedback theories, as well as several new ones. The obtained expressions of the overall transfer function include, as a particular case, the Blackman formula for the immittances, and relationships without the leakage term, which are useful for circuit synthesis and for dealing with spurious signals. New expressions are proposed for the evaluation of the output and input immittances. The virtual short-circuit method is derived and numerical and design examples are provided. The new approach retains the intuitive feedback vision of the elementary models.     

Assessing model adequacy and selecting model complexity in integrated-circuit simulation

A method is described that selects, for each transistor in a circuit, the model of least complexity that will give acceptable accuracy. The capability to assess model adequacy derives from a self-consistency test in which the values of currents and voltages computed in a simulation of the circuit behavior are compared with onset parameters, to determine whether these computed values are consistent with the approximations underlying the device models used in the simulation. The onset parameters for a model are the terminal currents and voltages above or below which the model fails to give a satisfactory representation of device behavior. The authors set forth the onset parameters for the Ebers-Moll model and discuss their determination by terminal measurement and by calculation based on the transistor makeup. The paper limits consideration to the static behavior of transistors operating in the forward-active mode.     

Recent developments in power transistors

Power transistors capable of providing five watts output are now in production. Because these units are relatively non-linear in their characteristics, large signal graphical analysis of their behavior is necessary. To facilitate this, the static characteristics of the grounded base, grounded emitter, and grounded collector circuits are presented for several temperatures. Since power transistors are seldom driven with a high impedance source, the input voltages must be known as well as the input currents. These characteristics are drawn to indicate both simultaneously on one chart. The power that must be removed from the junction of these transistors requires that the mounting for the transistor be thermally adequate to remove the heat without allowing the temperature of the Junction to exceed its critical value. The temperature power relationship is discussed and the theoretical size requirements for a heat dissipator are shown for free air convection and forced convection.     

Single-stage three-phase buck-boost type AC-DC converter with highpower factor

A new control process for single-stage three-phase buck-boost type AC-DC power converters with high power factor, sinusoidal input currents and adjustable output voltage is proposed. This converter allows variable power factor operation, but this work focus on achieving unity power factor. The proposed control method includes a fast and robust input current controller based on a vectorial sliding mode approach. The active nonlinear control strategy applied to this power converter, allows high quality input currents. Given the comparatively slow dynamics of the DC output voltage, a proportional integral (PI) controller is adopted to regulate the converter output voltage. The voltage controller modulates the amplitudes of the current references, which are sinusoidal and synchronous with the input source voltages. Experimental results from a laboratory prototype show the high power factor and the low harmonic distortion characteristics of the circuit     

双极场引晶体管:III.短沟道电化电流理论（双MOS栅纯基）

本文描述双极场引晶体管(BiFET)短沟道理论. 晶体管分成两个区域,源区和漏区. 每区在特定外加端电压下既可为电子或空穴发射区又可为电子或空穴收集区. 把两维无缺陷Shockley方程分离为两个以表面势为参变量的一维方程,并运用源区和漏区界面处电子电流和空穴电流连续性,得到在源区和漏区内解析方程. 典型BiFET包括薄纯基上两个等同金属氧化物硅（MOS）栅. 用图形提供实用硅基和氧化层厚度范围内,随直流电压变化,输出和转移电流和电导总量,电子沟道与空穴沟道分量,和两区电学长度.报道前没考虑沟道缩短的偏差。     

Fundamental Problems of the Theory of Transistor Charge Control†

In order to determine dynamic currents and voltages of a circuitry containing transistors, dynamic transistor characteristics must be known. This paper shows how to derive dynamic transistor characteristics for a charge-controlled transistor model by a synthesis of Ebers and Moll's static and Beaufoy and Sparkes dynamic transistor relations. Dynamic transistor quantities may then be determined by two methods : one may solve the related system of dynamic circuit equations directly, and another may solve the system of corresponding ‘ adjoined static ’ circuit equations loading to ‘ adjoined static ’ quantities from which dynamic quantities may then be computed. Adjoined static quantities are time-dependent quantities which would be observed if all base-charging currents were supplied from wells inside the transistor base, whereas in reality they are supplied by sources outside the base, leading to the observation of corresponding dynamic quantities. The possibility of deriving dynamic from adjoined static quantities follows from the basic assumptions of charge-control theory.

If switching times or, more generally, durations of dynamic transistor processes in terms of base charge only are required, then, given current or voltage control, the respective control quantity being known as a function of time, it is not necessary to formulate and solve the complete system of circuit equations. In the case of current control, one may solve Sparkes equation, assuming different values for the switching time constant corresponding to the various operating regions. In the case of voltage control, an analogue equation may be solved, derived from a generalization of Sparkes equation, which obviates the need for regional time constants. Both methods do not lend themselves well to the determination of dynamic transistor currents and voltages generally, except in the active region where base charge and output current are approximately proportional.     

Modeling of the MOSFET inversion charge and drain current, inmoderate inversion

The widespread use of MOS technology in analog circuit design demands a precise and efficient circuit simulation model of the MOS transistor valid in all regions of inversion. Currently available circuit simulation models fail in the intermediate range of gate voltages, known as the moderate inversion region. Expressions characterizing the large-signal behavior of the long-channel MOS transistor in the moderate inversion region are derived. The correct dependencies on all the physical and process parameters are preserved by a careful approximation to the physical equations, based on the charge sheet assumption. Another goal is to develop expressions that treat the moderate inversion as a small, voltage-dependent correction to currently existing simplified models. This approach should allow a simple modification of the existing circuit simulation models to improve the accuracy in moderate inversion. The model was compared with a numerical charge sheet model and with experimental measurements of a long-channel, ion-implanted NMOS transistor. The expressions could serve as a basis for a comprehensive MOSFET circuit simulation model     

A 1-V BiCMOS rail-to-rail amplifier with n-channel depletion modeinput stage

A BiCMOS rail-to-rail operational amplifier capable of operating from supply voltages as low as 1 V is presented. The folded cascode input stage uses an nMOS depletion mode differential pair to provide rail-to-rail common mode voltage range while typically requiring only 40 fA of input bias current. The bipolar transistor differential-to-single-ended conversion network employs a low-voltage base current cancellation technique which provides high input stage voltage gain from a l-V supply yet allows a 3-V/μs slew rate capability. The bipolar transistor output stage uses a low-voltage translinear loop which maintains a low impedance signal path to the output common emitter power devices. This circuit topology enables the amplifier to achieve a 4-MHz bandwidth with 60° of phase margin. The output voltage can swing to within 50 mV of each supply rail. An “on-demand” base current boost technique will be presented which can provide up to 50 mA of output drive capability from a 5-V supply, yet consumes only a few microamps when the output is in the quiescent state. A low voltage level shift technique will be described which uses an n-channel depletion mode source follower to provide isolation between the input and output stages     

双极场引晶体管:Ⅲ.短沟道电化电流理论(双MOS栅纯基)

本文描述双极场引晶体管(BiFET)短沟道理论.晶体管分成两个区域,源区和漏区.每区在特定外加端电压下既可为电子或空穴发射区又可为电子或空穴收集区.把两维无缺陷Shockley方程分离为两个以表面势为参变量的一维方程,并运用源区和漏区界面处电子电流和空穴电流连续性,得到在源区和漏区内解析方程.典型BiFET包括薄纯基上两个等同金属氧化物硅(MOS)栅.用图形提供实用硅基和氧化层厚度范围内,随直流电压变化,输出和转移电流和电导总量,电子沟道与空穴沟道分量,和两区电学长度.报道前没考虑沟道缩短的偏差.