Room-temperature single-electron memory

This paper presents room-temperature operation, for the first time, of single-electron memory, in which one electron represents one bit of information. This is made possible by our new one-transistor memory configuration which has a very high charge sensitivity (conventionally, three circuit elements are needed). Another new technique, which facilitates single-electron memory, is the ultra-thin (3.4 nm) poly-Si film used for the active region, in which sub-10-nm-width current channels and storage dots are naturally formed. In the fabricated poly-Si TFT's a single electron is stored (or “written”) on a low-energy silicon island, and the number of stored electrons is counted (or “read”) by the quantized threshold-voltage shift. Single-electron memory provides the potential for new nonvolatile RAM's, suitable for mobile computers/communicators     

Multilevel random-access memory using one transistor per cell

A memory cell capable of storing multilevel or analog information and providing random-access operation with nondestructive readout has been studied. It uses a single junction field-effect transistor (JFET) as the storage cell. Experimental and analytical studies suggest that eight of sixteen level operation should be feasible with refresh operations every 0.1 to 1 s; cell area can be under 2 mil/SUP 2/. Tracking voltage and current reference circuitry is used to accommodate variations in fabrication processing and operating temperature.     

Coulomb blockade memory using integrated single-electron transistor/metal-oxide-semiconductor transistor gain cells

A 3/spl times/3-bit Coulomb blockade memory cell array has been fabricated in silicon-on-insulator (SOI) material. In each cell, the Coulomb blockade effect in a single-electron transistor is used to define two charge states. The charge is stored on a memory node of area 1 /spl mu/m/spl times/1 /spl mu/m or 1 /spl mu/m/spl times/70 nm and is sensed with gain by a metal-oxide-semiconductor transistor. The write/read operation for a selected cell within the array is demonstrated. The measured states are separated by /spl sim/1000 electrons for the 1 /spl mu/m/spl times/1 /spl mu/m memory node cell and by 60 electrons for the 1 /spl mu/m/spl times/70 nm memory node cell. Single-electron transistor controlled operation persists up to a temperature of 65 K.     

A high-speed silicon single-electron random access memory

A silicon random access memory using a single-electron tunnelling transistor (SETT) in the form of a multiple tunnel junction (MTJ) in a silicon nanowire has been assessed in terms of its write speed, retention time, and selectivity at an operating temperature of 4.2 K     

多隧道结单电子动态存储器的Monte Carlo模拟

本文采用Monte Carlo方法模拟了多隧道结单电子动态存储器的存储特性，考察了隧道结的个数、隧道结电容、隧道结电阻、脉冲电压幅度等参数对存储器的存储时间和饱和充电电荷的影响，并与宏观RC电路进行了比较。     

Resonant disk turnstile

In this paper, the resonant disk turnstile is introduced and analyzed. The disk turnstile differs from Dicke's full-waveguide turnstile in that four of the six ports are coaxial cable ports, yielding a much more compact turnstile, which is easier to construct. The disk turnstile operation is explained as a superposition of the disk TM₀₁ mode (nonradiating) and the disk TM₁₁ mode which couples directly to the circular waveguide (dominant) TE₁₁ mode. A useful operating fractional bandwidth of 3% is possible as compared to a Dicke turnstile bandwidth of about 6%     

Compact non-binary fast adders using single-electron devices

This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate single electrons to perform arithmetic operations. These adders have fast speed and are referred as fast adders. We develop a family of SE transfer circuits based on MOSFET-based SE turnstile. The fast adder circuit can be easily designed by directly mapping the graphical counter tree diagram (CTD) representation of the addition algorithm to SE devices and circuits. We propose two design approaches to implement fast adders using SE transfer circuits: the threshold approach and the periodic approach. The periodic approach uses the voltage-controlled single-electron transfer characteristics to efficiently achieve periodic arithmetic functions. We use HSPICE simulator to verify fast adders operations. The speeds of the proposed adders are fast. The numbers of transistors of the adders are much smaller than conventional approaches. The power dissipations are much lower than CMOS and multiple-valued current-mode fast adders.     

Implementation of non-linear filters using nanoelectronic single-electron circuitry

Non-linear filters are large family of filters used in signal and image processing. They have found numerous applications such as in digital image restoration, speech processing and coding, digital TV applications, etc. In this paper, two binary non-linear filters, the three-point median filter and the 2×2-pixel morphological opening filter are designed using nanoelectronic single-electron circuitry. In single-electron circuits bits of information are represented by the presence or absence of single electrons at conducting islands. The two nanoelectronic filters are simulated using a Monte Carlo technique and their correct and stable logical operation is confirmed.     

Verification of first circulation conditions of turnstile waveguide circulators using a finite-element solver

One means of adjusting the first circulation condition of any waveguide circulator is to have recourse to a finite-element (FE) solver. The purpose of this paper is to do so for each of the three possible geometries of the turnstile waveguide circulator. A complete statement of the first circulation condition also requires one of the susceptance slope parameter of the junction. This quantity is separately evaluated. The resonators under consideration are the side and apex coupled half-wave-long prism structures open circuited at each flat face and the conventional cylindrical geometry. The classic E-plane turnstile circulator using a prism resonator is also dealt with. The agreement between the existing literature and the FE adjustment is excellent.     

3-D computer simulation of single-electron charging in siliconnanocrystal floating gate flash memory devices

The operation of a silicon nanocrystal quantum-dot based flash memory device is simulated numerically with emphasis on energy and charge quantization in the quantum-dot. The simulation involves the self-consistent solution of three-dimensional (3-D) Poisson and Schrodinger-like equations, with the Slater rule for determining the charging voltage. We also compute the capacitance-voltage characteristics of the device and derive the threshold voltage, V_T , variation with single-electron charging as a function of design parameters     

AP-S turnstile [Northpoint Technologies]

Describes the efforts of Northpoint Technologies to use its patented spatial diversity system to allow terrestrial and satellite broadcasts to occur simultaneously using the same frequencies     

Multi-valued static random access memory (SRAM) cell with single-electron and MOSFET hybrid circuit

A new multi-valued static random access memory (MVSRAM) cell with a hybrid circuit consisting of a single-electron (SE) and MOSFETs is proposed. The previously reported MVSRAM with an SE-MOSFET hybrid circuit needs two data lines, one bit line for write operations and one sense line for read operations, to improve the speed of the read-out operation, but the proposed cell has only one data line for read/write operations, resulting in a memory area that is much smaller than that of the previous cell, without any reduction of read-out speed.     

A single-electron half-adder

A single-electron half-adder is presented in this paper. Bits of information are represented by the presence or absence of single electrons at conducting islands. The logic operation of the half-adder is verified using simulation, whereas the stability of its operation is analysed using the Monte Carlo method.     

Robust HSPICE modeling of a single electron turnstile

This paper presents a novel HSPICE circuit model for designing and simulating a single-electron (SE) turnstile, as applicable at the nanometric feature sizes. The proposed SE model consists of two nearly similar parts whose operations are independent of each other; this disjoint feature permits the accurate and reliable modeling of the sequential transfer of electrons through the turnstile in the storage node (modeled on a voltage level basis). It therefore avoids the transient (current-based) nature of a previous model, thus ensuring robustness in simulated operation. The model has been simulated and results show that it can robustly operate at 32 and 45 nm with excellent stability in its operation. Extensive simulation results are presented to substantiate the advantages of using the proposed model with respect to changes in the circuit model parameters as related to capacitances, feature size and voltages.     

Electrical characteristics and modelling of multi-island single-electron transistor using SIMON simulator

In this paper, we present a multi-island single-electron transistor (MISET) model based on the orthodox theory and solving the master equation. Using SIMON simulator, we investigate the electrical characteristics of single-electron transistors (SETs) based on multiple islands and show the temperature dependence of the Coulomb oscillation of the SET with one to six islands as a function of gate voltage V_g in the temperature range from T=5 to 50 K. Values of current tend to increase proportionally with temperature. For a high drain voltage, the MISET behaved as a single-island device. This is probably because the multiple islands were electrically enlarged and merged into a single island owing to the high applied drain voltage. Finally, we compare the advantages of MISET face to single-island SETs with identical dimensions of islands.     

Classification of single-electron devices

A classification based on the principles identified in this paper is proposed for single-electron devices. A large number of currently known nanoelectronic devices of the type considered here can be described on the basis of this classification. This classification can be used to propose new single-electron devices. Fiz. Tekh. Poluprovodn. 33, 1388–1394 (November 1999)     

Switching between different conformers of a molecule: Multilevel memory elements

We report voltage-driven electrical bistability in an organic semiconductor, namely Ponceau SS. Conductance switching to different levels or “multilevel switching” in devices based on thin-films is due to different density of high-conducting molecules. In a monolayer of Ponceau SS, we have observed one low-conducting and two high-conducting states. This is due to three configurable planes of the molecule exhibiting at least two stable high-conducting conformers. Apart from establishing conductance switching to be a molecular phenomenon, the multilevel conductance in a monolayer shows that a single molecule can exhibit multilevel memory application.     

纳米器件与单电子晶体管

报道了一种非常重要的纳米器件———单电子晶体管,介绍了它的原理、基本特性、制备方法及其集成,着重分析讨论了两种新型的单电子晶体管即波导型单电子晶体管和点接触栅型单电子晶体管。