Novel silicon-controlled rectifier （SCR） for digital and high-voltage ESD power supply clamp

Due to latch-up issue,the main problem of silicon-controlled rectifier(SCR)for power supply clamps in on-chip ESD protection is its inherent low holding voltage,especially in high-voltage applications.In this paper,we proposed a MOS-inside SCR(MISCR)showing nearly no snapback character and good ESD robustness,which is qualified for on-chip power clamp ESD protection.The stacked device achieves a series of triggering and holding voltage by altering the stacking number,which can also be used for the high voltage ESD power supply clamp applications.     

A novel ESD power supply clamp circuit with double pull-down paths

Electrostatic-discharge(ESD)protection design is one of the key challenges of advanced CMOS processes.RC-triggered and MOSFET-based power supply ESD clamp circuits have been widely used to obtain the desired ESD protection ability.In this paper,a MOSFET-based ESD power clamp circuit with only10 ns RC time constant for 0.18-μm process is presented.A double pull-down path is proposed to avoid false triggering,reject power supply noise and reduce energy consumption.The performance of the novel clamp circuit is excellent,consuming very small layout area.The simulation results show that this clamp circuit can be used in industry.     

A low power fully differential RF receiver front-end for 2.4 GHz wireless sensor networks

In this paper, a novel merged LNA-mixer denoted as LNMA is proposed. The proposed LNMA consisting of a folded cascode LNA using improved derivative superposition technique and folded double-balanced subthreshold mixer using capacitor cross-coupled common-gate transconductor and it is integrated with on-chip LC voltage controlled oscillator (LC-VCO). In LNMA, a diode and power clamp based on-chip ESD protection circuit is used to tolerate ESD current of human-body-model specifications. To evaluate its performance, it is implemented in 0.18-µm MMRF CMOS process with 1-V supply, studied through post layout simulation and compared the results with other reported works. It achieves higher conversion gain of 27 dB, lower noise figure of 9.5 dB, lower input return loss (S11) of − 20 dB, higher third-order input intercept point (IIP₃) of – 16 dBm and higher IIP₂ of + 29.9 dBm compared to the works reported in the literature. The on-chip oscillator has the lower phase noise of – 114 dBc/Hz. The proposed LNMA and the LC-VCO achieves the power consumptions of 1.6 and 1.72 mW, respectively at 1-V power supply.

     

Design of a novel static-triggered power-rail ESD clamp circuit in a 65-nm CMOS process基于65纳米CMOS工艺的静态触发型电源钳位ESD保护电路设计

This work presents the design of a novel static-triggered power-rail electrostatic discharge (ESD) clamp circuit. The superior transient-noise immunity of the static ESD detection mechanism over the transient one is firstly discussed. Based on the discussion, a novel power-rail ESD clamp circuit utilizing the static ESD detection mechanism is proposed. By skillfully incorporating a thyristor delay stage into the trigger circuit (TC), the proposed circuit achieves the best ESD-conduction behavior while consuming the lowest leakage current (I_leak) at the normal bias voltage among all investigated circuits in this work. In addition, the proposed circuit achieves an excellent false-triggering immunity against fast power-up pulses. All investigated circuits are fabricated in a 65-nm CMOS process. Performance superiorities of the proposed circuit are fully verified by both simulation and test results. Moreover, the proposed circuit offers an efficient on-chip ESD protection scheme considering the worst discharge case in the utilized process.     

Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process带误触发免疫力的节省版图面积型电源钳位静电放电保护电路

A novel, area-efficient transient power-rail electrostatic discharge (ESD) clamp circuit is proposed in this work. Current-mirror capacitors are used to reduce the layout area. Logic threshold voltages of inverters are modified to ensure a fully active on-state for the clamp device in ESD conditions. The proposed circuit reduces the layout area by about 56% compared with a circuit without current-mirror capacitors. Transmission line pulse (TLP) test results based on a 65-nm CMOS process demonstrate that the proposed circuit is an efficient on-chip ESD protection scheme for this process. In addition, the proposed circuit achieves a good immunity to mis-triggering with respect to fast power-up transitions.     

On efficient variable voltage linear power supplies

The computer aided design of variable voltage, single-phase, linear power supplies using an SCR bridge is discussed. The effects of transformer leakage reactance, resistance, filter capacitance, the low power integrated circuit voltage regulator and the current boost circuit used to increase output power from such supplies is taken into account in the design. By controlling the firing angle of the SCR bridge, the resultant linear supply is more energy efficient in power conversion than the traditional diode bridge based linear power supply. The increase in amplitude of the low frequency harmonics in the line current of the SCR bridge based supply is quantified vis-á-vis the diode bridge based supply. A prototype SCR bridge based design is used to experimentally validate the design computations. An implementation of a controller to operate the SCR bridge based supply efficiently is discussed.     

A remotely powered fully integrated low power class-E power amplifier for implantable sensor systems

This paper presents a fully integrated low power class-E power amplifier and its integration to remotely powered sensor system. The on-chip 1.2 GHz power amplifier is implemented in 0.18 µm CMOS process with 0.2 V supply. The implantable system is powered by using an inductively coupled remote powering link at 13.56 MHz. A passive full-wave rectifier converts the induced AC voltage on the implant coil into a DC voltage. A clean and stable 1.8 V supply voltage for the sensor and communication blocks is generated by a voltage regulator. On–off keying modulated low-power transmitter at 1.2 GHz is used for the transmission of the data collected from the sensors. The transmitter is composed of a LC tank oscillator and a fully on-chip class-E power amplifier. Compared to the conventional class-E power amplifiers, an additional network which reduces the on-chip area is used at the output of the power amplifier. The measurement results verify the functionality of the remotely powered implantable sensor system and the power amplifier. The integrated power amplifier provides ?10 dBm output power for 50 Ω load with a drain efficiency of 31.5 %. The uplink data communication with a data rate of 600 kbps is established by using a commercial 50 Ω chip antenna at 1 m communication distance.     

一种用于人体传感器网络的接收器模拟前端

设计了一种用于人体传感器网络的低功耗接收器模拟前端,电路物理层信道利用人体进行通信,并采用了一种宽带信号传输技术,可以在0.8 V电压供电,100 mV输入敏感度条件下传输20 Mb/s的数据。片上的电压偏置电路提供了50Ω的输入阻抗。放大器采用了一种低压低功耗的Cascode结构,具有58 dB的增益,25 MHz的增益带宽积。另外采用了一种结构简单,功耗极低的电流反馈型Schmitt触发器。电路采用SMIC0.13μm标准CMOS工艺设计,面积0.02 mm2,供电电压0.8 V,功耗仅为2.2 mW。     

新型自动调节的高压感应取电装置研究

针对智能电网中高压输电线路在线监测设备的供电电源存在的问题,研究了一种新型可自动调节的高压侧感应取电装置.该装置采用C8051F系列单片机作为控制中心,实现对多绕组线圈自动切换电路、过流保护电路以及后备电源充放电电路的智能管理与控制.该感应取电装置解决了低电流下设备的取能难题及过电流时设备的保护问题,能够有效应对输电线路中电流的宽范围波动,具有长期、稳定可靠供电的能力.仿真与实验数据证实所设计的取电装置具有一定的可行性.     

一种静电除尘脉冲电源及控制系统设计

针对常用的静电除尘电源在处理高比阻粉尘和超细粉尘时暴露出来的问题,设计了一种静电除尘用脉冲电源及控制系统,介绍了脉冲产生的谐振原理并给出了详细的计算公式。脉冲电源的控制系统是在DSP+FPGA联合控制的基础上,加上电源采样保护电路,确保电源的安全运行,重点设计了脉冲回路采样保护电路的脉冲一次侧过零过流电路,同时设计了一种DSP与FPGA组合控制的IGBT开关控制逻辑。     

全桥拓扑同步整流和有源钳位的电路设计

研究了提高数字全桥拓扑效率的方法,通过在副边采用同步整流和有源钳位的方法,有效提高了电源效率。同步整流降低了输出电压损耗,特别适用于低电压大电流的输出场合。同时使用有源钳位技术,吸收谐振尖峰,利用谐振能量,提高效率,特别适用于高电压大功率场合。     

基于L6565D的直流电压输入反激式开关电源设计

基于L6565D控制芯片,以直流电压为输入,设计反激式开关电源,作为电力电子变换器中的辅助电源。设计RCD钳位电路参数,吸收变压器漏感能量,减小功率器件电压应力;利用准谐振技术,实现功率开关器件的低电压导通,降低交叉损耗,提高电源效率。最后通过仿真和实验结果验证了电路设计的可行性。     

TL7700 voltage supervisor

It is only to be expected that the microprocessor has grabbed almost all the limelight. Hardly a month goes by without some major advance in microprocessors being announced. However, there is also a continual introduction of major new peripherals. With all the glamorous competition, interesting developments in more humble components are often overlooked. This note presents the TL7700 supply voltage supervisor. This is a simple device that performs two functions and saves a handful of discrete components. It executes the power-on-reset function required by most microprocessors and also acts as a power supply monitor that resets the microprocessor if the voltage falls below a predetermined level. This function is useful in high-volume, e.g. automotive, applications, where cost is highly important. The power supply monitoring circuit is essential in applications where there is ‘housekeeping’ to be done before the supply collapses. Another useful application of the device is the protection of battery back-up memory.     

计算机控制系统电源抗干扰问题的研究

本文研究了计算机控制系统中由电源线引入的干扰问题，介绍了几种电源杭干扰的有效方法，并开发研制了一种新型的交流净化电源。实际应用表明，该交流净化电源具有过压保护、过流保护、短路保护、欠压保护、掉电保护、抗电网干扰等功能，可有效滤除电网中的有害信号，且制作简单，成本较低。     

“腾越-Ⅱ”嵌入式异步微处理器的设计与实现

嵌入式系统对处理器功耗开销有严格的限制,异步电路技术可以作为设计低功耗处理器的有效方法之一。针对嵌入式多媒体应用,本文设计实现了一款低功耗异步微处理器——腾越-Ⅱ。处理器中包含一个异步TTA微处理器内核、一个同步TTA微处理器内核、两个存储控制器和多个外部通信接口。异步内核通过基于宏单元的异步电路设计方法实现,其它部分通过基于标准单元的半定制设计流程实现。处理器芯片采用UMC0.18μmCMOS工艺实现,基片面积为4.89×4.89mm2,工作电压为1.8V。经测试,处理器工作主频达到200MHz,且异步内核的功耗开销低于同步内核的50%。     

基于数字电位器MCP42010的程控高压电源

以商用小型DC-DC变换器模块作为高压发生器,研制了一种微型程控高压电源。以数字电位器MCP42010和AT89S52为核心设计了输入电压调节、输出电流检测和故障监测及保护电路。应用程序采用汇编语言和图形化编程语言Labview编写。体积小、重量轻的优点使得该电源非常适用于芯片电泳电导检测等微型检测仪器中。     

基于故障电流变化率的大功率本安电源设计

针对现有本安电源存在的输出功率小、保护效果差、动态响应速度慢等问题,设计了一种基于故障电流变化率的大功率本安电源。将本安电源等效为电势电容(EC)电路,分析了EC电路短路故障特性:短路初始阶段火花放电电流迅速上升,电流变化率会发生突变。通过检测短路故障后电路中故障电流变化率的值,可以提前预知故障状态,在故障电流达到传统电流保护方法所设置的保护阈值之前便触发保护功能,并在短路故障的初始阶段切断输出回路,提高本安电源的输出功率。大功率本安电源包括开关电源和本安保护电路2个部分:开关电源采用反激变换结构,其控制电路以UC3842为核心,反馈电路以光耦与三端稳压器TL431为核心;本安保护电路基于故障电流变化率来限制火花放电的能量,主要包括故障检测电路、比较电路、自恢复电路、软启动电路、驱动电路。本安电源样机性能测试结果表明,交流输入电压在90~265 V波动时,本安电源功率因数不小于0.96,输出直流电压纹波在20 mV以内,电源效率在85%以上。短路实验结果表明,本安电源在发生短路故障后的瞬态输出能量为65μJ,满足设计要求。     

ESD系统在催化装置的应用及改进

SORALCHIN炼油厂ESD系统——TS3000完成装置和机组工艺参数的监控、联锁保护和机组的防喘振控制，该系统为三重冗余容错系统（TMR）．这种三取二表决系统为催化装置和机组运行提供完善的控制和联锁保护。同时针对系统出现的问题．如系统死机、24VDC电源、主风低流量信号切除等问题提出了规避措施和改进方案。     

低压防爆开关微机综合保护装置设计

研究井下防爆开关综合保护系统,可有效避免各种电气事故的发生,保障人身安全,提高供电质量,具有非常重要的现实意义和经济价值。通过分析井下常见电气故障的特征以及低压防爆开关综合保护系统应该具有的各项保护功能,提出了相应的保护原理。以高性能单片机Intel 80296SA为中央控制单元,完成了保护装置的设计。样机调试结果表明:该综合保护系统保护动作可靠,性能稳定,对提高目前井下低压供电系统的安全性有很高的价值。     

一种新型矿用本质安全型电源的设计

针对目前煤矿井下多输入电压等级本质安全型电源的笨重和单输入电压等级本质安全型电源的局限性问题,提出了一种新型本质安全型电源的设计方案。该新型本质安全型电源采用R型隔离变压器,体积小;采用高性能的DC/DC开关转换电源,提高了本质安全型电源的转换效率,且减小了输出纹波噪声;同时采用由过流检测芯片、单稳态触发芯片、大功率三极管等组成的双重化过流和过压保护电路,提高了本质安全型电源的可靠性。