Low emitter resistance GaAs based HBT's without InGaAs caps

Low emitter resistance is demonstrated for AlGaAs/GaAs heterojunction bipolar transistors using Pd/Ge contacts on a GaAs contact layer. The contact resistivity to 2-10×10¹⁸ cm ^-3 n-type GaAs is 4-1×10^-7 Ω-cm² . These are comparable to contact resistivities obtained with non-alloyed contacts on InGaAs layers. The non-spiking Pd/Ge contact demonstrates thermal stability and area independent resistivity suitable for scaled devices. The substitution of Pd/Ge for AuGe/Ni GaAs emitter and collector contacts reduced by an order of magnitude the emitter-base offset voltage at high current densities and increased f_t by more than 15% with significantly improved uniformity for devices with 2 and 2.6 μm wide emitters having lengths two, four and six times the width     

PT／P（VDF—TrFE）复合材料的压电和热释电性能

采用压塑方法成功地制备了掺钙钛酸铅／偏氟乙烯与三氟乙烯共聚物Ｐ（ＶＤＦ－ＴｒＦＥ）０－３型复合材料。对两种极化样品的方法进行了讨论，其一是仅仅让复合样品中的陶瓷极化，另一种是让两相均被极化，当陶瓷和聚合物在同一方向极化时，其二相的压电性能部分抵消，而热释电性能增强，因此，在一定的体积比下，陶瓷与聚合物复合材料存在热释电性而无压电性，最后，测量和讨论了样品的压电常数ｄ３３，厚度耦合系数ｋｒ和热释电系     

Energy-efficient C-dump converters for switched reluctance motors

Two energy-efficient converter topologies, derived from the conventional C-dump converter, are proposed for switched reluctance motor (SRM) drives. The proposed topologies overcome the limitations of the conventional C-dump converter, and could reduce the overall cost of the SRM drive. The voltage ratings of the dump capacitor and some of the switching devices in the proposed converters are reduced to the supply voltage (V_dc) level compared to twice the supply voltage (2V _dc) in the conventional C-dump converter. Also, the size of the dump inductor is considerably reduced. The converters have simple control requirements, and allow the motor phase current to freewheel during chopping mode. Simulation and experimental results of the converters are presented and discussed     

A repetitively operable, high-current interrupter

A series of fast-acting and repetitively operable bimodal gas discharge switches capable of both the initiation and the interruption of high pulse currents at high-voltage levels has been designed, built, and tested. Based on hydrogen thyratron technology, these switches retain most of the characteristics of thyratrons when switching from the open to the closed state. In addition, the interruption of high currents against high source voltages is achieved when an externally generated, pulsed magnetic field is transversely applied to the current by means of a plasma-field interaction region built into the device. The interruption process is rapid (typically requiring less than 10 μs), complete (current is reduced to zero), and permanent (the current in the device does not restrike even when the field pulse terminates). In general, operation at lower voltages allows the interruption of higher currents for a given magnetic field energy. Typical data are the interruption of 1000 A against 15 kV with a field energy of 8 J, and 100 A against 50 kV with a field energy of 33 J. The theory, design, and construction of such switches are described, and the results of various parametric studies are discussed. It is shown that the voltage level of the interruption is the dominant factor affecting both the conduction and interruption characteristics of the device. A unique interaction region geometry that markedly reduces magnetic field energy requirements is described. It is shown that with proper interaction region design, the voltage drop across the switch during conduction is only about 2 percent of the applied voltage for a switch capable of opening against 50 kV. The device is scalable to various voltage and current levels, and has an inherent repetition rate capability of the order of 10 kHz.     

New single-switch three-phase high-power-factor rectifiers usingmultiresonant zero-current switching

A new family of single-switch three-phase high-power-factor rectifiers, which have continuous input and output currents, is introduced. By using a multiresonant scheme, the transistor operates with zero-current switching (ZCS), and the diodes operate with zero-voltage switching (ZVS). These multiresonant rectifiers with a single transistor are capable of drawing a higher quality input-current waveform at nearly unity power factor and lower stresses than quasi-resonant rectifiers. Buck-type converters are used for the power stage, and, hence, the output voltage is lower than the input voltage. Moreover, these rectifiers have a wide load range and low stresses on semiconductor devices. From the analysis, normalized characteristics of the rectifier are derived. The design and breadboard implementation of the rectifier delivering 147 V_dc at 6 kW from a 3φ 240-V _rms(LL) input is described. The total harmonic distortion (THD) of the line current is less than 5%, and the system efficiency is about 94% at the full load     

Small-sized collector-up Ge/GaAs heterojunction bipolar transistorswith high gain, low base resistance, and high fmax

Small-sized collector-up Ge/GaAs HBT's are successfully fabricated and their operation at a high collector current density and at a high frequency is realized for the first time. The current gain of these devices reaches a peak value as large as 200 at a current density 6×10⁴ Acm^-2, and no degradation in the current gain is observed as the collector width is decreased down to 2 μm. The capability of lower voltage operation is also shown. Intrinsic and extrinsic base resistances are as low as 180 Ω/□ and 90 Ω/□, respectively. The calibrated values of f_T and f_max are 25 GHz and 60 GHz, respectively. The larger value of f_max compared with f_T might be attributed to low base resistance and low base-collector capacitance as expected from the collector-up structure     

Highly efficient enhancement-mode power heterojunction FET withmultilayer cap and doped recess structure for 3.5-V digital cellularphones

This paper describes the highly efficient 950-MHz power performance of an enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET) under 3.5-V operation for personal digital cellular (PDC) phones. The device has a multilayer cap and a double recess structure in which a highly doped GaAs layer is employed beneath a wide recess for reducing on-resistance (R_0n) and increasing maximum drain current (I_max). A developed device exhibited 1.6 Ω·mm R₀n and 400 mA/mm I_max with a threshold voltage of +0.18 V. Under single 3.5-V operation, the 24-mm HJFET, with less than 50 μA drain current at a gate-to-source voltage of 0.0 V, exhibited 1.15 W output power and 67.6% power-added efficiency (PAE) with an adjacent channel leakage power of -48.4 dBc at 50 kHz off-center frequency     

High-performance InP-based enhancement-mode HEMTs using non-alloyedohmic contacts and Pt-based buried-gate technologies

High performance InP-based InAlAs/InGaAs enhancement-mode HEMT's are demonstrated using two improved approaches to device structure design and fabrication, i.e., nonalloyed ohmic contacts and Pt-based buried-gate technologies, to reduce the source resistance (R_S). With specially designed cap layer structures, nonalloyed ohmic contacts to the device channel were obtained providing contact resistance as low as 0.067 Ω·mm. Furthermore, in device fabrication, a Pt-based buried-gate approach is used in which depletion-mode HEMTs are first intentionally fabricated, and then, the Pt-based gate metal is annealed at 250°C, causing the Pt-InAlAs reaction to take place under the gate electrode so that Pt sinks into InAlAs and depletes the channel. As a result, the depletion-mode HEMTs are changed to enhancement-mode, while the channel region between the source and gate electrodes remain undepleted, and therefore, the small R _S of 0.2 Ω·mm can be maintained. Excellent maximum transconductance of 1170 mS/mm was obtained for a 0.5-μm-gate device. A maximum current-gain cutoff frequency f_T of 41.2 GHz and maximum unilateral power-gain cutoff frequency f_max of 61 GHz were demonstrated for a 0.6-μm-gate enhancement-mode HEMT     

Analytical circuit model for thin film electroluminescent devices

A simple equivalent circuit is developed for alternating current thin film electroluminescent devices. With sinusoidal excitation voltage an exact analytical solution is presented for calculating the device current, transferred charge and the internal voltage across the phosphor layer. The circuit is used for modeling EL devices with widely varying phosphor layer materials that include ZnS, CaS, SrS, CaF₂, SrF₂, ZnF₂ and multilayer structures prepared with Atomic Layer Deposition. The equivalent circuit gives a straightforward way to characterize the electrical properties of these materials. The fluorides have inferior breakdown properties compared to sulfides although they are much more symmetric. The strong asymmetry of SrS is attributed to its nonuniform defect distribution     

Temperature-dependent nonlinearities in GaN/AlGaN HEMTs

Temperature-dependent nonlinearities of GaN/AlGaN HEMTs are reported. The large-signal device model of the transistor is obtained by using a physics-based analysis. The model parameters are obtained as functions of bias voltages and temperature. The analysis of the device has been carried out using a time-domain technique. f_max for a 0.23 μm×100 μm Al_0.13Ga_0.87N/GaN FET is calculated as 69 GHz at 300 K, while at 500 K, f_max decreases to 30 GHz, which are in agreement with the experimental data within 7% error. f_max as obtained from calculated unilateral gain, decreases monotonically with increasing temperature. For shorter gate lengths irrespective of the operating temperature f_max is less sensitive to bias voltage scaling. For longer gate length devices, f_max becomes less sensitive to the bias voltage scaling at elevated temperatures. 1-dB compression point (P_1-dB ) at 4 GHz for a 1 μm×500 μm Al_0.15Ga_0.85N/GaN FET is 13 dBm at 300 K. At 500 K, P_1-dB decreases to 2.5 dBm for the same operating frequency. Similar results for output referred third intercept point (OIP3) are reported for different gate length devices     

The effects of source/drain resistance on deep submicrometer deviceperformance

As MOSFET channel lengths approach the deep-submicrometer regime, performance degradation due to parasitic source/drain resistance (R _sd) becomes an important factor to consider in device scaling. The effects of R_sd on the device performance of deep-submicrometer non-LDD (lightly doped drain) n-channel MOSFETs are examined. Reduction in the measured saturation drain current (R_sd=600 Ω-μm) relative to the ideal saturation current (R_sd=0.0 Ω-μm) is about 4% for L_eff=0.7 μm and T_ox =15.6 nm and 10% for L_eff=0.3 μm and T _ox=8.6 nm. Reduction of current in the linear regime and reduction of the simulated ring oscillator speed are both about three times higher. The effect of salicide technologies on device performance is discussed. Projections are made of the ultimate achievable performance     

Hot-carrier effects in thin-film fully depleted SOI MOSFET's

Previous conflicting reports concerning fully depleted SOI device hot electron reliability may result from overestimation of channel electric field (E_m). Experimental results using SOI MOSFET's with body contacts indicate that E_m is just a weak function of thin-film SOI thickness (T_si and that E_m can be significantly lower than in a bulk device with drain junction depth (X _j) comparable to SOI's T_si. The theoretical correlation between SOI MOSFET's gate current and substrate current are experimentally confirmed. This provides a means (I_G) of studying E_m in SOI device without body contacts. Thin-film SOI MOSFET's have better prospects for meeting breakdown voltage and hot-electron reliability requirements than previously thought     

Monolithic Integration of InP HBTs and Uni-Traveling-Carrier Photodiodes Using Nonselective Regrowth

This paper describes the monolithic integration of InP HBTs and uni-traveling-carrier photodiodes (UTC-PDs) by nonselective regrowth. HBTs are fabricated from nonselectively regrown device layers and UTC-PD subcollector layers, which are grown first on a 3-in InP substrate. This makes it possible to optimize the layer design for the HBTs and UTC-PDs independently and minimize the interconnection between them. The fabricated HBTs have a collector thickness of 200 nm, and they show an f_t of 260 GHz and an f_max of 320 GHz at a collector current density of 2.5 mA/mum². The standard deviations of the f_t and f_max across the wafer are 1.7% and 4.4%, respectively. The length of the interconnection between the HBTs and UTC-PDs can be made as small as 10 mum without any degradation of the regrown-HBT performance. The UTC-PDs fabricated on the same wafer exhibit a 3-dB bandwidth of 100 GHz and an output voltage of 1.0 V. There is no drawback in the performance of either device, as compared with that of discrete devices. We also demonstrate 100-GHz optical-input divide-by-two optoelectronic integrated circuits (OEICs) consisting of InP HBTs and a UTC-PD using this technique. These results indicate that the nonselective regrowth is promising for application toward over 100-Gb/s OEICs.     

Study of injection effects on BSF silicon solar cells

The behavior of p⁺-n-n⁺ and n⁺-p-p⁺ silicon solar cells in terms of short-circuit current, open-circuit voltage, fill factor, and efficiency is studied as a function of base doping and illumination levels. A theoretical model that is valid for any injection level in the base region is used. Experimental results for cells of n-type base (in the range of 0.3 to 1000 Ω-cm) and a p-type base (0.4 to 300 Ω-cm) are presented. The theoretical model is able to explain phenomena such as the superlinearity of I_sc with concentration and the degradation of short-circuit current and efficiency at very high concentrations. These effects are seen as connected with the ohmic electric field in the base region. For the emitter saturation currents considered here, it can be concluded that, for p-type substrates, low base resistivities (≅1 Ω-cm) are necessary to achieve high efficiencies under concentrated light (≅100 suns), while for flat-array cells a particular resistivity is not required. For n-type substrates, it is found that any resistivity level can be used for both flat-array and concentrator cells     

Avalanche robustness of SiC Schottky diode

Reliability is one of the key issues for the application of Silicon carbide (SiC) diode in high power conversion systems. For instance, in high voltage direct current (HVDC) converters, the devices can be submitted to high voltage transients which yield to avalanche. This paper presents the experimental evaluation of SiC diodes submitted to avalanche, and shows that the energy dissipation in the device can increase quickly and will not be uniformly distributed across the surface of the device. It has been observed that failure occurs at a fairly low energy level (< 0.3 J/cm²), on the edge of the die, where the electrical field intensity is the greatest. The failure results in the collapse of the voltage across the diode (short-circuit failure mode). If a large current is maintained through the diode after its failure, then the damage site is enlarged, masking the initial failure spot, and eventually resulting in a destruction of the device and an open circuit.     

High-speed low-voltage modulation with a nonsymmetric Mach-Zehnderinterferometer

The authors demonstrate broadband optical modulation with a Ti:LiNbO₃ nonsymmetric interferometer at microwave frequencies up to 16 GHz. The 3-dB bandwidth of 8.7 GHz is only slightly less than the theoretical limit of 9.6 GHz for a 1-cm-long device. The device uses a 2-μm-thick gold-plated asymmetric stripline electrode, with a characteristic impedance of 40 Ω and ohmic loss of 3 dB/cm at 10 GHz. The DC switching voltage is 6.5 V, and the on/off ratio is -16 dB. Fabrication tolerances in the nonsymmetric interferometer are much less strict than for directional coupler modulators with comparable performance, making this device a better candidate for use in communications systems     

Temperature-dependence investigation of a high-performance inverteddelta-doped V-shaped GaInP/InxGa1-xAs/GaAspseudomorphic high electron mobility transistor

A newly designed inverted delta-doped V-shaped GaInP/In_xGa_1-xAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) has been successfully fabricated and studied. For a 1×100 μm² device, a high gate-to-drain breakdown voltage over 30 V at 300 K is found. In addition, a maximum transconductance of 201 mS/mm with a broad operation regime for 3 V of gate bias (565 mA/mm of drain current density), a very high output drain saturation current density of 826 mA/mm, and a high DC gain ratio of 575 are obtained. Furthermore, good temperature-dependent performances at the operating temperature ranging from 300 to 450 K are found. The unity current gain cutoff frequency f_T and maximum oscillation frequency f_max up to 16 and 34 GHz are obtained, respectively. Meanwhile, the studied device shows the significantly wide and flat gate bias operation regime (3 V) for microwave performances     

A new GaAs technology for stable FETs at 300°C

A technology for the fabrication of GaAs devices for operation at 300°C is presented. The high reliability of the devices is mainly due to diffusion barrier of WSi₂ in the ohmic contacts and to an optimized Si₃N₄ passivation. It is shown that MESFETs produced with this technology demonstrate a remarkable stability of their characteristics, even after 100 h of storage at 300°C, and only a little degradation after 100 h at 400°C     

Impact ionization and transport in the InAlAs/n+-InPHFET

We have carried out an experimental study exploring both impact ionization and electron transport in InAlAs/n⁺-InP HFET's. Our devices show no signature of impact ionization in the gate current, which remains below 17 μA/mm under typical bias conditions for L_g=0.8 μm devices (60 times lower than for InAlAs/InGaAs HEMT's). The lack of impact ionization results in a drain-source breakdown voltage (BV_DS) that increases as the device is turned on, displaying an off-state value of 10 V. Additionally, we find that the channel electron velocity approaches the InP saturation velocity of about 10⁷ cm/s (in devices with L_g<1.6 μm) rather than reaching the material's peak velocity. We attribute this to the impact of channel doping both on the steady-state peak velocity and on the conditions necessary for velocity overshoot to take place. Our findings suggest that the InP-channel HFET benefits from channel electrons which remain cold even at large V_GS and V_DS making the device well-suited to power applications demanding small I_G, low g_d, and high BV_DS     

The influence of arc chamber wall material on arc gap dielectricrecovery voltage

The dielectric breakdown strength of an arcing contact gap after current zero was compared when using alumina, polyamide 6/6 (PA 6/6), and polyoxymethylene (POM) arc chamber wall materials. Plasma characteristics were obtained for each material by applying a reverse recovery voltage across the open contacts at a predetermined delay time after current zero. Ablation from each type of chamber wall material produced different plasma compositions each with different recovery voltage, arc voltage, and pressure characteristics. Tests were performed for an arcing current of 12 kA_p, for one half-cycle using symmetric AgW contacts. A thermal breakdown model along with an exponential curve fit to the measured results were used to obtain the initial holdoff voltage and plasma time constant for each material. PA 6/6 and POM had similar time constants with PA 6/6 having slightly better performance. Two types of breakdown mechanisms were identified-thermal and dielectric