Electric characteristics of organic thin-film transistors and logic circuits with a ferroelectric gate insulator

Organic electronic devices using a pentacene have improved importantly in the last several years. We fabricated pentacene organic thin-film transistors (OTFTs) with dielectric SiO₂ and ferroelectric Pb(Zr_0.3,Ti_0.7)O₃ (PZT) gate insulators. The organic devices using SiO₂ and PZT films had the field-effect mobility of approximately 0.1 and 0.004 cm²/V s, respectively. The drain current in the transfer curve of pentacene/PZT transistors showed a hysteresis behavior originated in a ferroelectric polarization switching. In order to investigate the polarization effect of PZT gate dielectrics in a logic circuit, the simple voltage inverter using SiO₂ and PZT films was fabricated and measured by an output-input measurement. The gain of inverter at the poling-down state was approximately 7.2 and it was three times larger than the value measured at the poling-up state.     

Formation of polycrystalline-Si thin-film transistors with tunneling field-effect-transistor structure

The formation of a poly-Si thin-film transistor (TFT) device with a tunneling field-effect-transistor (TFET) structure has been studied. With scaling the gate length down to 1 μm, the poly-Si TFT device with a conventional metal-oxide-semiconductor-field-effect-transistor structure would be considerably degraded, which exhibits an off-state leakage of about 10 nA/μm at a drain bias of 6 V. The short channel effect would tend to cause the source/drain punch-through and also increase the lateral electric field within the channel region, thus enhancing the carried field emission via trap states. The TFET structure can be employed to alleviate the short channel effect in the poly-Si TFT device. As a result, even for a gate length of 1 μm, the poly-Si TFT device with the TFET structure can exhibit an off-state leakage smaller than 1 pA/μm and an on/off current ratio of about eight orders at a drain bias of 7 V. Furthermore, even for a gate length of only 0.2 μm, the resultant poly-Si TFT device with the TFET structure can exhibit good electrical characteristics with an off-state leakage smaller than 10 pA/µm and an on/off current ratio of about six orders at a drain bias of 3.2 V. As a result, this scheme is promising for implementing a high packing density of poly-Si TFT devices.     

Performance enhancement of organic thin-film transistors with improved copper phthalocyanine crystallization by inserting ultrathin pentacene buffer

Organic thin-film transistors (OTFTs) with high crystallization copper phthalocyanine (CuPc) active layers were fabricated by inserting an ultrathin pentacene buffer layer between the dielectric and CuPc layers. Comparing with the OTFTs without a pentacene buffer layer, the charge carrier mobility of the OTFT with a buffer layer presented a much higher value of ~ 0.20 cm²/V s. Meanwhile, by investigating the morphology of the CuPc active layer with an ultrathin pentacene buffer layer through scanning electron microscopy and X-ray diffraction, the high crystallization of the CuPc film with a larger grain size and less grain boundaries can be observed. As a result, the resistance of the conducting channel was decreased, leading to a performance improvement of the OTFTs.     

Analysis of effective channel length variation for thin-film transistors with edge waviness in source/drain electrodes

We analyzed the effective channel length variation of hydrogenated amorphous silicon thin-film transistors (TFTs) that have wavy edge source/drain (S/D) electrodes. Edge waviness is frequently observed when narrow electrodes are fabricated by using printing methods. We used hydrogenated amorphous silicon (a-Si:H) TFTs and photolithographically patterned wavy edge S/D electrodes for accurate analysis. From a transmission line method (TLM), we successfully related the channel current variation to the variation of current transfer length (L_{T_wavy}) of the wavy edge S/D electrodes originated from current spreading and geometrical edge waviness effects which can be separately extracted.     

Pentacene thin-film transistor with poly(methyl methacrylate-co-methacrylic acid)/TiO2 nanocomposite gate insulator

A poly(methyl methacrylate-co-methacrylic acid) (PMMA-co-MAA) and titanium dioxide (TiO₂) composite was fabricated to use as a gate insulator in pentacene-based organic thin-film transistors (OTFTs). The dispersion stability was confirmed by observing the sedimentation time of TiO₂ nanoparticles in the PMMA-co-MAA solution, which is essential to avoid a severe gate-leakage current in OTFTs. From the measured capacitance-frequency characteristics, a dielectric constant value of 4.5 was obtained for the composite film and 3.3 for the PMMA-co-MAA film. Consequently, we could enhance the field-induced current and reduce the threshold voltage of OTFT by adopting the composite insulator, without augmenting the gate-leakage current.     

An investigation of contact resistance between metal electrodes and amorphous gallium-indium-zinc oxide (a-GIZO) thin-film transistors

This paper reports our investigation of different source/drain (S/D) electrode materials in thin-film transistors (TFTs) based on an indium-gallium-zinc oxide (IGZO) semiconductor. Transfer length, contact resistance, channel conductance, and effective resistances between S/D electrodes and amorphous IGZO thin-film transistors were examined. Intrinsic TFT parameters were extracted by the transmission line method (TLM) using a series of TFTs with different channel lengths measured at a low drain voltage. The TFTs fabricated with Cu S/D electrodes showed the lowest contact resistance and transfer length indicating good ohmic characteristics, and good transfer characteristics with intrinsic field-effect mobility (μ_FE-i) of 10.0 cm²/Vs.     

High mobility top-gated poly(3-hexylthiophene) field-effect transistors with high work-function Pt electrodes

We report high-performance top-gated organic field-effect transistors (OFETs) with regio-regular poly(3-hexylthiophene) (rr-P3HT). The high charge carrier mobility in rr-P3HT FETs (0.4 cm²/Vs) was achieved due to the relatively low contact resistance and high crystallinity of rr-P3HT films. The contact resistance was controlled mainly through the use of high work-function platinum (Pt) (5.6 eV) for the charge injection electrode and a top-gate, bottom-contact geometry that enabled an enhanced current injection via current crowding in the staggered device structure. Moreover, the top-gate configuration provided improved device stability in air ambient conditions via the presence of a gate dielectric and gate electrode on top of the organic semiconductor.     

Contact resistance and megahertz operation of aggressively scaled organic transistors

Bottom-gate, top-contact organic thin-film transistors (TFTs) with excellent static characteristics (on/off ratio: 10(7) ; intrinsic mobility: 3 cm(2) (V s)(-1) ) and fast unipolar ring oscillators (signal delay as short as 230 ns per stage) are fabricated. The significant contribution of the transfer length to the relation between channel length, contact length, contact resistance, effective mobility, and cutoff frequency of the TFTs is theoretically and experimentally analyzed.     

Photopatternable poly(4-styrene sulfonic acid)-wrapped MWNT thin-film source/drain electrodes for use in organic field-effect transistors

We describe the cross-linking of poly(4-styrene-sulfonic acid) (PSS) by exposure to ultraviolet (UV) light (λ = 255 nm) under a vacuum. Fourier transform infrared (FT-IR) spectroscopy and X-ray photoelectron spectroscopy (XPS) showed that the photo-crosslinking of PSS resulted from coupling between radicals that were generated in the polymer chains by UV excitation. The photo-cross-linkable characteristics of PSS were employed to fabricate solution-processable, photopatternable, and conductive PSS-wrapped multiwalled carbon nanotube (MWNT) composite thin films by wrapping MWNTs with PSS in water. During photo-cross-linking, the work function of the PSS-wrapped MWNTs decreased from 4.83 to 4.53 eV following cleavage of a significant number of sulfonic acid groups. Despite the decreased work function of the PSS-wrapped MWNTs, the photopatterned PSS-wrapped MWNTs produced good source/drain electrodes for OFETs, yielding a mobility (0.134 ± 0.056 cm2/(V s)) for the TIPS-PEN field-effect transistors fabricated using PSS-wrapped MWNTs as source/drain electrodes that was higher than the mobility of gold-based transistors (0.011 ± 0.004 cm2/(V s)).     

Process development of ITO source/drain electrode for the top-gate indium-gallium-zinc oxide transparent thin-film transistor

Indium-tin oxide (ITO) has been widely used as electrodes for LCDs and OLEDs. The applications are expanding to the transparent thin-film transistors (TTFT_S) for the versatile circuits or transparent displays. This paper is related with optimization of ITO source and drain electrode for TTFTs on glass substrates. For example, un-etched ITO remnants, which frequently found in the wet etching process, often originate from unsuitable ITO formation processes. In order to improve them, an ion beam deposition method is introduced, which uses for forming a seed layer before the main ITO deposition. We confirm that ITO films with seed layers are effective to obtain clean and smooth glass surfaces without un-etched ITO remnants, resulting in a good long-run electrical stability of the top-gate indium-gallium-zinc oxide-TTFT.     

Simulation of the organic thin film thickness distribution for multi-source thermal evaporation process

A model of multi-source thermal evaporation process was proposed to achieve higher deposition rate and uniformity of organic thin film. In this model, several point type sources were uniformly distributed around a circle and evaporated simultaneously to form a surface-like source. Based on the Monte Carlo method, the evaporation process was simulated, and the effect of the number of point type sources, circle radius and source-substrate distance on the uniformity was analyzed. Based on the method proposed in this paper, the uniformity of the thickness in the organic layer was successfully controlled in 5%.     

Polymer binder effects on the electrical characteristics of 6, 13-bis(triisopropylsilylethynyl)-pentacene thin-film transistors in different solvents

This paper presents the effects of the polymer binder on the electrical properties of 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) organic thin-film transistors (OTFTs) which have been fabricated using a variety of 2 wt.% TIPS-pentacene solutions that have been prepared in different solutions, including anisole, toluene, and chlorobenzene. Poly(triarylamine) (PTAA) is added as a polymer binder to help the TIPS-pentacene form a stronger binding, thus improving device performances. By using these materials as the active channel, a molecular guest-host system is formed, with TIPS-pentacene as the host and the PTAA as the guest. Introducing the TIPS-pentacene solutions means that the polymer binder and the solvent dependent electrical characteristics can be investigated to determine if the device exhibits the best performance when the solution is prepared with anisole as the solvent and PTAA as the polymer binder. Consequently, a device made from anisole with PTAA exhibits superior electrical properties in comparison to the devices made with the other solutions including the saturation field-effect mobility (μ_sat) ?of 0.21 cm²/V?s, current on/off ratios of 5 × 10⁶, and a sub-threshold slope (SS) of 0.46 V/dec at a gate bias V_GS = -40 V.     

Study of surface-modified PVP gate dielectric in organic thin film transistors with the nano-particle silver ink source/drain electrode

We have fabricated the flexible pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics treated by CF4/O2 plasma on poly[ethersulfones] (PES) substrate. The solution of gate dielectrics is made by adding methylated poly[melamine-co-formaldehyde] (MMF) to PVP. The PVP gate dielectric layer was cross linked at 90 degrees under UV ozone exposure. Source/drain electrodes are formed by micro contact printing (MCP) method using nano particle silver ink for the purposes of low cost and high throughput. The optimized OTFT shows the device performance with field effect mobility of the 0.88 cm2/V s, subthreshold slope of 2.2 V/decade, and on/off current ratios of 1.8 x 10(-6) at -40 V gate bias. We found that hydrophobic PVP gate dielectric surface can influence on the initial film morphologies of pentacene making dense, which is more important for high performance OTFTs than large grain size. Moreover, hydrophobic gate dielelctric surface reduces voids and -OH groups that interrupt the carrier transport in OTFTs.     

Influence of NiCr/Au electrodes and multilayer thickness on the electrical properties of PANI/PVS ultrathin film grown by Lbl deposition

In the present work, we concentrate on the study of effects of metallic electrodes, multilayer thickness and temperature in ac and dc electrical conductivity of polyaniline/poly(vinyl sulfonic acid) (PANI/PVS) ultrathin films. The polymer system was obtained from layer-by-layer (Lbl) self-assembly technique on a glass substrate with an electrode array of adhesion layer of NiCr (20 nm) covered with Au (180 nm). We observed a significant and abrupt increase in the value of dc conductivity and a change of ac conductivity behavior of NiCr/Au-PANI/PVS-NiCr/Au structure when the thickness of PANI/PVS system reaches the Au layer. These effects were ascribed to the ideal contact of Au-PANI/PVS and the relative high interfacial contact resistance between PANI/PVS and NiCr, thus reducing the parallel resistance of NiCr/Au-PANI/PVS interfacial layer in an ideal parallel plate capacitor structure. Atomic Force Microscopy images confirm this assumption. Furthermore, the ac conductivity of Au-PANI/PVS-Au structure was typical of solid disordered materials. A model based on carrier hopping in a medium with randomly varying energy barriers was presented for the ac conductivity of the polymer system, which also encompasses the high dielectric constant of PANI/PVS blended films, the neutral contact Au-PANI/PVS, and the electrical resistance of NiCr-PANI/PVS interfacial layer. The model allowed separating the interface and the bulk effects in the electrical response of NiCr/Au-PANI/PVS-NiCr/Au structure and in addition the highest activation energy (35 MeV) correlated with an optimization of hopping distance (30 nm) for carriers jumps in PANI/PVS system.     

Improvement in the bias stability of zinc oxide thin-film transistors using Si3N4 insulator with SiO2 interlayer

The performance of ZnO thin film transistors (TFT) subjected to SiO₂ interlayer treatments on Si₃N₄ insulators was investigated. In the case of a SiO₂ interlayer of 10 nm on Si₃N₄ insulator, a drastic improvement in device performance was obtained. ZnO TFT with this interlayer showed reduced trap density between the Si₃N₄ and ZnO channel, bringing remarkable improvement in bias stability characteristics. These devices show good performance and exhibit a high field-effect mobility of 6.41 cm²/Vs, an on/off current ratio of 10⁸, and a subthreshold swing of 1.46 V/decade. Also, the turn-on voltage shifted from − 2 V to − 6 V with negligible changes in the subthreshold swing and field effect mobility after total stress time.     

Analysis of surface states and series resistance in Au/n-Si Schottky diodes with insulator layer using current-voltage and admittance-voltage characteristics

In order to good interpret the experimentally observed Au/n-Si (metal-semiconductor) Schottky diodes with thin insulator layer (18 Å) parameters such as the zero-bias barrier height (Φ_bo), ideality factor (n), series resistance (R_s) and surface states have been investigated using current-voltage (I-V), capacitance-frequency (C-f) and conductance-frequency (G-f) techniques. The forward and reverse bias I-V characteristics of Au/n-Si (MS) Schottky diode were measured at room temperature. In addition, C-f and G-f characteristics were measured in the frequency range of 1 kHz-1 MHz. The higher values of C and G at low frequencies were attributed to the insulator layer and surface states. Under intermediate forward bias, the semi-logarithmic Ln (I)-V plot shows a good linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor (n), the zero-barrier height (Φ_bo) and the saturation current (I_S) evaluated to 2.878, 0.652 and 3.61 × 10⁻⁷ A, respectively. The diode shows non-ideal I-V behavior with ideality factor greater than unity. This behavior can be attributed to the interfacial insulator layer, the surface states, series resistance and the formation barrier inhomogeneity at metal-semiconductor interface. From the C-f and G-f characteristics, the energy distribution of surface states (N_ss) and their relaxation time (τ) have been determined in the energy range of (E_c − 0.493E_v)-(E_c − 0.610) eV taking into account the forward bias I-V data. The values of N_ss and τ change from 9.35 × 10¹³ eV⁻¹ cm⁻² to 2.73 × 10¹³ eV⁻¹ cm⁻² and 1.75 × 10⁻⁵ s to 4.50 × 10⁻⁴ s, respectively.     

Change of interstrand contact resistance and coupling loss in various prototype ITER NbTi conductors with transverse loading in the Twente Cryogenic Cable Press up to 40,000 cycles

The multistrand NbTi conductors for the Poloidal Field (PF) Coils of the International Thermonuclear Experimental Reactor (ITER) are subjected to heavy transverse loading due to the Lorentz forces in the coils. The current in the multistage Cable-In-Conduit Conductors (CICC) exceeds 50 kA and the magnetic field reaches up to more than 6 T for a few tens of thousands of pulses. The large transverse forces, accumulating from strand to strand over the cable cross-section, cause a severe deformation of the cable bundle inside the conduit and this goes along with electromagnetic, mechanical, and thermohydraulic effects. In order to study the electromagnetic and mechanical behaviour in more detail, a Cryogenic Cable Press is build to simulate the effect of the Lorentz forces on a conductor comparable to the present design for ITER in magnet operating conditions. The magnetisation of the conductor (and from this the coupling loss expressed in nτ) and the interstrand resistance (R_c) between various strands and strand bundles inside the cable can be measured along the loading history, starting at virgin condition and accordingly subjected to various loads. The results, all obtained on eight full-size ITER type NbTi conductor samples with a variety of cable strand layout and coatings, are reported here.A consistent correlation is found between the experimental AC loss and interstrand contact resistance (R_c) results. It is also observed that there is a strong impact of cyclic loading on the AC loss and R_c which may change up to orders of magnitude. The variation of the AC loss due to transverse cyclic loading of CICC conductors in ITER coils can be accomplished by reducing the void fraction. The results point out that cyclic loading with a significant number of cycles, sufficient to reach a saturation after having passed the peak transverse resistance, should be included in next tests on large NbTi CICC's and PF Model Coils as the AC loss and ability of current sharing among strands will vary along the loading history.     

Surface poisoning in the nucleation and growth of palladium atomic layer deposition with Pd(hfac)2 and formalin

Palladium (Pd) atomic layer deposition (ALD) can be performed with Pd(hfac)₂ (hfac = hexafluoroacetyl-acetone) and formalin as the reactants. For Pd ALD on oxide surfaces, the nucleation of Pd ALD has been observed to require between 20 and 100 ALD cycles. To understand the long nucleation periods, this study explored the surface reactions occurring during Pd ALD nucleation and growth on hydroxylated Al₂O₃ substrates. In situ Fourier transform infrared (FTIR) spectroscopy on high surface area nanopowders was used to observe the surface species. The adsorption of Pd(hfac)₂ on hydroxylated Al₂O₃ substrates was found to yield both Pd(hfac)* and Al(hfac)* surface species. The identity of the Al(hfac)* species was confirmed by separate FTIR studies of hfacH adsorption on the hydroxylated Al₂O₃ substrates. Isothermal loss of the Al(hfac)* species revealed second-order kinetics at 448-523 K with an activation barrier of E_d = 39.4 kcal/mol. The lack of correlation between Al(hfac)* and AlOH* species during the loss of Al(hfac)* species suggested that the Al(hfac)* species may desorb as Al(hfac)₃. After Pd(hfac)₂ exposure and the subsequent formalin exposure on hydroxylated Al₂O₃ substrates, only hfac ligands from Pd(hfac)* species were removed from the surface. In addition, the formalin exposure added formate species. The Al(hfac)* species was identified as the cause of the long nucleation period because Al(hfac)* behaves as a site blocker. The surface poisoning by Al(hfac)* species was corroborated by adsorbing hfacH prior to the Pd(hfac)₂ exposures. The amount of Pd(hfac)* species after Pd(hfac)₂ exposures decreased progressively versus the previous hfacH exposure. Pd ALD occurred gradually during the subsequent Pd ALD cycles as the Al(hfac)* species were slowly removed from the Al₂O₃ surface. Ex situ transmission electron microscopy analysis revealed Pd nanoclusters that grew in size and dispersion with increasing number of Pd ALD cycles. These nanoclusters eventually coalesced to form a continuous Pd ALD film. Surface poisoning by the hfac ligands may help to explain the nucleation difficulties for metal ALD on oxide substrates using β-diketonate reactants.