Thin film transistors by solution-based indium gallium zinc oxide/carbon nanotubes blend

Solution-based indium gallium zinc oxide (IGZO)/single-walled carbon nanotubes (SWNTs) blend have been used to fabricate the channel of thin film transistors (TFTs). The electrical characteristics of the fabricated devices were examined. We found a low leakage current and a higher on/off currents ratio for TFT with SWNTs compared to solution-based TFTs made without SWNTs. The saturation field effect mobility (μ_sat) of about 0.22 cm²/Vs, the current on/off ratio is ~ 10⁵, the subthreshod swing is ~ 2.58 V/decade and the threshold voltage (V_th) is less than − 2.3 V. We demonstrated that the solution-based blend active layer provides the possibility of producing higher performance TFTs for low-cost large area electronic and flexible devices.     

An investigation of contact resistance between metal electrodes and amorphous gallium-indium-zinc oxide (a-GIZO) thin-film transistors

This paper reports our investigation of different source/drain (S/D) electrode materials in thin-film transistors (TFTs) based on an indium-gallium-zinc oxide (IGZO) semiconductor. Transfer length, contact resistance, channel conductance, and effective resistances between S/D electrodes and amorphous IGZO thin-film transistors were examined. Intrinsic TFT parameters were extracted by the transmission line method (TLM) using a series of TFTs with different channel lengths measured at a low drain voltage. The TFTs fabricated with Cu S/D electrodes showed the lowest contact resistance and transfer length indicating good ohmic characteristics, and good transfer characteristics with intrinsic field-effect mobility (μ_FE-i) of 10.0 cm²/Vs.     

The influence of fabrication process on top-gate thin-film transistors

Amorphous indium zinc oxide (a-IZO) thin-film transistors (TFTs) with bottom- and top-gate structures were fabricated at room temperature by direct current (DC) magnetron sputter in this research. High dielectric constant (κ) hafnium oxide (HfO₂) films and a-IZO were deposited for the gate insulator and the semiconducting channel under a mixture of ambient argon and oxygen gas, respectively. The bottom-gate TFTs showed good TFT characteristics, but the top-gate TFTs did not display the same characteristics as the bottom-gate TFTs despite undergoing the same process of sputtering with identical conditions. The electrical characteristics of the top-gate a-IZO TFTs exhibited strong relationships with sputtering power as gate dielectric layer deposition in this study. The ion bombardment and incorporation of sputtering ions damaged the interface between the active layer and the gate insulator in top-gate TFTs. Hence, the sputtering power was reduced to decrease damage while depositing HfO₂ films. When using 50 W DC magnetron sputtering, the top-gate a-IZO TFTs showed the following results: a saturation mobility of 5.62 cm²/V-s; an on/off current ratio of 1 × 10⁵; a sub-threshold swing (SS) of 0.64 V/decade; and a threshold voltage (V_th) of 2.86 V.     

Amorphous oxide channel TFTs

Thin film transistors (TFTs) using amorphous oxides of post-transition metals: indium, gallium, and zinc for the channel materials are fabricated with radio-frequency magnetron sputtering methods for the deposition of the channel and the gate insulator layers, at room temperature with no high-temperature post-deposition annealing process. The TFTs operate as n-channel field-effect transistors with various structures of top/bottom gate and top/bottom source-and-drain contact including the inverse-stagger types, and with various materials for the gate insulators, the electrodes, and the substrates. The TFTs having smoother channel interfaces show the better performance at the saturation mobility beyond 10 cm² V^− 1 s^− 1 and the on-to-off current ratio over 10⁸ than the rough channel interfaces. The ring oscillator circuits operate with five-stage inverters of the top-gate TFTs or the inverse-stagger TFTs. Organic light-emission diode cells are driven by a simple circuit of the TFTs. It is also found by a combinatorial approach to the material exploration that the TFT characteristics can be controlled by the composition ratio of the metals in the channel layers. The amorphous oxide channel TFTs fabricated with sputtering deposition at low temperature could be a candidate for key devices of large-area flexible electronics.     

Analysis of carrier modulation in channel of ferroelectric-gate transistors having polar semiconductor

We have been fabricated and characterized a ferroelectric-gate thin-film transistors (TFTs) using ZnO as a channel polar semiconductor and YMnO₃ as a ferroelectric gate. A typical n-channel transistor property showing clear drain current saturation in I_D-V_D (drain current - drain voltage) characteristics was recognized. When the 3 V of the gate voltage is applied under the 4 V of drain voltage, the large drain current of about 1.1 mA is obtained. These controlled-polarization-type ferroelectric-gate TFTs using ZnO-channel TFTs operate in the accumulation-depletion mode and the ON/OFF state of the ferroelectric-gate TFTs strongly depends on the polarization switching of P_SFe. In this paper, therefore, the polarization switching of P_SFe in the TFT is carefully examined and the relationship between the polarization switching and the carrier accumulation (depletion) state is discussed using impedance spectroscopy and Capacitance-Voltage (C-V) measurements at applied the gate voltage.     

High-performance amorphous indium-gallium-zinc oxide thin-film transistors with polymer gate dielectric

The fabrication of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a spin-coated polymer gate dielectric on a glass substrate is reported. The interface state density at the poly(4-vinylphenol)/a-IGZO interface is only around 4.05 × 10¹¹ cm^− 2. The TFTs' threshold voltage, subthreshold swing, on-off current ratio, and carrier mobility are 2.6 V, 1.3 V/decade, 1 × 10⁵, and 21.8 cm²/V s, respectively. These characteristics indicate that the TFTs are suitable for use as nonvolatile memory devices and in flexible electronic applications.     

Performance enhancement of organic thin-film transistors with improved copper phthalocyanine crystallization by inserting ultrathin pentacene buffer

Organic thin-film transistors (OTFTs) with high crystallization copper phthalocyanine (CuPc) active layers were fabricated by inserting an ultrathin pentacene buffer layer between the dielectric and CuPc layers. Comparing with the OTFTs without a pentacene buffer layer, the charge carrier mobility of the OTFT with a buffer layer presented a much higher value of ~ 0.20 cm²/V s. Meanwhile, by investigating the morphology of the CuPc active layer with an ultrathin pentacene buffer layer through scanning electron microscopy and X-ray diffraction, the high crystallization of the CuPc film with a larger grain size and less grain boundaries can be observed. As a result, the resistance of the conducting channel was decreased, leading to a performance improvement of the OTFTs.     

The effect of metallization contact resistance on the measurement of the field effect mobility of long-channel unannealed amorphous In-Zn-O thin film transistors

The effect of contact resistance on the measurement of the field effect mobility of compositionally homogeneous channel indium zinc oxide (IZO)/IZO metallization thin film transistors (TFTs) is reported. The TFTs studied in this work operate in depletion mode as n-channel field effect devices with a field effect mobility calculated in the linear regime (μ_FE) of 20 ± 1.9 cm²/Vs and similar of 18 ± 1.3 cm²/Vs when calculated in the saturation regime (μ_FE^sat). These values, however, significantly underestimate the channel mobility since a large part of the applied drain voltage is dropped across the source/drain contact interface. The transmission line method was employed to characterize the contact resistance and it was found that the conducting-IZO/semiconducting-IZO channel contact is highly resistive (specific contact resistance, ρ_C > 100 Ωcm²) and, further, this contact resistance is modulated with applied gate voltage. Accounting for the contact resistance (which is large and modulated by gate voltage), the corrected μ_FE is shown to be 39 ± 2.6 cm²/Vs which is consistent with Hall mobility measurements of high carrier density IZO.     

Polymer binder effects on the electrical characteristics of 6, 13-bis(triisopropylsilylethynyl)-pentacene thin-film transistors in different solvents

This paper presents the effects of the polymer binder on the electrical properties of 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) organic thin-film transistors (OTFTs) which have been fabricated using a variety of 2 wt.% TIPS-pentacene solutions that have been prepared in different solutions, including anisole, toluene, and chlorobenzene. Poly(triarylamine) (PTAA) is added as a polymer binder to help the TIPS-pentacene form a stronger binding, thus improving device performances. By using these materials as the active channel, a molecular guest-host system is formed, with TIPS-pentacene as the host and the PTAA as the guest. Introducing the TIPS-pentacene solutions means that the polymer binder and the solvent dependent electrical characteristics can be investigated to determine if the device exhibits the best performance when the solution is prepared with anisole as the solvent and PTAA as the polymer binder. Consequently, a device made from anisole with PTAA exhibits superior electrical properties in comparison to the devices made with the other solutions including the saturation field-effect mobility (μ_sat) ?of 0.21 cm²/V?s, current on/off ratios of 5 × 10⁶, and a sub-threshold slope (SS) of 0.46 V/dec at a gate bias V_GS = -40 V.     

Amorphous In-Ga-Zn-O thin-film transistor with coplanar homojunction structure

Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) with a coplanar homojunction structure are demonstrated. The coplanar source and drain regions made of a-IGZO were formed by depositing a hydrogenated silicon nitride (SiN_X:H) layer onto the a-IGZO layer. The a-IGZO regions on which the SiN_X:H layer was directly deposited showed the low resistivity of 4.7 × 10⁻³  Ω cm and degenerated conduction. The fabricated TFT showed excellent transfer and output characteristics with a field-effect mobility of 11 cm² V^− 1 s^− 1, a subthreshold swing of 0.17 V decade^− 1, and an on-to-off current ratio larger than 1 × 10⁹. The width-normalized source-to-drain resistance (R_sdW) calculated using a channel resistance method was 51 Ω cm. This TFT also showed good stability over environment change and under electrical stress.     

Effect of magnesium oxide passivation on the performance of amorphous indium-gallium-zinc-oxide thin film transistors

Effect of hygroscopic magnesium oxide (MgO) passivation layer on the stability of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under positive bias stress and positive bias temperature stress has been investigated. The effect of MgO passivation has been observed by comparing the shift of the positive threshold voltage (V_th) after constant bias temperature stress, which were 8.2 V for the unpassivated TFTs and 1.88 V for the passivated TFTs.In addition, MgO passivated a-IGZO TFTs show also excellent stability under a humidity test since MgO passivation layer can prevent the penetration of water into back channel. In order to investigate the origin of humidity test result, we have measured X-ray photoelectron spectroscopy depth profile of both unpassivated and MgO passivated TFTs with a-IGZO back channel layers after N₂ wet annealing.     

Aging effects and electrical stability in pentacene thin film transistors

We have studied the transfer characteristic variations induced by aging effects and applied voltage in top contact pentacene thin film transistors (OTFTs) fabricated by using Polymethylmetacrylate buffer layer. The electrical stability of pentacene OTFTs was tested by applying prolonged bias stress (up to 10⁴ s) with gate voltage V_gstress = − 30 V and + 30 V. The environmental effects were analysed by measuring the degradation of electrical characteristics of OTFT exposed to air. The results have been analysed in terms of trap state model, evaluating the channel conductance using a one-dimensional approach. This allows us to correlate the transfer characteristics variations to changes in localised state distribution.     

Investigation on indium concentration dependence of solution processed indium tin oxide thin film transistors

The effect of the indium content in indium tin oxide (ITO) films fabricated using a solution-based process and ITO channel thin film transistors (TFTs) was examined as a function of the indium mole ratio. The carrier concentration and resistivity of the ITO films could be controlled by the appropriate treatments. The TFTs showed an increase in the off-current due to the enhanced conductivity of the ITO channel layer with increasing indium mole ratios, producing an increase in the field effect mobility. The characteristics of the a-ITO channel TFT showed the best performance (μ_FE of 3.0 cm² V^− 1 s^− 1, V_th of 2.0 V, and S value of 0.4 V/decade) at In:Sn = 5:1.     

Contact resistance variation in top-contact organic thin-film transistors with the deposition rate of Au source/drain electrodes

We investigated the effect of the deposition rate of Au source/drain electrodes on the contact resistance of the top-contact organic thin-film transistors (OTFTs). For the formation of source/drain contacts, Au was thermally deposited at the different rates of 0.5, 1.0, 5.0, and 13.0 Å/s. With increasing the Au deposition rate, the contact resistance extracted at the gate voltage of − 30 V could be reduced from 14 × 10⁶ to 2.4 × 10⁶ Ω, resulting in the characteristic improvements of the top-contact OTFT. It is also found that the contact resistance significantly affects the off-state currents of the device having the short channel length of 10 μm. The control of the deposition rate of source/drain electrodes is suggested to optimize the contact properties of the top-contact OTFTs as well as the device performance.     

Semi-transparent pentacene thin film transistors with NiOx electrode operating at low voltages

We demonstrate the fabrication of semi-transparent pentacene-based thin-film transistors (TFTs) with thin poly-4-vinylphenol (PVP)/high-k yttrium oxide (YO_x) double gate dielectric layers and also with thermally-evaporated NiO_x source/drain (S/D) electrodes which show a transmittance of ∼ 30-40% and sheet resistance range of 100-200 Ω/□ (controlled by deposition rate). Our pentacene TFTs with PVP (45 nm)/YO_x (100 nm) layers operated at less than − 5 V, exhibiting a decent saturation mobility (maximum 0.83 cm²/Vs) and on/off current ratios of 10⁴. When the sheet resistance of our semi-transparent NiO_x electrode increased from 100 Ω/□ to 200 Ω/□, the field mobility of our TFT decreased but was found to be still effective as 0.32 cm²/Vs.     

Low voltage ZnO thin-film transistors with Ti-substituted BZN gate insulator for flexible electronics

We report the fabrication of ZnO based thin-film transistors (TFTs) with high-k gate insulator of Ti-substituted Bi_1.5ZnNb_1.5O₇ (BZN) films. (Bi_1.5Zn_0.5)(Zn_0.4Nb_1.43Ti_0.3O₇) film deposited on Pt/Ti/SiO₂/Si substrate by pulsed laser deposition at room temperature exhibits high dielectric constant of 73 at 100 kHz, while BZN film shows much lower dielectric constant of 50, respectively. The increasing dielectric constant with increasing Ti substitution can be attributed to the presence of a highly polarizable TiO₆ octahedra and its strong correlation with the NbO₆ octahedra. All room temperature processed ZnO based TFTs using Ti-substituted BZN gate insulator exhibited filed effect mobility of 0.75 cm²/Vs and low voltage device performance less than 2.5 V.     

Optical and electrical properties of 2 wt.% Al2O3-doped ZnO films and characteristics of Al-doped ZnO thin-film transistors with ultra-thin gate insulators

Al-doped ZnO (AZO) thin films have been prepared on the c-Si oriented direction of (100) and glass substrates, by radio frequency magnetron sputtering from ZnO-2 wt.% Al₂O₃ ceramic targets. The effects of the working pressure on the optical and electrical properties of the films have been studied. The optical properties, measured by the ultraviolet-visible system, show that the transmittance and optical bandgap energy are influenced by the working pressure. The Hall resistivity, mobility, and carrier concentration were obtained by a Hall measurement system and these parameters were also influenced by the working pressure. The AZO thin-film transistors (TFTs) were fabricated on highly doped c-Si substrates. The TFT structures were made up AZO as the active layer and SiO_xN_y/SiN_x/SiO_x as the gate layer with 20 nm and 35 nm thickness, respectively. The ultra-thin TFTs had an on/off current ratio of 10⁴ and a field-effect mobility of 0.17 cm²/V·s. These results show that it is possible to fabricate an AZO TFT that can be operated with an ultra-thin gate dielectric.     

Amorphous structure and electrical performance of low-temperature annealed amorphous indium zinc oxide transparent thin film transistors

The effect of low-temperature (200 °C) annealing on the threshold voltage, carrier density, and interface defect density of amorphous indium zinc oxide (a-IZO) thin film transistors (TFTs) is reported. Transmission electron microscopy and x-ray diffraction analysis show that the amorphous structure is retained after 1 h at 200 °C. The TFTs fabricated from as-deposited IZO operate in the depletion mode with on-off ratio of > 10⁶, sub-threshold slope (S) of ~ 1.5 V/decade, field effect mobility (μ_FE) of 18 ± 1.6 cm²/Vs, and threshold voltage (V_Th) of − 3 ± 0.7 V. Low-temperature annealing at 200 °C in air improves the on-current, decreases the sub-threshold slope (1.56 vs. 1.18 V/decade), and increases the field effect mobility (μ_FE) from 18.2 to 23.3 cm²/Vs but also results in a V_Th shift of − 15 ± 1.1 V. The carrier density in the channel of the as-deposited (4.3 × 10¹⁶ /cm³) and annealed at 200 °C (8.1 × 10¹⁷ /cm³) devices were estimated from test-TFT structures using the transmission line measurement methods to find channel resistivity at zero gate voltage and the TFT structures to estimate carrier mobility.     

Effects of low-temperature ozone annealing on operation characteristics of amorphous In-Ga-Zn-O thin-film transistors

Effects of low-temperature annealing were examined for amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs). In a previous study, we reported that O₂ annealing is effective to improve performances of a-IGZO TFTs when annealed at ≥ 300 °C, but causes large negative threshold voltage shift when annealed at ≤ 200 °C. Here, we examined effects of ozone (O₃) annealing on physical properties and TFT characteristics of a-IGZO in comparison with conventional O₂ annealing. We found little differences in chemical composition, band gap and photoemission spectra between the O₂ and the O₃ annealed films. On the other hand, free electron density was suppressed well by the O₃ annealing even at low temperatures ≤ 200 °C. Moreover, even at 150 °C, the TFTs characteristics were improved to the subthreshold voltage swing of 217 mV/decade, the saturation mobility of ~ 11.4 cm²(Vs)^− 1 and the threshold voltage of 0.1 V by the O₃ annealing. It was also found that the effects of the O₃ annealing is more effective for thicker channel TFTs, which would be due to stronger oxidation power and the larger diffusion constant of oxygen atoms produced from O₃ molecules than those of O₂. These results substantiate that the O₃ annealing is more effective to improve TFT characteristics in particular for low-temperature processes at ≤ 200 °C.     

Device characteristics improvement of a-In-Ga-Zn-O TFTs by low-temperature annealing

A low-temperature process to improve performances of a-In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) fabricated at room temperature was examined. Two deposition methods, pulsed laser deposition (PLD) and RF magnetron sputtering were employed to deposit the a-IGZO channels. For the PLD case, the TFT characteristics were improved significantly by wet annealing at dew point (d.p.) of 50 °C at the annealing temperature of 200 °C. For the sputtered TFTs, a wider range of annealing temperature from 100 to 200 °C was examined. It was found that annealing at ≥ 150 °C improved the TFT characteristics when dry annealing was employed. On the other hand, wet annealing also improved μ_sat and S values, but very large negative threshold voltage (V_th) shift was observed. These results indicate that the annealing at 150 °C is enough to obtain mobility (μ_sat) as large as 8 cm² Vs^− 1, but annealing temperature as high as 200 °C provides larger μ_sat comparable to those obtained by 400 °C annealing. It is speculated that the large negative V_th shift originates from compensated donors in as-deposited sputtered films.