Broadband GaAs FET optical front-end circuit up to 5.6 GHz

Design and performance of transimpedance preamplifiers for multi-gigabit/s optical repeaters are reported using 0.3 ?m gate length GaAs FETs and a Ge-APD with a sensitive area of 30 ?m diameter. Through reduction of parasitic inductance and stray capacitance in chip assembly, a 3 dB down bandwidth of 8.2 GHz is achieved without a Ge-APD. A 3 dB down bandwidth of 5.6 GHz and good pulse response to 6.5 Gbit/s RZ pattern optical signals are achieved in an optical front-end circuit with a Ge-APD.     

Broad-band GaAs monolithic equalizing amplifiers formultigigabit-per-second optical receivers

The authors discuss the development of ICs (integrated circuits) for a preamplifier, a gain-controllable amplifier, and main amplifiers with and without a three-way divider for multigigabit-per-second optical receivers using a single-ended parallel feedback circuit, two (inductor and capacitor) peaking techniques, and advanced GaAs process technology. An optical front-end circuit consisting of a GaAs preamplifier and an InGaAs p-i-n photodiode achieves a 3-dB bandwidth of 7 GHz and -12-dBm sensitivity at 10 Gb/s. Moreover, a gain-controllable amplifier obtains a maximum gain of 15 dB, a gain dynamic range of 25 dB, and a 3-dB bandwidth of 6.1 GHz by controlling the source bias of the common-source circuit. Gain, 3-dB bandwidth, and output power of the main amplifier with the three-way divider are 17.4 dB, 5.2 GHz, and 5 dBm, respectively. These ICs can be applied to optical receivers transmitting NRZ signals in excess of 7 Gb/s     

Bipolar monolithic amplifiers for a gigabit optical repeater

Main amplifier, AGC amplifier, and preamplifier ICs have been designed and fabricated using an advanced silicon bipolar process to provide the required characteristics of repeater circuits for a gigabit optical fiber transmission system. The bipolar technology used involved a separation width of 0.3 /spl mu/m between the emitter and the base electrode. New circuit techniques were also used. The differential type main amplifier has a peaking function which can be varied widely by means of DC voltage supplied at the outside IC terminal. A bandwidth which can be varied to about three times the value for a nonpeaking amplifier is easily obtained. The gain and maximum 3-dB down bandwidth were 4 dB and 4 GHz, respectively. The main feature of the AGC amplifier is that the diodes are connected to the emitters of the differential transistor pair to improve the linearity. The maximum gain and 3-dB down bandwidth were 15 dB and 1.4 GHz, respectively, and a dynamic range of 25 dB was obtained. The preamplifier has a shunt-series feedback configuration. Furthermore, a gain and 3-dB down bandwidth of 22 dB and 2 GHz, respectively, were achieved with an optimum circuit design. The noise figure obtained was 3.5 dB.     

A 1.5-V 2–9.6-GHz Inductorless Low-Noise Amplifier in 0.13-μm CMOS

This paper presents an inductorless low-noise amplifier (LNA) design for an ultra-wideband (UWB) receiver front-end. A current-reuse gain-enhanced noise canceling architecture is proposed, and the properties and limitations of the gain-enhancement stage are discussed. Capacitive peaking is employed to improve the gain flatness and -3-dB bandwidth, at the cost of absolute gain value. The LNA circuit is fabricated in a 0.13-mum triple-well CMOS technology. Measurement result shows that a small-signal gain of 11 dB and a -3-dB bandwidth of 2-9.6 GHz are obtained. Over the -3-dB bandwidth, the input return loss is less than -8.3 dB, and the noise figure is 3.6-4.8 dB. The LNA consumes 19 mW from a low supply voltage of 1.5 V. It is shown that the LNA designed without on-chip inductors achieves comparable performances with inductor-based designs. The silicon area is reduced significantly in the inductorless design, the LNA core occupies only 0.05 mm², which is among the smallest reported designs.     

A 0.18μm CMOS 3-5 GHz broadband flat gain low noise amplifier

A 3-5 GHz broadband flat gain differential low noise amplifier (LNA) is designed for the impulse radio uitra-wideband (IR-UWB) system. The gain-flatten technique is adopted in this UWB LNA. Serial and shunt peaking techniques are used to achieve broadband input matching and large gain-bandwidth product (GBW). Feedback networks are introduced to further extend the bandwidth and diminish the gain fluctuations. The prototype is fabricated in the SMIC 0.18 μm RF CMOS process. Measurement results show a 3-dB gain bandwidth of 2.4-5.5 GHz with a maximum power gain of 13.2 dB. The excellent gain flatness is achieved with ±0.45 dB gain fluctuations across 3-5 GHz and the minimum noise figure (NF) is 3.2 dB over 2.5-5 GHz. This circuit also shows an excellent input matching characteristic with the measured S11 below-13 dB over 2.9-5.4 GHz. The input-referred 1-dB compression point (IPldB) is -11.7 dBm at 5 GHz. The differential circuit consumes 9.6 mA current from a supply of 1.8 V.     

DC to 40-GHz broad-band amplifiers using AlGaAs/GaAs HBT's

In this paper, we report two types of broad-band amplifiers implemented with AlGaAs/GaAs HBT's. One is a Darlington feedback amplifier and the other is a transimpedance amplifier. In the former circuit, a dc gain of 9.5 dB and a -3-dB bandwidth of 40 GHz were achieved. In the latter circuit, a transimpedance gain of 50 dBΩ and a -3-dB bandwidth of 27 GHz were achieved. To our best knowledge, they are the highest speed in each circuit configuration     

Low-noise 8 GHz PIN/FET optical receiver

An ultrawide-bandwidth, low-noise optical receiver has been designed for use in both multigigabit direct-detection or coherent heterodyne systems at 1.3 and 1.55 ?m wavelengths. The receiver consists of a low-capacitance InGaAs PIN photodiode connected to a high-impedance three-stage GaAs FET preamplifier. Inductive peaking at the front end is used to reduce the receiver noise at high frequencies. The receiver has an equivalent input RMS noise current of < 12 pA/?Hz from 4 to 7 GHz. The measured 3 dB bandwidth of 8 GHz is the widest receiver bandwidth reported to date.     

A plastic package GaAs MESFET 5.8-GHz receiver front-end withon-chip matching for ETC system

A plastic package GaAs MESFET receiver front-end monolithic microwave integrated circuit operating at 5.8 GHz is presented in this paper. It has a two-stage low-noise amplifier followed by a dual-gate mixer. Operating at 3 V and 8.3 mA, a conversion gain of 20.4 dB, noise figure of 4.1 dB, and high port-to-port isolations have been achieved. Total chip size of 1.0×0.9 mm² has been achieved through on-chip matching for both RF and local-oscillator ports and the use of simple two-element matching networks for all interstage matching. The 3-dB bandwidth of conversion gain is 1 GHz     

High Gain Equalizing Amplifier Integrated Circuits for a Gigabit Optical Repeater

Equalizing amplifier circuits for a gigabit optical-fiber transmission system are integrated on two monolithic chips implementing an advanced silicon bipolar process. Several new circuit techniques such as a broad-band 50-/spl Omega/ matching amplifier and an electrically controlled and adjusted peaking technique are employed. It is clarified that the main degradation factors of circuit stability are parasitic capacitance between the input and output terminals, and the crosstalk occuring through the wire bonding inductance. The maximum gain and 3-dB down bandwidth of the equalizing amplifier IC's are 64 dB and 1.2 GHz, respectively. The noise figure obtained is 4.5 dB within the dc to 2-GHz range.     

基于0.18μm CMOS工艺2.5Gb/s宽动态范围光接收机前端放大电路设计

基于0.18μm CMOS工艺设计了适用于2.5Gb/s传输速率的宽动态范围光接收机前端放大电路（包括前置放大器和限幅放大器）.前置放大器采用了RGC输入级的跨阻放大器,并且应用了消直流电路和自动增益控制电路扩展输入动态范围.限幅放大器采用了按比例缩小尺寸、并联峰化和带有有源负反馈的Cherry-Hooper放大器等方法扩展带宽.仿真结果表明：前端放大电路的中频增益为116dBΩ,-3dB带宽为2.13GHz,输入信号动态范围为40dB（0.01～1mA）.     

A wide-band RF front-end for multiband multistandard high-linearity low-IF wireless receivers

A wide-band radio-frequency (RF) front-end is designed with a balanced combined low-noise amplifier and a switching mixer (a low-noise converter) in an RF Si-bipolar process with an f/sub T/ of 25 GHz. The circuit achieves 20-dB conversion gain, higher than -4.5-dBm RF-to-IF IIP/sub 3/ (+15.5-dBm OIP/sub 3/) and less than 3.8-dB double-side-band noise figure in 900-MHz (e.g., GSM) and 1.9-GHz (e.g., WCDMA) frequency bands. The -1-dB compression point is -20 dBm at 13-mA DC current consumption from a single 5-V supply. The local-oscillator leakage to the input is less than -56 dBm in the 900-MHz band and less than -63 dBm in the 1.9-GHz band. The -3-dB bandwidth of the amplifier is larger than 3 GHz and a wide-band matching at the input with -10 to -41-dB S/sub 11/ is achieved in the frequency bands of interest by applying a dual-loop wide-band active feedback. The die area is 0.69 /spl times/ 0.9 mm/sup 2/. The circuit is suitable for area-efficient multiband multistandard low-IF receivers.     

Receiver designs and channel characterization for multi-spothigh-bit-rate wireless infrared communications

This paper addresses one of the most promising candidates for high-speed in-house wireless communications, namely, the multi-spot diffusing configuration (MSDC). Since it uses the optical infrared medium for data transmission, it has the inherent potential for achieving very high capacities. The channel characteristics in MSDC are simulated and the causes for channel distortion are analyzed. Then, conditions for creation of a virtually ideal channel are derived. It is shown that the 3-dB channel bandwidth can be extended up to beyond 2 GHz. This bandwidth comes at the cost of a poor power efficiency. In order to compensate for that, a novel receiver optical front-end design is proposed and its performance is analyzed. Taking advantage of the unique properties of the holographic optical elements, the conventional optical front-end, consisting of a concentrator and a filter, is replaced by a single holographic curved mirror. The utilization of such a holographic optical element improves the signal-to-shot noise ratio by up to 18.5 dB     

15 Gbit/s silicon bipolar amplifier IC using a novel mountingtechnique

A DC-coupled silicon bipolar amplifier IC, for operation in future multigigabit optical communication systems, has been fabricated using ⩾30 GHz double-polysilicon transistors. Using a novel HF connection technique for reducing the bondwire inductance, we have succeeded in the fabrication of a 14 dB gain amplifier IC, with a flatness better than ±0.5 dB, combined with a -3 dB bandwidth of 12.8 GHz. This is the highest bandwidth ever reported for a bonded amplifier circuit in any semiconductor technology     

A 90-dBΩ 10-Gb/s Optical Receiver Analog Front-End in a 0.18-μm CMOS Technology

A 10-Gb/s 90-dBOmega optical receiver analog front-end (AFE), including a transimpedance amplifier (TIA), an automatic gain control circuit, and a postamplifier (PA), is fabricated using a 0.18-mum CMOS technology. In contrast with a conventional limiting amplifier architecture, the PA is consisted of a voltage amplifier followed by a slicer. By means of the TIA and the PA codesign, the receiver front-end provides a -3-dB bandwidth of 7.86 GHz and a gain bandwidth product (GBW) of 248.5 THz-Omega. The tiny photocurrent received by the AFE is amplified to a differential voltage swing of 900 mV_pp when driving 50-Omega output loads. The measured input sensitivity of the optical receiver is -13 dBm at a bit-error rate of 10^-12 with a 2³¹-1 pseudorandom test pattern. The optical receiver AFE dissipates a total power of 199 mW from a 1.8-V supply, among which 35 mW is consumed by the output buffer. The chip size is 1300 mumtimes1796 mum     

Modeling and design of GaAs traveling-wave electrooptic modulators based on the planar microstrip structure

GaAs traveling-wave electrooptic modulators based on the planar microstrip structure (PMS) have been thoroughly characterized theoretically and a near-optimal design is proposed. The optical, microwave, and modulator performance are investigated in detail. The structure is simple to fabricate and so should provide cost advantages. An electrical 3-dB bandwidth of about 15 GHz (optical 3-dB bandwidth of about 40 GHz) is obtained for our best design.     

High-speed low-voltage modulation with a nonsymmetric Mach-Zehnderinterferometer

The authors demonstrate broadband optical modulation with a Ti:LiNbO₃ nonsymmetric interferometer at microwave frequencies up to 16 GHz. The 3-dB bandwidth of 8.7 GHz is only slightly less than the theoretical limit of 9.6 GHz for a 1-cm-long device. The device uses a 2-μm-thick gold-plated asymmetric stripline electrode, with a characteristic impedance of 40 Ω and ohmic loss of 3 dB/cm at 10 GHz. The DC switching voltage is 6.5 V, and the on/off ratio is -16 dB. Fabrication tolerances in the nonsymmetric interferometer are much less strict than for directional coupler modulators with comparable performance, making this device a better candidate for use in communications systems     

Coherent receiver front-end module including a polarizationdiversity waveguide OIC and a high-speed InGaAs twin-dual p-i-nphotodiode OEIC both based on InP

The economic implementation of coherent optical systems requires practical integrated optical front-end receiver devices with reasonable degree of integration. As a precursor to such an OEIC, an InGaAsP/InP polarization diversity waveguide OIC, including two TE/TM-mode splitters, two TE-filters, two 3-dB couplers, and a planar front-illuminated InGaAs twin-dual-p-i-n photodiode-OEIC (including two balanced p-i-n photodiodes) was fabricated. The OIC depicts a TE/TM-mode separation of more than 13 dB, a 3-dB coupler imbalance of less than 10% and an intrinsic loss of less than 2 dB. A single detector device shows a responsivity of 1.05 A/W at a wavelength of 1.55 μm, a total series resistance below 10 Ω, and a 3-dB bandwidth of more than 10 GHz. The O(E)ICs have been (packaged) in a versatile housing for system tests. The operation of the modules has been demonstrated in a heterodyne experiment yielding a bandwidth of more than 2.2 GHz for the whole module     

InP-based 10-GHz bandwidth polarization diversity heterodynephotoreceiver with electrooptical adjustability

A polarization diversity optical receiver, integrated with two pairs of balanced photodiodes in the InP/InGaAsP material system, is described. This circuit includes two polarization splitters based on modal birefringence and, for the first time, adjustable 3-dB TE and TM directional couplers (relaxing fabrication tolerances). On-chip losses are below 2.5 dB (TE) and 5.5 dB (TM). Waveguide to PIN coupling efficiency is >95%. Polarization crosstalk is in the 9-10-dB range, 3-dB couplers balance can be recovered, and common mode rejection ratio (CMRR) lower than -30 dB is obtained and remains below -20 dB over 6 GHz. Balanced receiver circuit 3-dB bandwidth is in excess of 10 GHz     

Comparison of InP/InGaAs DHBT distributed amplifiers as modulator drivers for 80-Gbit/s operation

This paper compares three single-ended distributed amplifiers (DAs) realized in an in-house InP/InGaAs double heterojunction bipolar transistor technology featuring an f/sub t/ and f/sub max/ larger than 200 GHz. The amplifiers use five or eight gain cells with cascode configuration and emitter follower buffering. Although the technology is optimized for mixed-signal circuits for 80 Gbit/s and beyond, DA results could be achieved that demonstrate the suitability of this process for the realization of modulator drivers. The results are documented with scattering parameter, eye diagram, and power measurements. This includes amplifiers featuring a 3-dB bandwidth exceeding 80 GHz and a gain of over 10 dB. One of the amplifiers exhibits clear eyes at 80 Gbit/s with a gain of 14.5 dB and a voltage output swing of 2.4 V/sub pp/ limited by the available digital input signal. This amplifier delivers an output power of 18 dBm (5.1 V/sub pp/) at 40 GHz and 1-dB compression. Two amplifiers offer a tunable gain peaking, which can be used to optimize circuit performance and to compensate losses in the circuit environment. The results show that, using our InP/InGaAs technology, an integration of high-speed mixed-signal circuits (e.g., multiplexers) and high-power modulator drivers on a single chip is feasible.     

A 26-Gb/s CMOS optical receiver with a reference-less CDR in 65-nm CMOS

This paper presents a 26-Gb/s CMOS optical receiver that is fabricated in 65-nm technology. It consists of a triple-inductive transimpedance amplifier (TIA), direct current (DC) offset cancellation circuits, 3-stage gm-TIA variable-gain amplifiers (VGA), and a reference-less clock and data recovery (CDR) circuit with built-in equalization technique. The TIA/VGA front-end measurement results demonstrate 72-dBΩ transimpedance gain, 20.4-GHz −3-dB bandwidth, and 12-dB DC gain tuning range. The measurements of the VGA’s resistive networks also demonstrate its efficient capability of overcoming the voltage and temperature variations. The CDR adopts a full-rate topology with 12-dB imbedded equalization tuning range. Optical measurements of this chipset achieve a 10⁻¹² BER at 26 Gb/s for a 2¹⁵−1 PRBS input with a −7.3-dBm input sensitivity. The measurement results with a 10-dB @ 13 GHz attenuator also demonstrate the effectiveness of the gain tuning capability and the built-in equalization. The entire system consumes 140 mW from a 1/1.2-V supply.