Analysis of dynamic characteristics of process of designing analogue circuits

The process of designing analogue circuits is formulated as a controlled dynamic system. For analysis of such system’s properties it is suggested to use the concept of Lyapunov’s function for a dynamic system. Various forms of Lyapunov’s function are suggested. Analyzing the behavior of Lyapunov’s function and its first derivative allowed to determine significant correlation between this function’s properties and processor time used to design the circuit. Numerical results prove the possibility of forecasting the behavior of various designing strategies and processor time based on the properties of Lyapunov’s function for the process of designing the circuit.     

A structure of time minimal strategy of analog circuits optimization

An application of optimal control theory allows to generalize method of analog circuits optimization. A task of search of time minimal strategy of circuits optimization is stated as a classical problem of optimal control theory functional optimization. As an optimized functional there is total processor time. At that, the main tool is controlling function vector, which allows to redistribute processor time burden between circuit analysis task and parametric optimization procedure. Introduced earlier special function, which is normalized Lyapunov’s function of development process, allows to predict total processor time of circuit development using initial development period. This function also allows to find optimal or quasi optimal controlling function vector behavior for minimization of circuit optimization process time.     

Analysis of the control vector structure in analog networks design

The methodology of analog networks design developed on the basis of the optimum control theory is used for determining the vector structure controlling the optimization process. The analysis of control vector structure is performed by using the Lyapunov function concept of design process. The investigation of behavior of this function and its time derivative makes it possible to determine optimal switching points of the control vector. Such an approach allows us to minimize the total processor time of network design by correcting the control vector structure in terms of the characteristics of the initial period of design. Numerical results of the optimization process of networks with arbitrary number of transistors indicate the possibility of design process control for minimization of the total processor time.     

Comparative analysis of the Lyapunov function for different strategies of analogue circuits design

Generalized methodology has been developed for analogue circuits design based on applying the optimal control theory. The problem of time optimal system design was defined as a classical functional optimization problem of the optimal design theory. In this case the process of analogue circuits design is mathematically defined as a dynamic control system. In this context the minimization problem of the processor time of designing can be formulated as a minimization problem of the response time of dynamic system. In order to analyze the properties of such a system, it is proposed to use the concept of the Lyapunov dynamic system function. Using this function and its time derivative a special function has been built that allows us to predict the total processor time of circuit design by using the characteristics of the initial period of designing. Numerical results indicate the possibility of predicting the processor time of different design strategies in terms of the special function behavior.     

Comparison of different strategies of circuit optimization based on the Lyapunov function

Thedesign methodology for analog circuits developed earlier on the basis of using the control theory makes it possible to apply important concepts and results of the specified theory. Lyapunov function defined for the electronic circuit optimization process proved to be a characteristic allowing us to compare different optimization strategies. In this case the behavior of special function representing the logarithm of the Lyapunov function correlates well with the total processor time of circuit optimization and allows us to select the best optimization strategies in terms of the minimum processor time.     

Behaviour of Lyapunov’s function for different strategies of circuit optimisation

The process of analogue circuit optimisation is mathematically defined as a controllable dynamic system. In this context the minimisation of the processor time of designing can be formulated as a problem of time minimisation for transitional process of dynamic system. In order to analyse the properties of such a system, it is proposed to use the concept of Lyapunov function of dynamic system. Using this function and its time derivative, the special functions have been built that allow us to predict the total processor time for circuit optimisation by analysing the initial interval of the optimisation process. Numerical results indicate the possibility of predicting the processor time of different strategies for circuit optimisation.     

Application of the maximum principle for the circuits optimization

The solution of the problem of computational time reduce during optimization of electronic circuits allows to enhance the development quality. Generalized methodology of the circuits optimization developed before on a basis of optimal control allows to define many different optimization strategies. Definition of Lyapunov’s function of optimization process and its analysis for different strategies allows to compare these strategies from viewpoint of computational burden and select the best of them. At the same time the most grounded approach for the search of optimal development strategy in this statement is Pontryagin maximum principle. But application of this principle for solution of non-linear problems is related to essential complications. In this paper it is obtained the solution of electronic circuit optimization problem during minimal amount possible processor time on a basis of Pontryagin maximum principle in general case of N variables. It is shown that effect studied before for acceleration of the process of optimization coincides the solution on a basis of the maximum principle. This fact is the theoretical explanation of the acceleration effect. From the other hand the principle of maximum can be the basis for development of the algorithm for electronic circuits optimization with minimal processor time cost.     

UHF RFID标签基带处理器的ASIC设计

提出了一款基于EPC Class1 Generation2协议的UHF RFID标签基带处理器。考虑到工作距离是无源标签的一个重要指标,要提高工作距离,就要降低标签功耗,采取了一系列低功耗措施,如2.56MHz和1.28MHz的双时钟策略、增加单元开关功能以及使用异步计数器等。设计采用TSMC 0.18μm工艺,工作电压为1.8V,功耗为6.4μW,版图尺寸为415μm×398μm。采用Xilinx的FPGA开发平台进行验证,测试结果满足C1G2协议要求。     

基于S3C6410的多媒体系统设计

提出并实现了以S3C6410为核心处理器的嵌入式多媒体系统.详细介绍了多媒体系统整体设计方案、接口资源和S3C6410用于多媒体数据处理的BIT处理器.同时为方便人机交互控制,采用BC7210芯片以一种新的方式设计了红外遥控电路.实验测试表明,该系统为嵌入武多媒体系统开发提供了速度快、稳定性高的系统环境.     

A new multi-scroll Chua’s circuit with composite hyperbolic tangent-cubic nonlinearity: Complex dynamics,Hardware implementation and Image encryption application

In this paper, a new method for generating multi-scroll chaotic attractors via constructing a compound hyperbolic tangent-cubic nonlinear function in canonical Chua’s circuit is presented. The basic dynamic characteristics of the system are analyzed, including equilibrium points, bifurcation diagrams, Lyapunov exponents, phase portraits, time-domain diagrams and attractive basins. What is surprising is that the proposed multi-scroll Chua’s circuit also exhibits rich dynamic behaviors like coexisting multiple attractors, transient period, intermittent chaos and offset boosting. In addition, we put forward the application of the system in chaotic image encryption, and analyzed some security performance evaluation indexes to show that the new Chua’s chaotic cipher system has high security and reliable encryption performance. Finally, the hardware design and experiments of the chaotic digital circuits and image encryption are carried out. Both numerical simulation and FPGA experimental results verify the feasibility and usability of the proposed new multi-scroll Chua’s system.     

基于EWB软件的可扩展数字电子时钟设计

EWB软件形象直观、电路设计图形化、功能齐全,具有良好的电路仿真功能,是时下最流行的的EDA设计软件之一,受到电子电路设计人员的喜欢。本文针对电子设计工程师在设计电路中常遇到的问题,基于EWB软件设计平台,设计可实现24小时调时、定闹钟功能的数字电子时钟,详细介绍数字电子中个模块的设计原理与具体电路的实现,指出设计存在的不足与完善的方案。     

多通道高速HDLC处理器的设计与实现

本文详述了由一个具有分时处理能力的HDLC处理器对128逻辑通道数据进行高速、并行、实时处理的设计与实现过程,并讨论了其实现关键技术,给出了系统中关键结点的功能仿真波形图.     

一种新颖的单片集成红外传感信号处理器

介绍一种新颖的单片集成红外传感信号处理器。这种处理器能与多种红外传感器匹配 ,对接收到的传感信号进行处理 ,产生控制信号 ,快速启动各类装置 ,实现自动控制。芯片设计中采用多种抗噪声和低功耗设计技术。本处理器用 1 .2μm双层多晶双层金属 N阱 CMOS工艺实现 ,芯片总面积 2 .7mm2 ,电源电压 5 V时的静态电流为 1 .2 m A,封装后样品测试结果获得设计预期的功能和性能     

一种实现单片机工作在低功耗模式下的事件寄存器电路设计

基于微处理器的单片机广泛应用于各行各业,其低功耗模式一般采用间歇工作方式,通过外部事件产生中断信号,使处于休眠或掉电状态的处理器进入运行状态,为节省处理器的中断资源,简化单片机软硬件开发,设计一种由D型触发器组成的事件（中断信号）寄存器电路,将事件（中断信号）储存后供处理器读取。文中给出了事件寄存器电路设计,电路的PROTEUS仿真结果表明其与设计目标一致,该电路在基于PC104等处理器的低功耗系统中已得到应用。     

基于FPGA的高可靠性接口模块设计

介绍了处理器接口模块的设计现状及存在问题,提出了一种新的基于FPGA的处理器接口模块的设计方案.对FPGA的功能进行了分析,介绍了开发流程.按照自顶向下的设计规则,将FPGA设计划分为多个功能模块,介绍了各个模块的功能、基本结构和关键电路等.使用Modelsim进行了VerilogHDL代码级的功能仿真和时序仿真.最后在控制系统平台上进行了系统功能测试,证明了处理器接口模块的稳定性和可行性.     

Structure of quasi-optimal time algorithm for analog circuits design

The generalized methodology developed earlier for analog circuits design and based on applying the optimal control theory is the basis for developing an optimal or quasi-optimal design algorithm. In this context the most crucial criterion making it possible to find the required structure of algorithm is the behavior of the Lyapunov function determined for circuit optimization process. Characteristics of the Lyapunov function and its derivative form the basis of search for the optimal structure of control vector which, in turn, determines the algorithm structure. A functional block diagram of the quasi-optimal algorithm implementing the main ideas of the earlier developed methodology has been built, and the main characteristics of this algorithm were determined in comparison with the traditional approach and with quasi-optimal design strategy.     

数字锁相控制的IGBT感应加热电源

以20 kHz/10 kW中频电源为设计对象,设计了采用三相不控整流和串联谐振逆变器的IGBT淬火感应电源.给出了其功率主电路器件的具体参数并通过Simulink仿真为实验装置提供了依据;根据IGBT的驱动要求,选择驱动器SKHI 22A详细研究了IGBT的驱动电路及其外围电路的设计;锁相控制电路由CD4046和DSP...     

SOC芯片DFT研究与设计

文章首先介绍了SOC系统的DFT设计背景和DFT的各种测试机理,包括基于功能的总线测试机理、基于边界扫描链的测试机理、基于插入扫描电路的测试机理以及基于存储器自测试的测试机理。然后以某专用SOC芯片为例提出了SOC电路的DFT系统构架设计和具体实现方法。主要包括：含有边界扫描BSD嵌入式处理器的边界扫描BSD设计,超过8条内嵌扫描链路的内部扫描SCAN设计,超过4个存储器硬IP的存储器自测试MBIST,以及基于嵌入式处理器总线的功能测试方法。最后提出了该SOC系统DFT设计的不足。     

基于CPLD的嵌入式系统复位电路设计

MPC8560处理器是基于PowerPC体系结构的嵌入式处理器,基于这种体系结构的处理器在嵌入式系统设计中会涉及到许多特殊的问题,复位电路的设计就是其中之一。CPLD在嵌入式系统设计中有着广泛的实际应用,本文根据MPC8560处理器复位模块的结构和特性,实现了基于CPLD的嵌入式系统复位电路的设计。通过VHDL语言编写时序控制程序,CPLD对时序的控制能有效地使整个系统复位,CPLD的采用提高了复位电路设计的灵活性和可扩展性,使得设计中电路简单、载板体积小、功耗低。     

Experimental research on transient radiation effects in microprocessors based on SPARC-V8 architecture

An experimental system is developed for the transient radiation effects testing of an anti-radiation hardened processor. Based on this system, the transient radiation effects in a microprocessor based on SPARC-V8 architecture was investigated. The dose-rate-soft-error index parameters of the processor were determined according to the test results, as were the influences on the function and timing parameters of the processor. The power supply balance is affected, which caused the system to reset and be the main source of soft errors. The results showed the circuit recovery time is primarily determined by the internal PLL, while the core power and the output-low-IO ports are more sensitive to the transient dose rate effect. The power-integrity-hardened design is proposed to mitigate the transient radiation effect.