（论坛）采用ALD方法制备TiO2/Al2O3布拉格反射镜并配合金属反射镜来增强背镀结构的反射效率

文中首次采用原子层沉积法制备TiO2/Al2O3布拉格反射镜并配合金属反射镜来制备了高反射率的背反射镜。制备的多层布拉格反射镜加Al镜和多层布拉格反射镜加Ag镜有很好的平整度和厚度的精确性,并且反射率高于96%。此外,TiO2/Al2O3布拉格反射镜和Al与蓝宝石衬底都有良好的粘合性,这样可以节省制备步骤并且可以得到高质量的背反射镜。利用原子层沉积技术和TiO2/Al2O3布拉格反射镜,我们得到了高反射率,角度依赖性小,更加稳定以及均一性更好的背反射镜,可以满足高亮度LED的需求。     

Influence of surface treatment prior to ALD high-/spl kappa/ dielectrics on the performance of SiGe surface-channel pMOSFETs

Compressively strained Si/sub 0.7/Ge/sub 0.3/ surface-channel pMOSFETs with atomic layer deposition (ALD) Al/sub 2/O/sub 3//HfO/sub 2//Al/sub 2/O/sub 3/ nanolaminate and low-pressure chemical vapor deposition p/sup +/ poly-SiGe gate electrode were fabricated. Surface treatment with either hydrogen fluoride (HF) clean, or HF clean followed by water rinse was performed prior to the ALD processing. The devices with water rinse show a good control of interfacial layer and device reproducibility, while the devices without water rinse lack a clearly observable interfacial layer and show scattered electrical characteristics and distorted mobility curve. A /spl sim/20% increase in hole mobility compared to the Si universal mobility and a /spl sim/0.6-nm-thick continuous interfacial layer are obtained for the pMOSFETs with water rinse.     

Influence of Al2O3 barrier on the interfacial electronic structure of Au/Ti/n-GaAs structures

The Au/Ti/n-GaAs structures with and without Al₂O₃ interfacial layer have been fabricated.The Al₂O₃ interfacial layer has been formed on the GaAs substrate by atomic layer deposition.The effects of the interfacial layer on the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the devices have been investigated in the temperature range of 60-300 K.It has been seen that the carrier concentration from C-V characteristics for the MIS (metal/insulating layer/semiconductor) diode with Al₂O₃ interfacial layer has a higher value than that for the reference diode without the Al₂O₃ interfacial layer (MS).Such a difference in the doping concentration has been attributed not to doping variation in the semiconductor bulk but to the presence of the Al₂O₃ interfacial layer because both diodes have been made on the pieces cut from the same n-type GaAs wafer.The temperaturedependent I-V characteristics of the MIS diode do not obey the thermionic emission current theory because of the presence of the Al₂O₃ layer.An electron tunneling factor,aδ(χ)^1/2,value of 20.64 has been found from the I-V-T data of the MIS diode.An average value of 0.627 eV for the mean tunneling barrier height,χ,presented by the Al₂O₃ layer has been obtained.     

The design and assembly of surface-micromachined optical switch for optical add/drop multiplexer application

An assembly process including: flip-chip bonding, microelectromechanical (MEMS) structure release, and atomic layer deposition (ALD) is proposed to integrate a surface micromachined optical switch for optical add/drop multiplexer (OADM) applications. In the current optical switch designs, pre-stressed beams were used to pop up the micromirror and an electrode (substrate) under the beams was designed to perform ON/OFF function of the optical switch. In order to achieve desired popped-up angle for precise optical switching, a flip-chip bonding technique is applied to a mechanical stopper with an accurate joint height that can be used to constrain the movement of the micromirror. A conformal thin layer of dielectric material (Al/sub 2/O/sub 3/) coated on the surfaces of device through an ALD coating process is used to improve vertical actuation force, as well as electrical isolation. Experiments indicate that the micromirrors fabricated by the present assembly process can achieve desired angle that meet the requirements of the proposed OADM configuration.     

GaAs MOSFET with oxide gate dielectric grown by atomic layer deposition

For the first time, a III-V compound semiconductor MOSFET with the gate dielectric grown by atomic layer deposition (ALD) is demonstrated. The novel application of the ALD process on III-V compound semiconductors affords tremendous functionality and opportunity by enabling the formation of high-quality gate oxides and passivation layers on III-V compound semiconductor devices. A 0.65-/spl mu/m gate-length depletion-mode n-channel GaAs MOSFET with an Al/sub 2/O/sub 3/ gate oxide thickness of 160 /spl Aring/ shows a gate leakage current density less than 10/sup -4/ A/cm/sup 2/ and a maximum transconductance of 130 mS/mm, with negligible drain current drift and hysteresis. A short-circuit current-gain cut-off frequency f/sub T/ of 14.0 GHz and a maximum oscillation frequency f/sub max/ of 25.2 GHz have been achieved from a 0.65-/spl mu/m gate-length device.     

Novel single-poly EEPROM with damascene control-gate structure

A novel single-poly EEPROM using damascene control gate (CG) structure is presented in this letter. The CG is tungsten (W) line made by a damascene process, and intergate dielectric is Al/sub 2/O/sub 3/ grown by atomic layer deposition (ALD). The program and erase mechanism is the same as the one for traditional stacked-gate cell, which uses the channel hot electron injection for programming and Fowler-Nordheim tunneling for channel erasing. With the high dielectric constant (K) property of Al/sub 2/O/sub 3/, we can perform the program and erase function with a voltage less than 6.5 V, which can be handled by 3.3 V devices instead of traditional high voltage devices. In the process compatibility aspect, this new cell needs only two extra masking steps over the standard CMOS process, and the high-/spl kappa/ material is deposited in the back-end metallization steps without the contamination concerns on the front-end process. Therefore, this new technology is suitable for embedded application. In this letter, the good cell performance is demonstrated; such as, fast programming/erasing, good endurance and data retention.     

原子层沉积薄膜之激光损伤性能分析

采用目前尚在国内鲜有报道的原子层沉积技术在熔石英和BK7玻璃基片上镀制了TiO2单层膜、AlO3单层膜以及TiO2/Al2O3增透膜,沉积温度在110℃和280℃.利用X射线粉末衍射仪对膜层微观结构进行了分析研究,并在激光损伤平台上进行了抗激光损伤阈值的测量.采用Nomarski微分干涉差显微镜和原子力显微镜对激光损伤...     

Atomic Layer Deposition in the Production of a Gate HkMG Stack Structure with a Minimum Topological Size of 32 nm

The plasma-enhanced atomic layer deposition (PEALD) of a High-K Dielectric and Metal Gate (HkMG) stack for MIS transistors, including the subgate HfO₂ (2–4 nm) dielectric layer, the ultrathin metallic stabilizing hafnium nitride HfN (1–3 nm) layer, and the basic metallic gate layer from tantalum nitride ТаN (10–20 nm), on silicon plates with a diameter of 200 mm is studied. The spectral ellipsometry method is applied to measure the homogeneity of the deposited film thickness. The dielectric constant of the dielectric in the stack, the leak current, and the breakdown voltage are examined. The four-probe method is used to study the specific electric resistance of tantalum nitride deposited by the atomic layer deposition ALD method. The film thickness homogeneity as a function of the ALD process parameters is examined. The specific resistance of the metallic TaN layer as a function of the composition and parameters of the plasma discharge are studied.     

原位XPS分析Al2O3作为势垒层的Er2O3/Si结构

在超高真空条件下,通过脉冲激光沉积(PLD)技术制作了Er2O3/Al2O3/Si多层薄膜结构,原位条件下利用X射线光电子能谱(XPS)研究了Al2O3作为势垒层的Er2O3与Si界面的电子结构.XPS结果表明,Al2O3中Al的2p芯能级峰在低、高温退火前后没有变化;Er的4d芯能级峰来自于硅酸铒中的铒,并非全是本征氧化铒薄膜中的铒;衬底硅的芯能级峰在沉积Al2O 3时没有变化,说明Al2O3薄膜从沉积到退火不参与任何反应,与Si界面很稳定;在沉积Er2O3薄膜和退火过程中,有硅化物生成,表明Er2O3与Si的界面不太稳定,但随着Al2O3薄膜厚度的增加,其硅化物中硅的峰强减弱,含量减少,说明势垒层很好地起到了阻挡扩散的作用.     

Charge trapping memory devices employing multi-layered Ge/Si nanocrystals for storage fabricated with ALD and PLD methods

The Ge/Si nanocrystals on ultra thin high-k tunnel oxide Al2O3 were fabricated to form the charge trapping memory prototype with asymmetric tunnel barriers through combining the advanced atomic layer deposition (ALD) and pulse laser deposition (PLD)techniques. Charge storage characteristics in such memory structure have been investigated using capacitance-voltage (C-V) and capacitance-time (C-t) measurements. The results prove that both the two-layered and three-layered memory structures behave relatively qualified for the multi-level cell storage. The results also demonstrate that compared to electrons, holes reach a longer retention time even with an ultra thin tunnel oxide owing to the high band offset at the valence band between Ge and Si.     

N_2和NH_3退火对铪铝氧栅介质C-V特性的影响

采用原子层淀积(ALD)的方法在Si(100)衬底上制备了铪铝氧(HfAlO)高介电常数介质,并研究了N2和NH3退火对于介质薄膜的影响。改变原子层淀积的工艺,制备了三组含有不同Al∶Hf原子比的铪铝氧(HfAlO)高介电常数介质。电容电压特性(C-V)测试表明,薄膜的积累电容密度随着薄膜中Al∶Hf原子比的减少而增加。实验表明,用N2和NH3对样品进行淀积后退火,可以减小等效电容厚度(CET)、降低固定正电荷密度以及减小滞回电压,从而有效地提高了介质薄膜的电学特性。     

Structural and Electrical Properties of Atomic Layer Deposited Al‐Doped ZnO Films

Structural and electrical properties of Al‐doped ZnO (AZO) films deposited by atomic layer deposition (ALD) are investigated to study the extrinsic doping mechanism of a transparent conducting oxide. ALD‐AZO films exhibit a unique layer‐by‐layer structure consisting of a ZnO matrix and Al₂O₃ dopant layers, as determined by transmission electron microscopy analysis. In these layered AZO films, a single Al₂O₃ dopant layer deposited during one ALD cycle could provide ≈4.5 × 10¹³ cm^?2 free electrons to the ZnO. The effective field model for doping is suggested to explain the decrease in the carrier concentration of ALD‐AZO films when the interval between the Al₂O₃ layers is reduced to less than ≈2.6 nm (>3.4 at% Al). By correlating the electrical and structural properties, an extrinsic doping mechanism of ALD‐AZO films is proposed in which the incorporated Al atoms take oxygen from the ZnO matrix and form doubly charged donors, such as oxygen vacancies or zinc interstitials.     

Atomic Layer Deposition of Y2O3 Using Tris(butylcyclopentadienyl)yttrium and Water

Russian Microelectronics - In this work, atomic-layer deposition (ALD) of yttrium oxide (Y2O3) was demonstrated using tris(butylcyclopentadienyl)yttrium (Y(CpBut)3) and H2O . Yttrium precursor...     

Patterning effects on poly (3-hexylthiophene) organic thin film transistors using photolithographic processes

We explore the effects of conventional photo lithographic patterning of the active layer of poly (3-hexylthiophene) (P3HT) organic thin film transistors (OTFT) on device performance. The performance of the devices was monitored in each step of the patterning process. We successfully developed a patterning process which is compatible with plastic substrates and P3HT as the organic semiconductor. In this process, parylene and atomic layer deposition (ALD) Al₂O₃ were used as capping layers. Al₂O₃ and parylene/P3HT were etched using Al etchant and O₂ plasma reactive ion etching (RIE), respectively. The degradation occurred primarily during the ALD Al₂O₃ deposition and capping layer etching. There was a 30% degradation in mobility, a 1–2× reduction in drive current, and an increase in threshold voltage after the ALD Al₂O₃ deposition. In the capping layer etching, a near 50% degradation in mobility was observed. The patterned devices have a mobility of 0.02 cm²/V s, which is 1000× better than photo lithographically patterned P3HT OTFTs previously reported in the literature, and comparable to un-patterned P3HT devices.     

厚度与带隙可调、原子层沉积的超薄五氧化二钒纳米晶薄膜

利用原子层沉积方法制备V_2O_5纳米片晶薄膜.薄膜厚度可以被精确控制,并对纳米晶V_2O_5薄膜的结构形貌、光学带隙和拉曼振动有显著影响.原子层沉积过程中V_2O_5薄膜生长的两个阶段导致薄膜具有两个光学带隙,这将有助于理解超薄薄膜生长与功能应用.     

Alumina and Silicone Oxide Dielectric Films for Focal Plane Arrays Based on InSb

Journal of Communications Technology and Electronics - In this study, MIS structures In/Al2O3/InSb and In/SiOx/anodic oxide/InSb were characterized. The A2O3 insulator layer were formed by the...     

Studies on morphology,electrical and optical characteristics of Al-doped ZnO thin films grown by atomic layer deposition

Al doped ZnO (AZO) films deposited on glass substrates through the atomic layer deposition (ALD)technique are investigated with various temperatures from 100 to 250 ℃ and different Zn ∶ Al cycle ratios from 20 ∶ 0 to 20 ∶ 3.Surface morphology,structure,optical and electrical properties of obtained AZO films are studied in detail.The Al composition of the AZO films is varied by controlling the ratio of Zn ∶ Al.We achieve an excellent AZO thin film with a resistivity of 2.14 × 10-3 Ω·cm and high optical transmittance deposited at 150 ℃ with 20 ∶ 2 Zn ∶ Al cycle ratio.This kind of AZO thin films exhibit great potential for optoelectronics device application.     

Formation of hafnium-aluminum-oxide gate dielectric using single cocktail liquid source in MOCVD process

We demonstrate that a high quality metal organic chemical vapor deposition (MOCVD) HfAl/sub x/O/sub y/ (hereafter HfAlO) dielectric film can successfully be deposited with a wide range of composition controllability between HfO/sub 2/ and Al/sub 2/O/sub 3/ in HfAlO using a single cocktail liquid source HfAl(MMP)/sub 2/(OiPr)/sub 5/. A composition ratio between 45 to 90% of HfO/sub 2/ in HfAlO is achieved by controlling deposition process parameters. The effect of the composition ratio between HfO/sub 2/ and Al/sub 2/O/sub 3/ on the electrical properties of the film is also investigated. The HfAlO film with 90% HfO/sub 2/ (10% Al/sub 2/O/sub 3/), which has minimum sacrifice of K value (around 19), shows a great improvement in thermal stability and significant reduction of interfacial layer growth during subsequent thermal processes, leading to the reduction in leakage current by around 2 orders of magnitude compared to pure HfO/sub 2/ film. The HfAlO film also shows good compatibility with TaN metal gate electrode under high temperature annealing process.     

Electrical properties of atomic-layer-deposited La2O3 films using a novel La formamidinate precursor and ozone

La₂O₃ films were grown by atomic layer deposition technique using a novel formamidinate precursor, tris(N,N′-diisopropylformamidinato) lanthanum [La(ⁱPrfAMD)₃], with H₂O and O₃ as an oxidant. La₂O₃ films grown with H₂O in the film exhibited a parasitic chemical vapor deposition type growth possibly due to a La(OH)_x component. However, the use of O₃ as the oxidant revealed a stable ALD process window. A post-deposition annealing (PDA) of the deposited La₂O₃ films using O₃ significantly reduces leakage current density by four orders of magnitude relative to as-deposited samples. The dielectric constant of La₂O₃ films with a TaN metal gate is found to be ～29, which is higher than reported values for CVD and ALD La₂O₃ films.     

Monolayer-precision fabrication of mixed-organic–inorganic nanohybrid superlattices for flexible electronic devices

We report a low-temperature fabrication of mixed-organic–inorganic nanohybrid superlattices for high-k thin stable gate dielectrics on flexible substrates. The self-assembled organic layers (SAOLs) were grown by repeated sequential adsorptions of CC-terminated alkylsilane and metal (Al or Ti) hydroxyl with ozone activation, which was called “molecular layer deposition (MLD)”. The MLD method is a self-controlled layer-by-layer growth process under vacuum conditions, and is perfectly compatible with the atomic layer deposition (ALD) method. The TiO₂ and Al₂O₃ inorganic layers were grown by ALD, which relies on sequential saturated surface reactions resulting in the formation of a monolayer in each sequence and is a potentially powerful method for preparing high quality multicomponent superlattices. The MLD method combined with ALD (MLD–ALD) was applied to fabricate SAOLs-Al₂O₃–SAOLs-TiO₂ nanohybrid superlattices on polycarbonate substrates with accurate control of film thickness, large-scale uniformity, excellent conformality, good reproducibility, multilayer processing capability, sharp interfaces, and excellent film qualities at relatively low temperature. The prepared ultrathin nanohybrid films exhibited good thermal and mechanical stability, good flexibility, excellent insulating properties, and relatively high dielectric constant k (6–11). The MLD–ALD method is an ideal fabrication technique for various flexible electronic devices.