AlGaN/GaN HEMTs With Low Leakage Current and High On/Off Current Ratio

In this letter, we propose using an oxide-filled isolation structure followed by $hbox{N}_{2}/hbox{H}_{2}$ postgate annealing to reduce the leakage current in AlGaN/GaN HEMTs. An off-state drain leakage current that is smaller than $hbox{10}^{-9} hbox{A/mm}$ (minimum $hbox{5.1} times hbox{10}^{-10} hbox{A/mm}$) can be achieved, and a gate leakage current in the range of $hbox{7.8} times hbox{10}^{-10}$ to $hbox{9.2} times hbox{10}^{-11} hbox{A/mm}$ ($V_{rm GS}$ from $-$10 to 0 V and $V_{rm DS} = hbox{10} hbox{V}$) is obtained. The substantially reduced leakage current results in an excellent on/off current ratio that is up to $hbox{1.5} times hbox{10}^{8}$. An improved flicker noise characteristic is also observed in the oxide-filled devices compared with that in the traditional mesa-isolated GaN HEMTs.      

Anode effect: The influence of electron bombardment of the anode on flicker noise

Experiments are presented which indicate the existence of two types of flicker noise in vacuum tubes with oxide-coated cathodes. The first is "normal" flicker noise that is present for anode voltages below 10 volts; the second is the "bombardment-enhanced" flicker noise that is added when the anode voltage is above 10 volts. It seems that the latter can be attributed to the arrival of neutral oxygen on the cathode. Since most pentodes and triodes operate with anode voltages above 10 volts, the "bombardment-enbanced" flicker noise should be a rather common source of flicker noise in these tubes.     

Detection of Defects Using Fault Model Oriented Test Sequences

This paper analyzes the possibilities and limitations of defect detection using fault model oriented test sequences. The analysis is conducted through the example of a short defect considering the static voltage test technique. Firstly, the problem of defect excitation and effect propagation is studied. It is shown that the effect can be either a defective effect or a defect-free effect depending on the value of unpredictable parameters. The concept of Analog Detectability Interval (ADI) is used to represent the range of the unpredictable parameters creating a defective effect. It is demonstrated that the ADIs are pattern dependent. New concepts (Global ADI, Covered ADI) are then proposed to optimize the defect detection taking into account the unpredictable parameters. Finally, the ability of a fault oriented test sequence to detect defect is discussed. In particular, it is shown that the test sequence generated to target the stuck-at faults can reasonably guarantee short defect detection till a limit given by the Analog Detectability Intervals.     

10-GHz and 20-GHz Channel Spacing High-Resolution AWGs on InP

This letter reports on 10-GHz and 20-GHz channel-spacing arrayed waveguide gratings (AWGs) based on InP technology. The dimensions of the AWGs are 6.8$,times,$8.2 mm$^{2}$ and 5.0$,times,$6.0 mm$^{2}$, respectively, and the devices show crosstalk levels of $-$12 dB for the 10-GHz and $-$17 dB for the 20-GHz AWG without any compensation for the phase errors in the arrayed waveguides. The root-mean-square phase errors for the center arrayed waveguides were characterized by using an optical vector network analyzer, and are 18 $^{circ}$ for the 10-GHz AWG and 28$^{circ}$ for the 10-GHz AWG.      

CyOptics newest APD

CyOptics Inc, a main developer of Indium Phosphide optical components has launched its 10Gbps Avalanche Photodiode with a −27dBm sensitivity in an industry standard, small form factor, surface mountable package. The APD is geared for optical systems operating at 10Gb/s and provides an alternative source of supply offering high performance at lower cost. The 10Gbs APD receiver will be priced under $700 per unit in volume. Customer samples are available. Volume production is expected early 4Q.This is a short news story only. Visit www.three-fives.com for the latest advanced semiconductor industry news.     

铝电解电容器的温度加速因子

采用温度作为铝电解电容器寿命加速因子,通常根据“１０℃法则”或“７℃法则”计算。作者通过对６３Ｖ－４７μＦ铝电解电容器在四种不同温度下的负荷试验（＋８５℃、＋９５℃、＋１０５℃、＋１１５℃）后对数百只样品、数万个测量数据进行了处理分析。认为单纯地使用“１０℃法则”或“７℃法则”不能准确地描述温度加速因子。作者结合铝电解电容器的结构,分析了铝电解电容器的失效因素,给出了负荷试验中温度与铝电解电容器寿命的关系。     

Versatile multiplier architectures in fields using the Montgomery multiplication algorithm

Many sequential multipliers for polynomial basis GF(2^k) fields have been proposed using the LSbit and MSbit multiplication algorithm. However, all those designs are defined over fixed size GF(2^k) fields and sometimes over fixed special form irreducible polynomials (AOL, trinomials, pentanomials). When such architectures are redesigned for arbitrary GF(2^k) fields and generic irreducible polynomials, therefore made versatile, they result in high space complexity (gate–latch number), low frequency (high critical path) and high latency designs. In this paper a Montgomery multiplication element (MME) architecture specially designed for arbitrary GF(2^k) fields defined over general irreducible polynomials, is proposed, based on an optimized version of the Montgomery multiplication (MM) algorithm for GF(2^k) fields. To evaluate the proposed MME and prove the efficiency of the MM algorithm in versatile designing, three distinct versatile Montgomery multiplier architectures are presented using this proposed MME. They achieve small gate–latch number and high clock frequency compared to other sequential versatile designs.     

Performance of cellular packet CDMA in an integrated voice/data network

This paper presents a simulation-based study of cellular packet CDMA systems operating in an integrated voice/data traffic scenario. Spread-spectrum CDMA provides a suitable framework for resource-shared packet transport capable of combining isochronous (voice, ISDN) and bursty data services. In this work, a general network model for cellular packet CDMA with mixed voice/data traffic is described and used to evaluate the capacity/performance impact of several key system parameters. First, the effect of spreading factor (N) and forward error correction (FEC) rate are studied, confirming earlier work indicating a weak dependence onN and a well-defined optimum code rate in the range of 0.5–0.7 (with BCH coding). Next, the effect of propagation loss coefficient () on network capacity is investigated over a range of possible assumptions for, including both constant and distance-dependent models. The results show that system capacity depends strongly on, varying by as much as a factor of 2 over the range of parameters considered. For a given distance-dependent assumption, performance results are also obtained for different cell sizes in order to understand the overall spatial reuse efficiency achievable in different cellular and microcellular scenarios. This is followed by an investigation of traffic source model effects: first the capacity improvement from voice activity detection VAD) is presented, showing the expected 21 gains. Results for varying proportions of voice and data traffic intensities indicate that the operating efficiency does not change significantly as the proportion of bursty data relative to voice is varied.     

Dependency of thermal spreading resistance on convective heat transfer coefficient

This paper presents a study of the thermal spreading resistance R_th of a small heat source on a conductive substrate subject to bottom-side convective cooling. This problem has been investigated for a very long time and is well covered in the literature. However, instead of using the design curves found in many papers, the results are presented as function of the heat transfer coefficient h. Doing so, a remarkable property is revealed. The thermal resistance is proportional to the logarithm of the reciprocal heat transfer coefficient, for a broad range of at least three decades . This behaviour can be reasonably explained using an approximate one-dimensional heat spreading model. Being dictated by a logarithmic law, the dependency of R_th on h is rather weak. This is made clearer by the temperature profiles at the substrate bottom. Decreasing h leads to a wider spreading and hence a larger surface with the coolant is utilised, which partly compensates the poorer cooling.     

On the construction of the unit tight frames in code division multiple access systems under total squared correlation criterion

We focus on the application of unit norm tight frames to design code division multiple (CDMA) systems spreading sequences with constant chip magnitude. An algorithm for the design of the overloaded real-valued signature sets with minimum total-squared-correlation equal to the Welch bound equality (WBE) set is presented. By using this algorithm we solved the open problem of existence of complex-valued WBE sequence sets with constant chip magnitude in the case when K=N+1, where K is the number of active users in the system and N is the processing gain. The normalized cross-correlation between any pair of signatures in a set obtained by the proposed algorithm is either 1/(K-1) or -1/(K-1) corresponding to equiangular sequences. The results are derived in the context of synchronous CDMA systems. Numerical examples for K=5 users for real WBE sequences and for K=4,3 users for complex WBE sequences with constant chip magnitude are provided.     

A 10-Gb/s Inductorless CMOS Analog Equalizer With an Interleaved Active Feedback Topology

A 10-Gb/s low-power analog equalizer for a 10-m coaxial cable has been realized in 0.13- $muhbox{m}$ CMOS technology. To compensate the cable loss of 20 dB at 5 GHz, this equalizer with an interleaved active feedback topology is proposed without using inductors. Moreover, additional capacitive and resistive source degenerations are incorporated to meet low-frequency losses. This circuit consumes only 14 mW (excluding the output buffer) from a 1.2-V supply with the output swing up to 400 $hbox{mV}_{rm pp}$, and it occupies $0.38 times 0.34 hbox{mm}^{2}$. For 8-, 9-, and 10-Gb/s pseudorandom binary sequences (PRBSs) of $2^{31} - 1$, the measured maximum peak-to-peak jitters are 26, 34, and 40 ps, respectively, and the measured bit error rate (BER) is less than $10^{-12}$.      

Single-Chip 10-V Programmable Josephson Voltage Standard System Based on a Refrigerator and Its Precision Evaluation

We precisely evaluated a single-chip 10-V programmable Josephson voltage standard (PJVS) system based on a closed-cycle refrigerator by directly comparing it with a conventional Josephson voltage standard system. The PJVS chip fabricated using $hbox{NbN}/hbox{TiN}_{x}/hbox{NbN}$ junction technology was used. The result of the measurement showed a good agreement with a combined standard uncertainty of 3.1 parts in $10^{10}$ at 10 V.      

Demonstration of 10 Gbit Ethernet/Optical-Packet Converter for IP Over Optical Packet Switching Network

We developed novel network interfaces, for example 10 Gbit Ethernet to 80 Gbit/s optical-packet (10 GbitE–80 GbitOP) or 80 Gbit/s optical-packet to 10 Gbit Ethernet (80 GbitOP–10 GbitE) converters (collectively called as 10 GbitE/80 GbitOP converters), to connect optical packet switching (OPS) networks with IP technology-based networks. By using newly developed arrayed burst-mode optical packet transmitters/receivers together, the 10 GbitE–80 GbitOP converter at the ingress edge node of the OPS network encapsulates an IP packet into an $80(8lambdatimes 10) {rm Gbit/s}$ dense wavelength division multiplexing (DWDM)-based optical packets and generates an optical label based on a lookup table and the destination addresses of the IP packet. The 80 GbitOP–10 GbitE converter at the egress edge node decapsulates the IP packet from the optical packet and generates a 10 GbitE frame accommodating the IP packet according to a lookup table. By using these network interface devices and OPS system based on multiple optical label processing, we achieved, for the first time, 74-km single-mode fiber transmission, switching, and buffering of $80(8lambdatimes 10) {rm Gbit/s}$ DWDM-based optical packets encapsulating almost 10 Gbit/s IP packets with error-free operation (IP packet loss rate $≪ 10^{-6}$).      

Fast Adaptive Polarization and PDL Tracking in a Real-Time FPGA-Based Coherent PolDM-QPSK Receiver

Fast polarization changes of 40 krad/s and 6-dB polarization-dependent loss (PDL) are tracked in a 2.8-Gb/s real-time coherent quadrature phase-shift keying receiver. The tolerance against fast polarization changes and PDL is measured for different polarization control time constants. The sensitivity penalty of the receiver at a polarization change speed of 40 krad/s is 0.7 dB at bit-error rate (BER) of $1times 10^{-3}$, with a BER floor of $6.1times 10^{-7}$. With an additional PDL of 6 dB, these figures become 1.7 dB and $9.6times 10^{-6}$, respectively.      

High-performance two''s complement divider

This paper presents a novel area-efficient two's complement high radix divider without affecting the high speed of the radix-2^k structure. In the proposed approach, only the odd values (rather than all the 2^k values) of the quotient digit set are used to generate the multiples of divisor. Moreover, the set of (N+k+1)-bit additions are replaced with a set of few most significant bits (k+2 bits) additions followed by two (N+3)-bit additions only. The new radix-2^k structure has been evaluated for different values of k. It is shown that the silicon area required by the new design could be as low as 15% of that of the conventional two's complement radix-2^k architecture for radix-64 (20% for radix-32) while the speed is nearly the same. Despite that the proposed algorithm is originally developed in order to improve the performance of the two's complement approach, it has also been compared with the redundant SRT algorithm. The area–time ratios of the new radix-16 and radix-32 dividers to that of the SRT divider are equal to 85% and 77%, respectively.     

Path-Loss Characteristics of Urban Wireless Channels

Wireless channel data was collected in Cambridge, Massachusetts for diverse propagation environments over distances ranging from tens of meters to several kilometers using mobile 2.4-GHz transmitters and receivers. The 20-MHz bandwidth signals from eight individually movable van-top antennas were Nyquist sampled simultaneously with 12-bit accuracy. Although path-loss variance for any given link length within single residential/urban neighborhoods was large, single streets typically exhibited path-loss, ${rm L}({rm dB})=-10log_{10}({rm P}_{r}/{rm P}_{t})cong 10alphalog_{10}{rm r}+{rm C}$, where P is the received or transmitted power, r the link-length, $alpha$ the street-dependent path-loss coefficient, and C the loss incurred at street intersections. Measurements yielded $alphacong 1.5+3.2betapm 0.27$ for $2≪alpha≪5$ ; $beta$ is the fraction of the street length having a building gap on either side. Experiments over links as short as 100 meters indicate a 10-dB advantage in estimating path loss for this model compared to optimal linear estimators based on link length alone. Measured air-to-ground links were well modeled by $alpha=2$ for the elevated LOS path, and by stochastic log-normal attenuation for the ground-level scattering environment. These models permit path-loss predictions based on readily accessible environmental parameters, and lead to efficient nodal placement strategies for full urban coverage.      

17 GHz RF Front-Ends for Low-Power Wireless Sensor Networks

A 17 GHz low-power radio transceiver front-end implemented in a 0.25 $mu{hbox {m}}$ SiGe:C BiCMOS technology is described. Operating at data rates up to 10 Mbit/s with a reduced transceiver turn-on time of 2 $mu{hbox {s}}$, gives an overall energy consumption of 1.75 nJ/bit for the receiver and 1.6 nJ/bit for the transmitter. The measured conversion gain of the receiver chain is 25–30 dB into a 50 $Omega$ load at 10 MHz IF, and noise figure is 12 $pm$0.5 dB across the band from 10 to 200 MHz. The 1-dB compression point at the receiver input is $-$37 dBm and ${hbox{IIP}}_{3}$ is $-$25 dBm. The maximum saturated output power from the on-chip transmit amplifier is $-$1.4 dBm. Power consumption is 17.5 mW in receiver mode, and 16 mW in transmit mode, both operating from a 2.5 V supply. In standby, the transceiver supply current is less than 1 $mu{hbox {A}}$.      

An efficient demand-assignment multiple access protocol for wireless packet (ATM) networks

In a wireless packet (ATM) network that supports an integrated mix of multimedia traffic, the channel access protocol needs to be designed such that mobiles share the limited communications bandwidth in an efficient manner: maximizing the utilization of the frequency spectrum and minimizing the delay experienced by mobiles. In this paper, we propose and study an efficient demand-assignment channel access protocol, which we call Distributed-Queueing Request Update Multiple Access (DQRUMA). The protocol can be used for a wide range of applications and geographic distances. Mobiles need to send requests to the base station only for packets that arrive to an empty buffer. For packets that arrive to a non-empty buffer, transmission requests are placed collision-free by piggybacking the requests with packet transmissions. The simulation results show that even with the worst possible traffic characteristics, the delay-throughput performance of DQRUMA is close to the best possible with any access protocol. In addition, explicit slot-by-slot announcement of the transmit permissions gives the base station complete control over the order in which mobiles transmit their packets. This important feature helps the base station satisfy diverse Quality-of-Service (QoS) requirements in a wireless ATM network.     

Effect of Dislocation-related Deep Levels in Heteroepitaxial InGaAs/GaAs and GaAsSb/GaAs <Emphasis Type="Italic">p</Emphasis>–<Emphasis Type="Italic">i</Emphasis>–<Emphasis Type="Italic">n</Emphasis> Structures on the Relaxation time of Nonequilibrium Carriers

The results of an experimental study of the capacitance–voltage (C–V) characteristics and deep-level transient spectroscopy (DLTS) spectra of p⁺–p⁰–i–n⁰ homostructures based on undoped dislocationfree GaAs layers and InGaAs/GaAs and GaAsSb/GaAs heterostructures with homogeneous networks of misfit dislocations, all grown by liquid-phase epitaxy (LPE), are presented. Deep-level acceptor defects identified as HL2 and HL5 are found in the epitaxial p⁰ and n⁰ layers of the GaAs-based structure. The electron and hole dislocation-related deep levels, designated as, respectively, ED1 and HD3, are detected in InGaAs/GaAs and GaAsSb/GaAs heterostructures. The following hole trap parameters: thermal activation energies (E _t ), capture cross sections (σ _p ), and concentrations (N _t ) are calculated from the Arrhenius dependences to be E _t = 845 meV, σ _p = 1.33 × 10^–12 cm², N _t = 3.80 × 10¹⁴ cm^–3 for InGaAs/GaAs and E _t = 848 meV, σ _p = 2.73 × 10^–12 cm², N _t = 2.40 × 10¹⁴ cm^–3 for GaAsSb/GaAs heterostructures. The concentration relaxation times of nonequilibrium carriers are estimated for the case in which dislocation-related deep acceptor traps are involved in this process. These are 2 × 10^–10 s and 1.5 × 10^–10 s for, respectively, the InGaAs/GaAs and GaAsSb/GaAs heterostructures and 1.6 × 10^–6 s for the GaAs homostructures.     

125-GHz Diode Frequency Doubler in 0.13-$mu{hbox {m}}$ CMOS

The first mm-wave Schottky diode frequency doubler fabricated in CMOS is demonstrated. The doubler built in 130-nm CMOS uses a balanced topology with two shunt Schottky barrier diodes, and exhibits $sim$10-dB conversion loss as well as $-$1.5-dBm output power at 125 GHz. The input matching is better than $-$10$~$dB from 61 to 66 GHz. The rejection of fundamental signal at output is greater than 12 dB for input frequency from 61 to 66$~$GHz. The doubler can generate signals up to 140 GHz.