Analytical modeling of the two-dimensional potential distribution and threshold voltage of the SOI four-gate transistor

The two-dimensional (2-D) channel potential and threshold voltage of the silicon-on-insulator (SOI) four-gate transistor (G/sup 4/-FET) are modeled. The 2-D analytical body potential is derived by assuming a parabolic potential variation between the lateral junction-gates and by solving Poisson's equation. The model is used to obtain the surface threshold voltage of the G/sup 4/-FET as a function of the lateral gate bias and for all possible charge conditions at the back interface. The body-potential model is extendable to fully depleted SOI MOSFETs and can serve to depict the charge-sharing and drain-induced barrier-lowering effects in short-channel devices.     

Compact Surface Potential Model for FD SOI MOSFET Considering Substrate Depletion Region

In this paper, by solving the 1-D Poisson equation using appropriate boundary conditions, we report a closed-form surface potential solution for all the three surfaces (gate oxide-silicon film interface, silicon-film-buried oxide interface, and buried oxide-substrate interface) of fully depleted silicon-on-insulator (SOI) MOSFETs by considering the effect of substrate charge explicitly. During the model derivation, it is assumed that the silicon film is always fully depleted and the back silicon film surface is never inverted. The calculated values of the surface potentials obtained from the proposed model agree well with the iterative solution of exact Poisson equation with a maximum relative error bound of 0.3%. In the entire model, only two square roots, one exponential, and two logarithm terms are used and the continuity and differentiability of the resultant surface potential solutions are ensured making the proposed model computationally efficient.     

Semi-Analytical Modeling of Short-Channel Effects in Si and Ge Symmetrical Double-Gate MOSFETs

A simple analytical expression of the 2-D potential distribution along the channel of silicon symmetrical double-gate (DG) MOSFETs in weak inversion is derived. The analytical solution of the potential distribution is compared with the numerical solution of the 2-D Poisson's equation in terms of the channel length L, the silicon thickness t _Si, and the gate oxide thickness t _OX. The obtained results show that the analytical solution describes, with good accuracy, the potential distribution along the channel at different positions from the gate interfaces for well-designed devices when the ratio of L/t _Si is ges 2-3. Based on the 2-D extra potential induced in the silicon film due to short-channel effects (SCEs), a semi-analytical expression for the subthreshold drain current of short-channel devices is derived. From the obtained subthreshold characteristics, the extracted device parameters of the subthreshold slope, drain-induced barrier lowering, and threshold voltage are discussed. Application of the proposed model to devices with silicon replaced by germanium demonstrates that the germanium DG MOSFETs are more prone to SCEs.     

全耗尽SOI MOSFETs阈值电压和电势分布的温度模型

提出了一个全耗尽SOI MOSFETs器件阈值电压和电势分布的温度模型.基于近似的抛物线电势分布模型,利用适当的边界条件对二维的泊松方程进行求解.同时利用阈值电压的定义得到了阈值电压的模型.该温度模型详细地研究了电势分布和阈值电压跟温度之间的变化关系,同时还近似地探讨了短沟道效应.为了进一步验证模型的正确性,利用SILVACO ATAS软件进行了相应的模拟.结果表明,模型计算与软件模拟吻合较好.     

全耗尽SOI MOSFETs阈值电压和电势分布的温度模型

提出了一个全耗尽SOI MOSFETs器件阈值电压和电势分布的温度模型. 基于近似的抛物线电势分布模型,利用适当的边界条件对二维的泊松方程进行求解. 同时利用阈值电压的定义得到了阈值电压的模型. 该温度模型详细地研究了电势分布和阈值电压跟温度之间的变化关系,同时还近似地探讨了短沟道效应. 为了进一步验证模型的正确性,利用SILVACO ATAS软件进行了相应的模拟. 结果表明,模型计算与软件模拟吻合较好.     

Two-dimensional analytical modeling of fully depleted DMG SOI MOSFET and evidence for diminished SCEs

A two-dimensional (2-D) analytical model for the surface potential variation along the channel in fully depleted dual-material gate silicon-on-insulator MOSFETs is developed to investigate the short-channel effects (SCEs). Our model includes the effects of the source/drain and body doping concentrations, the lengths of the gate metals and their work functions, applied drain and substrate biases, the thickness of the gate and buried oxide and also the silicon thin film. We demonstrate that the surface potential in the channel region exhibits a step function that ensures the screening of the drain potential variation by the gate near the drain resulting in suppressed SCEs like the hot-carrier effect and drain-induced barrier-lowering (DIBL). The model is extended to find an expression for the threshold voltage in the submicrometer regime, which predicts a desirable "rollup" in the threshold voltage with decreasing channel lengths. The accuracy of the results obtained using our analytical model is verified using 2-D numerical simulations.     

Threshold Voltage model for mesa-isolated small geometry fully depleted SOI MOSFETs based on analytical solution of 3-D Poisson's equation

A threshold voltage model for mesa-isolated fully depleted silicon-on-insulator (FDSOI) MOSFETs, based on the analytical solution of three-dimensional (3-D) Poisson's equation is presented for the first time in this paper. The separation of variables technique is used to solve the 3-D Poisson's equation analytically with appropriate boundary conditions. Simple and accurate analytical expressions for the threshold voltage of the front and the back gate are derived. The model is able to predict short channel as well as narrow width effects in mesa-isolated FDSOI MOSFETs. The model is validated by comparing with the experimental results as well as with the numerical results available in the literature.     

Model for the potential drop in the silicon substrate for thin-film SOI MOSFETs

An analytical model is proposed for calculating the potential drop in the silicon substrate for thin-film SOI MOSFETs. The model is verified by numerical simulation, and indicates that the substrate potential causes a nonlinear shift of the threshold voltage for varying back gate voltages. Although this shift is shown to be rather limited for SOI fabrication parameters, it will increase if thinner buried oxides are used in the future.<>     

全耗尽SOI MOSFETs阈值电压解析模型

提出了一种新的全耗尽SOI MOSFETs阈值电压二维解析模型.通过求解二维泊松方程得到器件有源层的二维电势分布函数,氧化层-硅界面处的电势最小值用于监测SOI MOSFETs的阈值电压.通过对不同栅长、栅氧厚度、硅膜厚度和沟道掺杂浓度的SOI MOSFETs的MEDICI模拟结果的比较,验证了该模型,并取得了很好的一致性.     

Two-dimensional analytical modeling of threshold voltages of short-channel MOSFET's

We present an analytical model of the threshold voltage of a short-channel MOSFET based on an explicit solution of two-dimensional Poisson's equation in the depletion region under the gate. This model predicts an exponential dependence on channel length (L), a linear dependence on drain voltage (VD), and an inverse dependence on oxide capacitance (εox/tox). An attractive feature of this model is that it provides an analytical closed-form expression for the threshold voltage as a function of material and device parameters (tox, VD, L, substrate bias, and substrate doping concentration) without making premature approximations. Also, this expression reduces to the corresponding expression for long-channel devices.     

A two-dimensional analytical threshold voltage model for MOSFET's with arbitrarily doped substrates

A threshold voltage model is presented which is valid for short- and long-channel MOSFET's with a nonuniform substrate doping profile. The model is based upon an approximate two-dimensional analytical solution of Poisson's equation for a MOSFET of arbitrary substrate doping profile which takes into account the effect of curved junctions of finite depth. The analytical model is compared to MINIMOS simulations showing that it can accurately predict short-channel threshold voltage falloff and threshold voltages in this vicinity without the use of fitting parameters.     

Modelling the threshold voltage of short-channel silicon-on-insulator MOSFETs

A simple analytical model for the threshold voltage of short-channel, thin-film, fully-depleted silicon-on-insulator MOSFETs is presented. The model is based on the analytical solution for the two-dimensional potential distribution in the silicon film, which is taken as the sum of the long-channel solution to the Poisson equation and the short-channel solution to the Laplace equation. The model shows close agreement with numerical PISCES simulation results. The equivalence between the proposed model and the parabolic model of Young (1989) is also proven.<>     

Semianalytical Modeling of Short-Channel Effects in Lightly Doped Silicon Trigate MOSFETs

A simple analytical expression of the 3-D potential distribution along the channel of lightly doped silicon trigate MOSFETs in weak inversion is derived, based on a perimeter-weighted approach of symmetric and asymmetric double-gate MOSFETs. The analytical solution is compared with the numerical solution of the 3-D Poisson's equation in the cases where the ratios of channel length/silicon thickness and channel length/channel width are ges 2. Good agreement is achieved at different positions within the channel. The perimeter-weighted approach fails at the corner regions of the silicon body; however, by using corner rounding and undoped channel to avoid corner effects in simulations, the agreement between model and simulation results is improved. By using the extra potential induced in the silicon film due to short-channel effects, the subthreshold drain current is determined in a semianalytical way, from which the subthreshold slope, the drain-induced barrier lowering, and the threshold voltage are extracted.     

A new 2-D model for the potential distribution and threshold voltage of fully depleted short-channel Si-SOI MESFETs

A new two-dimensional (2-D) analytical model for the threshold voltage of a fully depleted short-channel Si-MESFETs fabricated on the silicon-on-insulator (SOI) has been presented in this paper. The 2-D potential distribution functions in the active layer of the device is approximated as a parabolic function and the 2-D Poisson's equation has been solved with suitable boundary conditions to obtain the bottom potential at the Si/oxide layer interface. The calculations have been carried out for both uniform and nonuniform doping profiles in two dimensions. The minimum bottom potential is used to monitor the drain-induced barrier lowering effect and consequently an analytical expression for the threshold voltage of the device has been derived. The numerical results for the bottom potential and threshold voltage considering a wide range of device parameters have also been presented. The model has been compared with the simulated results obtained by using the ATLAS Device Simulation Software to show the validity of the proposed model. For uniform doping profile, the numerical results have also been compared with the reported data in the literature and a good agreement is observed among the three. The proposed model is simple and easy to understand the behavior of the fully depleted short-channel SOI-MESFETs as compared to the other models reported in the literature.     

A 2-D analytic model for the threshold-voltage of fully depletedshort gate-length Si-SOI MESFETs

A two-zone Green's function solution method is proposed to analytically model the potential distribution in the silicon film of fully depleted SOI MESFETs, in which the exact solution of 2-D Poisson's equation is obtained by using the appropriate boundary conditions. From the derived analytic 2-D potential distribution, the bottom potential in the active silicon film is used to analyze the drain-induced barrier lowering effect and the threshold voltage is defined in terms of minimum channel potential barrier. The results of the developed analytic threshold-voltage model are compared with those of 2-D numerical simulation, and good agreements are obtained for the gate length down to 0.1 μm with wide ranges of structure parameters and bias conditions     

Analytical modeling of the subthreshold current in short-channel MOSFET's

In this paper an analytical model for subthreshold current for both long-channel and short-channel MOSFET's is presented. The analytical electrostatic potential derived from the explicit solution of a two-dimensional Poisson's equation in the depletion region under the gate for uniform doping is used. The case for nonuniform doping can easily be incorporated and will be published later. The results are compared to a numerical solution obtained by using MINIMOS, for similar device structures. An analytical expression for the channel current is obtained as a function of drain, gate, substrate voltages, and device parameters for devices in the subthreshold region. The short-channel current equation reduces to the classical long-channel equation as the channel length increases.     

Modeling of Surrounding Gate MOSFETs With Bulk Trap States

We report a simple analytical model for surrounding gate MOSFETs including bulk traps. Based on the depletion approximation and the assumption that bulk traps are uniformly distributed inside the bandgap, we solved Poisson's equation in cylindrical coordinates and derived the general solution of potential distribution. Extraction of threshold voltage and subthreshold slope were conducted. The analytical solution yields good agreement with MEDICI simulations confirming the model. The model predicts a linear threshold voltage drop, depending on the trap density, as the diameter of the device decreases when the channel is fully depleted     

Theoretical analysis on threshold characteristics of surface-channel MOSFET's fabricated on a buried Oxide

Simple models for threshold characteristics of surface-channel MOSFET's, which are fabricated on a buried oxide covered by an electric field shielding layer, are proposed. The electric field shielding effect is taken into account when the Poisson's equation is solved. Threshold voltage expressions are derived from the solution of the Poisson's equation and the surface-channel charge neutrality relationship. Theoretical analysis shows that the thinner silicon layer leads to enhancement of the electric field which results in the reduction of the short-channel effect.     

A simple analytical model for the front and back gate threshold voltages of a fully-depleted asymmetric SOI MOSFET

A simple analytical model for deriving the front and the back gate threshold voltages of a short-channel fully-depleted SOI MOSFET is presented. Taking into account the lateral variations of the front and the back surface potentials, we obtain two-dimensional potential distributions in the fully depleted silicon body, the front oxide layer, and the back oxide layer. From the obtained two- dimensional potential in the silicon body, the minimum values of both front and back surface potentials are derived and used to describe both front and back gate threshold voltages as closed-form expressions in terms of various device geometry parameters and applied bias voltages. Obtained results are found to be in good agreement with the numerically simulated results.     

Modeling of threshold voltage of a quadruple gate transistor

In this paper, a three dimensional analytical solution of electrostatic potential is presented for undoped (or lightly doped) quadruple gate MOSFET by solving 3-D Poisson's equation. It is shown that the threshold voltage predicted by the analytical solution is in close agreement with TCAD 3-D numerical simulation results. For numerical simulation, self-consistent Schrodinger-Poisson equations, calibrated by 2D non equilibrium green function simulation, are used. This analytical model not only provides useful physics insight of effects of gate length and body width on the threshold voltage, but also serves as a basis for compact modeling of quadruple gate MOSFETs.