A digital power factor correction (PFC) control strategy optimized for DSP

A predictive algorithm for digital control power factor correction (PFC) is presented in this paper. Based on this algorithm, all of the duty cycles required to achieve unity power factor in one half line period are calculated in advance by digital signal processors (DSP). A boost converter controlled by these precalculated duty cycles can achieve sinusoidal current waveform. One main advantage is that the digital control PFC implementation based on this control strategy can operate at a high switching frequency which is not directly dependent on the processing speed of DSP. Input voltage feed-forward compensation makes the output voltage insensitive to the input voltage variation and guarantees sinusoidal input current even if the input voltage is distorted. A prototype of boost PFC controlled by a DSP evaluation board was set up to implement the proposed predictive control strategy. Both the simulation and experimental results show that the proposed predictive strategy for PFC achieves near unity power factor.     

Analysis and design of a single-stage single-switch bi-flyback ac/dc converter

An analysis and design of single-stage, single-switch bi-flyback ac/dc converter is presented. The main flyback stage controls the output power from the link capacitor voltage with Discontinuous Conduction Mode (DCM) or Continuous Conduction Mode (CCM) operation, while an auxiliary flyback stage supplies the power to the output directly from ac line input with DCM operation.

This scheme can effectively reduce the voltage stress on the link capacitor and can achieve the power factor correction (PFC) without a dead band at line zero-crossings, which reduces the harmonic distortion in ac line current. Theoretical analysis of the converter is presented and design guidelines to select circuit components are given. The experimental results on a 60?W (15?V, 4?A), 100?kHz ac/dc converter show that maximum link voltage and maximum efficiency are around 415?V and 82%, respectively. The power factor is above 0.96 under universal line input and load conditions.     

峰值电流型PFC Boost变换器斜坡补偿的时变模型和全局动态优化试验

 建立连续峰值电流型PFC Boost变换器的时变模型,动态分析快时标不稳定现象的产生,并结合电路试验,分析常规固定斜坡补偿的不足.以斜坡补偿时变模型为基础,以工频输入电流正弦化为目标,提出一种全局优化的动态时变补偿设计理论和方法.基本原理电路试验结果表明全局优化动态补偿既消除了快时标不稳定现象,又获得了单位功率因数,达到了全局补偿优化的目的.     

Use of leading-edge modulation to transform boost and flybackconverters into minimum-phase-zero systems

In leading edge modulation, the pulse width modulated (PWM) signal is turned off at the clock signal and turned on when the error signal crosses the ramp waveform. It is shown that the positive zero in the power stage transfer function of boost and flyback regulators can be shifted into the left-half-plane under suitable conditions. These conditions are as follows: (1) leading edge modulation must be used in the pulse width modulator; (2) the feedback compensation must not average the capacitor EST-generated output voltage switching ripple; and (3) appropriate power stage parameter values are necessary. The design procedure for shifting the positive zero into the left-half-plane is presented. Experimental verification is provided     

TRIAC dimmable ballast with power equalization

A two-stage, two-wire TRIAC dimmable electronic ballast for fluorescent lamps is presented in this paper. It is constructed by using a flyback converter as the input power factor corrector to supply a half-bridge series-resonant parallel-loaded inverter to ballast the lamp. The flyback converter is operated in discontinuous conduction mode so that the filtered input current profile is the same as the TRIAC-controlled voltage waveform. The switches in the inverter are switched at a constant frequency slightly higher than the resonant frequency of the resonant tank. Based on the constant average input current characteristics of the inverter, the dimming operation is simply achieved by pulsewidth modulation control of the magnitude of the flyback converter output voltage. No synchronization network is required between the input and output stages. In addition, a linear power equalization scheme is developed so that the dc-link voltage (and hence the lamp power) is in a linear relationship with the firing angle of the TRIAC. The average output voltage of the dimmer controls the equalized flyback converter output voltage. Modeling, analysis, and design of the ballast will be described. A prototype was implemented to verify the experimental measurements with the theoretical predictions.     

Small-signal modeling of multiple-output flyback converters incontinuous conduction mode with weighted feedback

A small-signal model of multiple-output flyback power converters is developed. From the model, closed-loop power converter performances, such as line regulation and load regulation, can be predicted. Based on the model, a design procedure for feedback compensation is suggested. The model is experimentally verified     

Control of power factor correcting boost converter withoutinstantaneous measurement of input current

This paper proposes a new control method for the constant-frequency control of power factor correcting boost power converter using a sinewave template modulated PWM signal which eliminates the need for instantaneous measurement of the line current for the switching control of the boost converter. The control strategy is based on the notion that the line current can be forced to trace a deterministic waveform such as a sinusoid by considering the implicit model of the sinewave in the boost converter controller structure. The modulating sinewave template is generated using the line voltage, the boost converter output voltage and the load current. The paper provides the analysis and the design of the controller and presents simulation and implementation results to demonstrate its effectiveness     

一种原边控制的小功率反激式LED恒流驱动电路

介绍了一种具有功率因数校正功能的原边反激式LED驱动变换器。分析了原边控制的反激式变换器恒流输出的原理与输出电流线性调整率衰退的主要原因;设计了一种自适应的片内功率管关断延时检测与补偿电路,改善了输出电流的线性调整率。设计的单级反激式变换器在90~260 V交流输入电压范围内,功率因数大于0.9,输出功率范围为5~13 W。通过采用改进的峰值电流采样技术与内置自适应关断延时补偿技术,输出电流的线性调整率由23.3%减小到小于1.2%。     

Single-Stage AC/DC Converter With Input-Current Dead-Zone Control for Wide Input Voltage Ranges

A single-phase single-stage ac/dc converter with input-current dead-zone control is proposed. It is based on flyback topology operating in discontinuous conduction mode (DCM). The current charging into the link capacitor is controlled according to line changes by adjusting the input-current blocking angle to alleviate an excessive increase of the link voltage. The reduced voltage stress can maintain an almost-constant voltage irrespective of load conditions by operating in dc/dc stage in DCM. Experimental results of a 60-W (5-V 12-A output) prototype converter show that the link voltage is limited within 384 V and that the measured power factor is more than 0.91 under universal voltage inputs and entire load conditions. In addition, the maximum efficiency is measured to be about 81% at the rated condition     

Digital power-factor correction for a capacitor-charging power supply

The design and construction of a low-power low-cost power supply capable of charging an energy storage capacitor from a 120-V AC source and capable of power-factor correction (PFC) is presented. The load that is generally connected to a capacitor-charging power supply (CCPS) is a pulsed power load (i.e., laser, cardiac defibrillator, or flash lamp). A flyback converter was incorporated into the CCPS because it is capable of charging a capacitor while maintaining a high power factor. The control system of the CCPS uses peak current control to achieve PFC and is implemented using standard "off-the-shelf" digital logic components. A 300-V prototype has been constructed and tested. The experimental results show that a high power factor is obtained by the CCPS utilizing a flyback converter and the digital logic control system.     

A single-switch AC/DC converter with voltage regulated storage capacitor

A single-stage power-factor-corrected AC/DC converter (SSPFC) usually causes high voltage stress on the intermediate storage capacitor, due to the lack of control of this voltage. The storage capacitor voltage varies largely with line voltage, and load current and is usually higher than the peak line voltage. This paper presents a new single-switch SSPFC based on a flyback topology for which the storage capacitor voltage is loosely regulated by the output voltage. Without using extra power switches to increase the control dimension, the proposed converter uses a flyback converter with dual-output transformer to achieve the control purpose. The range of storage capacitor voltage change against the change of input voltage and load current is significantly reduced. Moreover, the maximum storage capacitor voltage can stay below the peak line voltage at high line condition. Experimental results verifying the operation of the proposed SSPFC are also reported.     

Compensation strategies for shunt active-filter control

Compensation strategies for control of shunt active filters are compared in the paper. It is shown that the strategy based on unity-power factor control is appropriate when the supply voltage waveform of the plant where the active filter is connected shows significant distortion. As voltage distortion increases, this strategy provides compensated line current having lower harmonic distortion and RMS value with respect to the strategy generally used. This contributes to diminish the current and voltage distortion in networks. The unity-power factor compensation strategy conditions the current flowing in the plant where compensation is realized to fit the voltage waveform, thus reaching a unity power factor. Hence, the line current RMS value is minimum. The comparison of the strategies is performed by both Monte Carlo and ATP simulation     

A mixed-mode PWM controller

In this article, a mixed-mode (MM) PWM controller for dc–dc power converter topologies is presented and analysed. Compared to the conventional peak current-mode (PCM) controller, the proposed controller exhibits better results in terms of robustness towards load and reference voltage variations while maintaining better dynamic response. In the PCM controller, the control signal is a combination of inductor or, most often, switch current and a suitable compensation ramp which in the most common applications is constant. In the proposed controller, the constant compensation ramp has been replaced by a ramp voltage which is proportional to the output voltage taking into consideration the output voltage variations during load and reference transients. Consequently, the proposed controller, which exhibits the same advantages as with the PCM controller, additionally exhibits better load and reference performance for constant output voltage and output tracking applications without increasing the cost and the complexity of the control circuit. Finally, in order to verify the theoretical analysis and conclusions, both control schemes (i.e. PCM and MM) have been simulated and experimentally tested using a 75 W buck converter unit.     

基于功率分配控制的多路输出反激变换器

为了改善多路输出反激变换器交叉调整率,提出了一种基于功率分配的控制策略。利用ARM实时采样各路输出端的实时负载,结合各路期望输出电压计算期望输出功率的总和,进一步计算高频变压器初级所需的实时输入功率,获得主开关和次级整流开关的导通比,使得每一路的输出获得期望的功率和稳定的输出电压。实验结果表明,利用基于功率分配的控制策略所设计的双路输出反激变换器获得了小于1.6%的交叉调整率和小于2.2%的负载调整率以及小于0.7%的输入电压调整率。所设计的变换器不仅有效解决了交叉调整率的问题而且具有较好的负载调整率和输入电压调整率。     

A high-power-factor electronic ballast using a flyback push-pullintegrated converter

This paper describes a high-power-factor electronic ballast for fluorescent lamps. The converter offers a high power factor and a high-frequency supply to the lamp using a single switch. In spite of its simplicity, an excellent performance concerning load and supply is achieved, ensuring a sinusoidal and in-phase supply current. High power factor is achieved by using a flyback converter operating in discontinuous conduction mode. Operating principle, design equations, component stress, and efficiency are presented. Experimental results have been obtained for one 40-W fluorescent lamp operating at 50-kHz switching frequency and 220-V line voltage     

Reference current estimation under distorted line voltage for control of shunt active power filters

Shunt active power filters (APF) are used in power systems for the compensation of harmonic currents generated for non linear loads. A new digital reference current estimation method for control of APF using a Kalman digital algorithm is presented. Its capability of prediction avoids the effects of computational lags derived from the digital signal processing. The characteristics of the proposed technique are: the harmonic current compensation in a global or a selective way, the fast dynamical response and its independence from disturbances in the line voltage waveform. Simulation and experimental results under distorted supply voltages demonstrate the usefulness of the presented technique to improve the filtering performance.     

H∞ control applied to boost power converters

The controller in a pulse-width-modulation (PWM) power converter has to stabilize the system and guarantee an almost constant output voltage in spite of the perturbations in the input voltage and output load over as large a bandwidth as possible. Boost and flyback power converters have a right-half-plane zero (RHPZ) in their transfer function from the duty cycle to the output voltage, which makes it difficult to achieve the aforementioned goals. Here, the authors propose to design a controller using H^∞ control theory, via the solution of two algebraic Riccati equations. The almost optimal H^∞ controller is of the same order as the converter and has a relatively low DC gain. The closed-loop characteristics of a typical low-power boost power converter with four different control schemes were compared by computer simulation. The H^∞ control was found to be superior in a wide frequency range, while being outperformed by the others at extremely low frequencies. Good agreement was found between simulation results and experimental measurements     

A novel digital multi-mode control strategy with PSM for primary-side flyback converter

This article described a novel digital multi-mode control strategy for primary-side controlled flyback converter to improve the efficiency within full-load range. The working modes of different load ranges were chosen according to the main power losses analysis and other constraint. Especially, a novel pulse skip mode control method which could reduce the number of actual switching cycles was proposed to improve the light load efficiency. A prototype with field-programmable gate array control has been made to verify the proposed digital multi-mode control strategy.     

High performance series-parallel type on-line UPS

An improved single-phase uninterruptible power supply (UPS) is proposed that is composed of a series converter and a parallel converter. The series converter regulates the output voltage, and then the parallel converter provides reactive current compensation and battery charging. A fast detection technique of the line voltage is proposed, which has almost zero transition time from the line power mode to the power failure mode. Furthermore, a current controller of the parallel converter for unity power factor is suggested and it is derived using the feedback linearization technique. A current limit technique in the power failure mode is proposed to protect the parallel converter without a system trip under any impulsive load. All control algorithms are implemented in software with a single-chip microcontroller. Experimental results obtained under a 3?kVA prototype show good transient and steady-state performance such as almost negligible transition time, 97% power efficiency and 99% power factor.     

A single-stage quasi-resonant flyback converter using a synchronous rectifier

A single-stage quasi-resonant flyback converter using the synchronous rectifier (SR) is proposed for improving power factor and system efficiency. This converter operates at the critical conduction mode with the variable frequency (VF) control to reduce the switching loss of the primary switch. The bulk capacitor voltage can be independent of the output load and kept within a practical range for the universal line input. Therefore, the problem of high-voltage stress across the bulk capacitor is reduced. The proposed converter features relatively low bulk capacitor voltage in the universal line voltage and also complies with the Standard IEC 61000-3-2 Class D limits. Moreover, since it uses the voltage-driven SR, it achieves a high efficiency. The operational principle and theoretical analysis are presented. Experimental results for a 100?W (19?V/5.3?A) adapter at the VF were obtained to show the performance of the proposed converter.