基于谐振原理的三电平叠层母排杂散电感测试方法

提出了一种基于LC谐振原理的三电平叠层母排杂散电感的测试方法.在测试电路中加入谐振电容,根据换流过程中叠层母排的杂散电感与已知谐振电流产生的谐振频率,精确测量出谐振频率,由已知的谐振电容数值推导出叠层母排的杂散电感.试验表明,该方法对于三电平叠层母排杂散电感的测量精度高,对于中高压三电平电力电子拓扑的过电压保护具有重要的指导意义.     

基于全碳化硅功率组件的叠层母排优化设计研究

为减小全Si C功率组件开关振荡,满足高功率密度对功率器件的应用要求。定量分析三相两电平拓扑叠层母排元器件布局关系,建立考虑自感和互感的叠层母排数学模型,基于数学模型计算单个电容和2个电容对应的母排回路杂散电感等效值,仿真分析3个电容以上对应的叠层母排回路杂散电感等效值。计算与仿真结果均表明,随着支撑电容数量的增加,回路杂散电感逐渐减小,并且一致性更好。通过分析各支路杂散电感,优化了直流母线端口布局;通过双脉冲实验验证了叠层母排优化后抑制开关振荡的效果。实验结果表明,虽然优化后的功率组件开关时间及开关损耗有所增加,但开关振荡得到有效抑制,能更好地满足高功率密度应用场合对安全性能的需求。     

基于Ansys的低电感叠层母排设计

针对功率开关关断过电压和EMI危害,本文从减小回路杂散电感出发,阐述了叠层母排在功率变换器中应用优势及数学模型。然后,基于电磁场理论,提出回路面积最小化无感母排设计原则,并进行H桥逆变器叠层母排结构设计。最后,Ansys有限元仿真结果表明了设计方法的合理性。     

层叠母排并联支路杂散电感建模及测量方法

建立精确母排的杂散电感模型是准确分析绝缘栅双极型晶体管(IGBT)可靠性的关键问题之一。大功率IGBT模块通常存在2~3个功率端子,端子之间的均流特性与母排所在支路的杂散电感相关。以一台三相两电平车载逆变器叠层母排作为研究对象,建立了母排并联支路的局部自感和互感模型,并对模型进行简化。借助Q3D仿真工具,对母排并联支路局部杂散电感进行提取,验证了模型简化方法的准确性。同时提出一种高精度的母排局部杂散电感测量方法,验证了杂散电感仿真结果的正确性。     

基于分立器件并联型碳化硅逆变器的叠层母排设计研究

在分立器件并联型碳化硅逆变器中,主功率回路叠层母排的设计需满足低寄生电感、外电路对称及器件均温的目标。然而,现有叠层母排的结构方案大多针对的是功率模块,对于分立器件并联型叠层母排缺乏系统性的设计方法。首先以两管并联为例,展示分立器件并联型叠层母排的三维结构特征。接着提出一种分立器件并联型叠层母排寄生电感建模以及解耦计算方法,为评估并联支路寄生电感大小和对称性提供依据。最终基于Ansys Q3D的参数化仿真分析,对不同器件布局以及关键物理尺寸进行寻优,总结出分立器件并联型叠层母排的设计原则。基于上述方法,设计出一种六管并联型叠层母排结构,通过仿真和实验验证了该结构满足低感,外电路对称以及器件均温的设计目标。     

考虑寄生电感的谐振开关电容变换器电压尖峰抑制

基于碳化硅(SiC)器件的谐振开关电容变换器(RSCC)因其软开关特性,适用于高频、高功率密度的场合.但是较高的工作频率使其对线路寄生参数较敏感,易造成开关器件的电压尖峰问题.通过分析RSCC叠层母排模型,该文建立含有寄生电感的等效电路,研究寄生电感对电路运行模态的影响,并推导开关器件电压峰值与寄生电感之间的关系.在此基础上,提出优化叠层母排结构和吸收电容的电压尖峰抑制方案,仿真及实验结果验证了该文电压尖峰抑制方案的有效性和可行性.     

低感设计对变流器电容纹波电流影响分析与优化

在大功率变流器产品的设计应用过程中,因母排杂散电感的不匹配导致变流器模块支撑电容纹波电流有效值偏大,电容长期工作在超额状态以致损坏。针对上述问题,根据变流器模块不同母排结构建立相对应的数学模型,分析了支撑电容电流偏大的根本原因。通过试验的方法测量提取不同母排结构的杂散电感以指导后续母排的设计。根据理论分析提出了通过优化母排设计、改善控制算法来减小母线支撑电容纹波电流。最后,基于某一变流器平台,通过测量不同试验条件下电容电流纹波,对比分析试验数据以验证所提改进措施的有效性。     

基于全碳化硅功率组件的变流器母排杂散电感解析计算方法

碳化硅(SiC)器件的高开关速度使得其对杂散参数更为敏感,容易激发高频振荡和超调.因此需要对功率回路杂散电感进行准确计算,其中以母排电感最为关键.该文首先对现有母排电感计算方法分析比较,并提出一种考虑趋肤效应影响的母排电感计算方法;在此基础上,结合有限元仿真定量分析空间几何参数、器件布局和母排开孔等因素对母排电感的影响,并通过最小二乘逼近得到多异结构母排电感解析计算公式.最后,使用该方法计算1200V/423A SiC MOSFET测试平台的母排电感,并分别与Ansys Q3D仿真提取结果和实验测试结果对比,结果表明,该方法计算大功率变流器叠层母排杂散电感具有较高的实用性和准确性,可为SiC MOSFET的应用研究和叠层母排的布局设计提供有益支撑.     

串联谐振型FCL对高压断路器开断短路故障的影响

基于串联谐振型故障限流器的等效分析模型,分别针对短路出线故障和近区故障,详细研究了限流电感及其并联杂散电容对短路电流、断路器瞬态恢复电压第一个峰值以及瞬态恢复电压上升率的影响,并综合以上指标得到了断路器苛刻度的变化规律。研究表明,选取合适的限流电感、采取合理的措施改变限流电感并联杂散电容能够有效地降低断路器的苛刻度,有利于断路器对短路故障的开断。     

压接式IGBT模块的动态特性测试平台设计及杂散参数提取

压接式IGBT模块具有散热性能好、杂散电感小、短路失效直通等特点,在柔性直流输电等大容量电力电子变换系统中具有极为重要的应用潜能。然而,目前学术界和工业界尚未很好地理解压接式IGBT模块的动态开关特性,严重制约了其推广应用。从压接式IGBT的封装结构和电气特性出发,基于双脉冲测试原理,设计并搭建压接式IGBT模块的动态开关特性测试平台。采用Ansoft Q3D软件对测试平台的杂散参数进行仿真,分析杂散参数的分布特征、影响与提取方法,并通过实验进行验证,揭示叠层母排技术与吸收电容对器件关断电压尖峰的抑制作用,低寄生电感总和验证了平台设计方案的合理性。     

A simplified method of calculating busbar inductance and its application for stray resonance analysis in an inverter dc link

Sinusoidal PWM control is widely applied to power electronic converters. The carrier frequency of recent converter products is gradually being raised in order to decrease current harmonics as much as possible. However, in the dc filter circuits of large capacity converters, the capacitance of a unit capacitor is relatively large, and the busbars are relatively long. Therefore, the resonant frequency is lower than those of small capacity converters. Consequently, there is a concern that the carrier frequency will become close to the resonant frequency, which will cause trouble. On the other hand, it is often necessary to decrease the inductance of the loop circuit consisting of a switching device and its by‐pass circuit, in order to suppress the switching surge voltage. In both cases described above, it is important to be sure of the exact busbar inductance for reliable design. In this paper, a simplified method of calculating busbar inductance is proposed. This method is based on the partial inductance theory. In particular, the characteristics of a pair of busbars, and the use of the method are described. Finally, an application to stray resonance analysis in the dc filter circuit of a three level inverter is described in comparison with experimental data. From these results, we confirmed that the proposed method is usable to estimate busbar inductance quickly and accurately. © 1999 Scripta Technica, Electr Eng Jpn, 126(3): 49–63, 1999     

Hybrid DC–DC converter with high efficiency,wide ZVS range,and less output inductance

In this paper, a new soft switching direct current (DC)–DC converter with low circulating current, wide zero voltage switching range, and reduced output inductor is presented for electric vehicle or plug‐in hybrid electric vehicle battery charger application. The proposed high‐frequency link DC–DC converter includes two resonant circuits and one full‐bridge phase‐shift pulse‐width modulation circuit with shared power switches in leading and lagging legs. Series resonant converters are operated at fixed switching frequency to extend the zero voltage switching range of power switches. Passive snubber circuit using one clamp capacitor and two rectifier diodes at the secondary side is adopted to reduce the primary current of full‐bridge converter to zero during the freewheeling interval. Hence, the circulating current on the primary side is eliminated in the proposed converter. In the same time, the voltage across the output inductor is also decreased so that the output inductance can be reduced compared with the output inductance in conventional full‐bridge converter. Finally, experiments are presented for a 1.33‐kW prototype circuit converting 380 V input to an output voltage of 300–420 V/3.5 A for battery charger applications. Copyright © 2015 John Wiley & Sons, Ltd.     

Capacitor current imbalance and its suppression method between phase legs for three‐phase inverter

This paper proposes a method to suppress the capacitor current imbalance between the phase legs of a three‐phase inverter circuit. This circuit consists of half‐bridge modules and DC‐link capacitors closely connected to each module. It can be designed for low stray inductance between power semiconductor devices and DC‐link capacitors in each module. However, in the conventional structure, the stray inductance between the phase legs may lead to an imbalance in the capacitor current due to the DC‐side resonance phenomenon under a higher switching frequency condition by using a SiC MOSFET. This paper presents the analyses of the equivalent circuit considering the circuit configuration, which suggests that capacitor current imbalance occurs depending on the stray inductance between phase legs. To suppress the capacitor current imbalance, a delta‐type bus bar connecting phase legs is proposed. The experiment results at 300 V and 4.6 A demonstrate the suppression effectiveness of the proposed method.     

基于IGBT开关过程的变流器杂散电感分析方法

在IGBT关断的瞬态过程中,变流器杂散电感会使IGBT的集、射极之间产生较高的电压尖峰,从而造成较大的电磁干扰,甚至导致IGBT损坏。若能测量变流器杂散电感,则可在一定程度上预估该电压尖峰,并设计适当的缓冲电路。本文分析了IGBT开通和关断瞬态过程中各阶段的电压和电流,提出了一种优化的基于IGBT开关过程的大功率变流器杂散参数分析方法。通过双脉冲测试方法对西门康功率器件SKM400GAL176D的开关过程进行测试,获取其开通和关断瞬态过程曲线,利用前述方法计算出母排杂散电感。将计算结果与仿真软件提取结果、E4980A阻抗分析仪测试结果进行对比,验证了该方法的准确性与实用性。     

基于开关瞬态过程分析的大容量变换器杂散参数抽取方法

由于线路杂散电感存储能量的释放,绝缘门极双极性晶体管（insulatedgatebipolartransistor,IGBT）在开通和关断的瞬态过程中,其两端将产生电压尖峰。为了对该电压尖峰进行定量研究,需要对IGBT开关过程进行分析,抽取线路的杂散电感参数。传统抽取方法通常利用IGBT关断电压的最大幅值以及近似的电流斜率作为计算参数,其计算结果并不精确。为得到更精确的结果,提出一种新的参数抽取方法,通过将IGBT开通、关断的非线性过程分解为多个线性阶段,并充分考虑反并联二极管前向恢复和反向恢复的影响,在此基础上得到电压过冲△Uot。和相对应的di／dt,进而得到准确的杂散参数抽取过程。最后,将该分析方法在一台75kVA的单相逆变器进行实验验证,利用不同工况下的开通和关断过程进行线路杂散电感抽取,均得到一致的结果,从而证明了本方法的有效性与正确性。     

Design and testing of heavy pulse current switches based on photothyristors

This article presents the results of testing heavy pulse current switches based on photothyristors. Transient processes are considered that are observed in the semiconductor switch when the capacitor is discharged upon inductance and with a signal-shaping network with an inductor and crowbar diodes. The limit currents are found for the semiconductor structure, at which thermal generation peaks are observed in oscillograph records of direct voltage drop. The energizing of the photothyristor is analyzed. The need for forcing RC circuits to ensure fast and steady transition of the semiconductor structure to the conductive state is shown. The transient process observed at reverse recovery of photothyristors in the discharge circuit with inductance is considered. The need for snubber circuits to suppress pulse overvoltage is established. The particulars of the transient switching of current to the crowbar diodes and the generation of pulse overvoltages at reverse recovery of photothyristors are considered for a discharge circuit with crowbar diodes. The parameters of snubber circuits to suppress these overvoltages are determined. The validity of the accepted engineering solutions is confirmed by the results of tests at switching of a pulse current of up to 100 kA.     

一种基于DDS的寄生电感测量仪设计

精确的测量寄生电感,对于电容的合理应用具有十分重要的意义,介绍了一种利用LC谐振原理测量电容自身寄生电感的方法.利用直接数字合成器产生可编程的扫频信号激励含有寄生电感的电容,同时采用对数检波器对经过待测网络后的信号进行检波,在利用AD转换器采集检波器输出的直流信号.利用特定的程序算法比较连续的频率点的输出电平,最终找出...     

一种新颖的耦合电感无源无损缓冲电路及其设计方法

无源无损软开关技术是一种通过附加无源器件实现开关管软开关的手段,因其控制简单易于实现,在工程应用中得到了广泛的应用。但传统无源无损软开关技术应用于大功率场合时,流入缓冲电路二极管的电流较大,造成了成本上升和散热困难等一系列问题。首先分析了传统无源无损软开关技术应用于大功率Boost变换器上存在的不足,随后提出了一种新型耦合电感无源无损缓冲电路以及该电路谐振元件参数的设计方法。该设计以避免谐振回路参与主电路的续流过程为主要思路,降低流过二极管与缓冲电感的电流,提升变换器的转换效率。通过设计一台15 kW的样机,验证了该缓冲电路的正确性与可行性。