弛张振荡器在高精度体温计芯片中的应用

设计了一款基于弛张振荡器的温度测量电路,通过参考/感应振荡器电路,将热敏电阻的阻值变化转变成数字化的频率信号送系统处理。弛张振荡器使用了具有施密特触发器相同功能的RS触发器,降低了芯片对工艺的要求,便于在低电压和宽温度范围正常工作。该温度测量电路被成功地应用于一款便携式电子体温计芯片,芯片采用0.5μm 1.5 V DMSP CMOS工艺,面积为1 250μm×1 260μm,在1.1 V的低电压下测量精度高达0.05°C,工作电流为30μA,待机电流为0.2μA。     

Low-voltage low VDD sensitivity relaxation oscillator for passive wireless microsystems

A low-voltage relaxation oscillator for passive wireless microsystems is proposed. The oscillator employs a current pulse generator to generate effective hysteresis for oscillation without using a Schmitt trigger, avoiding the drawback of the high sensitivity of the frequency of Schmitt trigger relaxation oscillators to supply voltage fluctuation. The proposed oscillator has been implemented in TSMC-0.18 mum 1.8 V six-metal one-poly CMOS technology. The performance of the oscillator is validated using measurement results.     

一种用于DC-DC转换器的精密振荡器设计

提出了一种用于DC-DC转换器的高频、精密张驰振荡器的设计方法.基于V-i转换器原理,设计了精密电流产生电路;基于基极电流补偿技术,设计了一种结构新颖的比较器门限电压产生电路,从而有效地提高了振荡器频率稳定性和精度.通过外接可调电阻,振荡器可调工作频率为100 kHz～3 MHz,并能同时提供占空比85%的方波信号和用于斜率补偿的锯齿波信号,还具有与外接时钟信号同步振荡的功能.流片测试结果表明该振荡器满足设计指标.     

Novel CMOS Schmitt trigger

A novel CMOS Schmitt trigger circuit has been realised, using only five MOS transistors. The circuit always guarantees hysteresis, even with very large process variations. The switching speed of the new Schmitt trigger is higher, compared to previously reported CMOS Schmitt triggers.     

一种基于0.18μm CMOS工艺的上电复位电路

介绍了一种采用0.18μm CMOS工艺制作的上电复位电路。为了满足低电源电压的设计要求,采用低阈值电压(约0V)NMOS管和设计的电路结构,获得了合适的复位电压点;利用反馈结构加速充电,提高了复位信号的陡峭度;利用施密特触发器,增加了电路的迟滞效果。电路全部采用MOS管设计,大大缩小了版图面积。该上电复位电路用于一种数模混合信号芯片,采用0.18μm CMOS工艺进行流片。芯片样品电路测试表明,该上电复位电路工作状态正常。     

Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35‐μm standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V_CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V_CC is the fixed voltage supply of 3.3 V.     

An optically controllable negative resistance circuit constructed with optocouplers

An optocoupler with a Darlington configuration at the output side can be used as a one port active device with a current-controlled negative resistance by simply connecting the input and output sides in cascade. The author proposes an optically controllable negative-resistance circuit constructed with optocouplers. The breakover voltage and the holding current of the negative-resistance characteristics can be controlled widely with two external light inputs. Hence, the circuit may be applied to optronic functional switching operations. It is demonstrated that an optically controlled relaxation oscillator can be easily constructed using the circuit, and that applications of the relaxation oscillator to a light modulator and an optical Schmitt trigger can be realized by simple circuit configurations.     

Design and Enactment of Diverse Low Power Techniques Based Schmitt Trigger

In the present-day VLSI system, low power design plays a noteworthy role. As we know that, a circuit with higher power consumption can ruin the performance of the system because in the modern world most of the systems are portable. Subsequently, they are functioned by the batteries. Therefore, it is desirable to have a system which operates at lower supply voltages along with maintaining the performance of the system. This low power system can be attained by abating the leakages of the devices up-to an enormous magnitude. In the contemporary VLSI system, a major role is being contributed by the Schmitt trigger circuit. Schmitt trigger is fundamentally a comparator. It is implemented by using a positive feedback. The Schmitt trigger circuit is used in various devices such as buffer, sub-threshold SRAM, sensors and PWM circuit. It is also used in analog to digital converter. The most significant property of the Schmitt trigger is that they provide hysteresis in their voltage transfer curve. Consequently, they provide better noise immunity as compared to their counterparts. Therefore it becomes quite important to enhance the performance of the Schmitt trigger circuit. The power dissipation of the device can be minimized by minimizing the sub-threshold current. The Schmitt trigger circuit is very imperative in producing a clean pulse from the input signal comprising of noise. There are various applications of Schmitt trigger circuit such as in scheming the oscillator circuit, analog to digital converter, function generator, signal conditioning and numerous applications. Thus, it becomes noteworthy to boost its performance by plummeting the leakages and power consumption of the Schmitt trigger circuit. We have realized the Schmitt trigger circuit by the use of FinFET. Therefore, we have got some optimum output in the parameters such as hysteresis width, power consumption and total noise of the Schmitt trigger circuit, but the leakages have been augmented. Thereafter, we have implemented several techniques on the Schmitt trigger circuit to shrink the leakage current, leakage power and other parameters further. We have applied Self Controllable Voltage Level, Adaptive voltage level and MTCMOS technique on the Schmitt trigger circuit using FinFET to further augment the presentation. All the circuits have been simulated in the virtuoso tool of the cadence in 45 nm VLSI domain. We have applied 0.7 V of the supply voltage to perform the simulation and got some tremendous outcome.     

CMOS Schmitt触发器的设计与模拟

分析了普遍的六管CMOS Schmitt触发器管子宽长比设计公式,从触发器的工作原理出发指出了其不尽合理之处。根据I.M.Fianosky提出的触发器实际的阈值电平理论,考虑M2和M5两管对阈值电平的影响,提出了新的CMOSSchmitt触发器宽长比设计公式。举例说明了在一定的设计考虑和工艺条件下如何利用这一公式进行设计。     

利用差频电路实现微电容式传感器检测电路的温漂抑制

介绍了一种本实验室开发的CMOS工艺的电容式传感器的接口电路。重点分析了基于施密特触发器的张弛振荡器接口电路,实现了敏感电容以及参考电容与频率的转换。通过对两频率求差来抑制各种共模干扰。对样片进行了测试,输出频率与理论值基本一致。最后对该电路进行了温漂特性的仿真和测试,验证了差频电路可以将电源波动和温度的影响完全抑制在精度的允许范围内。     

基于开关信号理论的电流型CMOS多值施密特电路设计

以开关信号理论为指导,建立了描述电流型CMOS多值施密特电路中阈值控制电路的电流传输开关运算.在此基础上,提出了新的电流型CMOS三值和四值施密特触发器设计.所设计的电路可提供多值电流和电压输出信号,回差电流的大小只需通过改变MOS管的尺寸比来调节.所提出的电路较之以往设计具有结构简单,回差值调整容易以及可在较低电压下工作等特点.采用TSMC 0.25 μ m CMOS工艺参数和1.5V电压的HSPICE模拟结果验证了所提出设计方案的有效性和电路所具有的理想回差特性.     

一种高精度高稳定性锯齿波振荡器的设计

设计了一种应用于DC/DC开关电源管理芯片的锯齿波振荡器,该电路利用内部基准电流源产生的电流对电容进行充放电,使得产生的锯齿波信号随电源电压和温度的变化较小,采用迟滞技术提高了锯齿波信号幅值.采用基于CSMC的0.5μmCMOS 工艺进行仿真.结果表明,该电路产生的振荡频率为5MHz,信号幅值为0-3V,电源电压在2....     

Degradation of integrated schmitt triggers of the CMOS logic under the effect of ultrashort pulsed overloads

Degradation of a Schmitt trigger of the CMOS logic under the effect of ultrashort electrical pulses (USPs) is studied. It is shown that narrowing of the uncertainty region for a Schmitt trigger occurs under the effect of USPs. The circuit of the trigger has been simulated with all possible breakdowns of the MOS transistor taken into consideration. An experimental setup making it possible to determine the critical parameters of the effect of USPs on integrated circuits of triggers and CMOS structures is described.     

Analysis, design, and performance of micropower circuits for a capacitive pressure sensor IC

An integrated circuit has been designed, built, and testing as part of a capacitive pressure transducer. High-accuracy compact micropower circuits utilizing a standard bipolar IC process without any special components or trimming are used. The key circuits for achieving this performance are a Schmitt trigger oscillator and a bandgap voltage reference. The sensor circuits consume 200 /spl mu/W at 3.5 V, can resolve capacitance changes of 300 p.p.m., measure temperature to /spl plusmn/0.1/spl deg/C over a limited temperature range, and presently occupy 4 mm/SUP 2/ on a 2 mm/spl times/6 mm implantable monolithic silicon pressure sensor. Further scaling of the sensor is discussed showing that a reduction of area by a factor of 4 is achievable.     

一种频率可调CMOS环形振荡器的分析与设计

给出了一个采用0．6um CMOS工艺设计的改进结构环形振荡器,电路由RC充放电回路、施密特单元以及反相延时单元组成,结构简单,工作频率受集成电路工艺参数影响小。该电路带有使能控制端,并且通过调节少量的外部元件可以改变电路的振荡频率,适用作各类中／低频数字集成电路中的时钟产生电路。分析了改进结构环形振荡器的工作原理,给出了Hspice软件环境下电路仿真方法。电路流片封装后的实际测试结果表明,用该结构的环形振荡器作为时钟产生电路,工作稳定,满足了系统工作要求。     

基于神经元MOS器件的施密特触发器设计

为实现施密特触发器低功耗、回差可控,将神经元MOS器件的控阈技术用于施密特触发器的设计中,设计出基于神经元MOS器件的施密特触发器,并且进一步提出了外部可控回差的施密特触发器的设计.通过HSPICE对电路进行模拟,实验表明此设计仅需2个MOS管,功耗降低30%.并且这种通过改变外部电压值调整回差电压大小的方法比以往的方法更为方便实用.     

Subthreshold Schmitt trigger using body-bias technique for ultra low power and high performance applications

Digital subthreshold logic provides extremely low power consumption since the power supplies are kept below the threshold voltage and using the small subthreshold current of MOS transistors to operate. In this paper, a body-bias technique to match the subthreshold currents of both the NMOS and PMOS transistors is explored and a Schmitt trigger circuit employing this bias technique is proposed. Extensive circuit simulations were conducted and the results were compared with standard body bias technique in terms of performance parameters. The simulation results were obtained with 0.18 μm technology parameters. The conclusion is that Schmitt trigger with this body biasing is suitable for high performance and ultra low power applications.     

D类音频功放中电流控制振荡器的设计

基于N阱0．5μmDPTM CMOS工艺,完成了D类音频功放中电流控制振荡器的设计。首先分析了电流控制振荡器的工作原理,然后着重介绍了振荡器的设计。仿真结果表明,5V电源电压下振荡器的频率为250kHz,温度在-40-120℃,电源电压在3-5V范围内,频率随温度和电源电压的改变很小,仅为4％。该电路应用于某款D类音频功放芯片。     

Design of SCR‐Based ESD Protection Circuit for 3.3 V I/O and 20 V Power Clamp

In this paper, MOS‐triggered silicon‐controlled rectifier (SCR)–based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR‐based ESD protection circuits with floating diffusion regions for inverter and light‐emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded‐gate NMOS (ggNMOS) in the MOS‐triggered SCR‐based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P‐well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the floating diffusion region. The trigger voltage was improved by the partial insertion of a P‐body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low‐ and high‐voltage applications were designed using 0.18 µm Bipolar‐CMOS‐DMOS technology, with 100 µm width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS‐6008).