Fine line printed silicon solar cells exceeding 20% efficiency

Silicon solar cells with passivated rear side and laser‐fired contacts were produced on float zone material. The front side contacts are built up in two steps, seed and plate. The seed layer is printed using an aerosol jet printer and a silver ink. After firing this seed layer through the silicon nitride layer, the conductive layer is grown by light induced plating. The contact formation is studied on different emitter sheet resistances, 55 Ω/sq, 70 Ω/sq, and on 110 Ω/sq. These emitters are passivated with a PECVD silicon nitride layer which also acts as an anti‐reflection coating. Even on the 110 Ω/sq emitters it was possible to reach a fill factor of 80·1%. The electrical properties i.e., the contact resistance of the front side contacts are studied by transfer length model (TLM) measurements. On a cell area of 4 cm² and emitter sheet resistance of 110 Ω/sq, a record efficiency of 20·3% was achieved. Excellent open‐circuit voltage (V_oc) and short‐circuit current (j_sc) values of 661 mV and 38·4 mA/cm² were obtained due to the low recombination in the 110 Ω/sq emitter and at the passivated rear surface. These results show impressively that it is possible to contact emitter profiles with a very high efficiency potential using optimized printing technologies. Copyright © 2008 John Wiley & Sons, Ltd.     

Laser ablation of SiO2 for locally contacted Si solar cells with ultra‐short pulses

We apply ultra‐short pulse laser ablation to create local contact openings in thermally grown passivating SiO₂ layers. This technique can be used for locally contacting oxide passivated Si solar cells. We use an industrially feasible laser with a pulse duration of τ_pulse ∼ 10 ps. The specific contact resistance that we reach with evaporated aluminium on a 100 Ω/sq and P‐diffused emitter is in the range of 0·3–1 mΩ cm². Ultra‐short pulse laser ablation is sufficiently damage free to abandon wet chemical etching after ablation. We measure an emitter saturation current density of J_0e = (6·2 ± 1·6) × 10⁻¹³ A/cm² on the laser‐treated areas after a selective emitter diffusion with R_sheet ∼ 20 Ω/sq into the ablated area; a value that is as low as that of reference samples that have the SiO₂ layer removed by HF‐etching. Thus, laser ablation of dielectrics with pulse durations of about 10 ps is well suited to fabricate high‐efficiency Si solar cells. Copyright © 2007 John Wiley & Sons, Ltd.     

19% efficient n‐type Czochralski silicon solar cells with screen‐printed aluminium‐alloyed rear emitter

High and stable lifetimes recently reported for n‐type silicon materials are an important and promising prerequisite for innovative solar cells. To exploit the advantages of the excellent electrical properties of n‐type Si wafers for manufacturing simple and industrially feasible high‐efficiency solar cells, we focus on back junction n⁺np⁺ solar cells featuring an easy‐to‐fabricate full‐area screen‐printed aluminium‐alloyed rear p⁺ emitter. Independently confirmed record‐high efficiencies have been achieved on n‐type phosphorus‐doped Czochralski‐grown silicon material: 18·9% for laboratory‐type n⁺np⁺ solar cells (4 cm²) with shadow‐mask evaporated front contact grid and 17·0% for front and rear screen‐printed industrial‐type cells (100 cm²). The electrical cell parameters were found to be perfectly stable under illumination. Copyright © 2006 John Wiley & Sons, Ltd.     

Excellent boron emitter passivation for high‐efficiency Si wafer solar cells using AlOx/SiNx dielectric stacks deposited in an industrial inline plasma reactor

Excellent passivation of boron emitters is realised using AlO_x/SiN_x dielectric stacks deposited in an industrial inline plasma‐enhanced chemical vapour deposition reactor. Very low emitter saturation current density (J_0e) values of 10 and 45 fA/cm² are obtained for 180 and 30 Ω/sq planar p⁺ emitters, respectively. For textured p⁺ emitters, the J_0e was found to be 1.5–2 times higher compared with planar emitters. The required thermal activation of the AlO_x films is performed in a standard industrial fast‐firing furnace, making the developed passivation stack industrially viable. We also show that an AlO_x thickness of 5 nm in the AlO_x/SiN_x stack is sufficient for obtaining a J_0e of 18 fA/cm² for planar 80 Ω/sq p⁺ emitters, which corresponds to a 1‐sun open‐circuit voltage limit of the solar cell of 736 mV at 25 °C. Copyright © 2012 John Wiley & Sons, Ltd.     

Autodiffusion: a novel method for emitter formation in crystalline silicon thin‐film solar cells

The in situ formation of an emitter in monocrystalline silicon thin‐film solar cells by solid‐state diffusion of dopants from the growth substrate during epitaxy is demonstrated. This approach, that we denote autodiffusion, combines the epitaxy and the diffusion into one single process. Layer‐transfer with porous silicon (PSI process) is used to fabricate n‐type silicon thin‐film solar cells. The cells feature a boron emitter on the cell rear side that is formed by autodiffusion. The sheet resistance of this autodiffused emitter is 330 Ω/□. An independently confirmed conversion efficiency of (14·5 ± 0·4)% with a high short circuit current density of (33·3 ± 0·8) mA/cm² is achieved for a 2 × 2 cm² large cell with a thickness of (24 ± 1) µm. Transferred n‐type silicon thin films made from the same run as the cells show effective carrier lifetimes exceeding 13 µs. From these samples a bulk diffusion length L > 111 µm is deduced. Amorphous silicon is used to passivate the rear surface of these samples after the layer‐transfer resulting in a surface recombination velocity lower than 38 cm/s. Copyright © 2006 John Wiley & Sons, Ltd.     

Enhanced lateral current transport via the front N+ diffused layer of n‐type high‐efficiency back‐junction back‐contact silicon solar cells

N‐type back‐contact back‐junction solar cells were processed with the use of industrially relevant structuring technologies such as screen‐printing and laser processing. Application of the low‐cost structuring technologies in the processing of the high‐efficiency back‐contact back‐junction silicon solar cells results in a drastic increase of the pitch on the rear cell side. The pitch in the range of millimetres leads to a significant increase of the lateral base resistance. The application of a phosphorus doped front surface field (FSF) significantly reduces the lateral base resistance losses. This additional function of the phosphorus doped FSF in reducing the lateral resistance losses was investigated experimentally and by two‐dimensional device simulations. Enhanced lateral majority carrier's current transport in the front n⁺ diffused layer is a function of the pitch and the base resistivity. Experimental data show that the application of a FSF reduces the total series resistance of the measured cells with 3.5 mm pitch by 0.1 Ω cm² for the 1 Ω cm base resistivity and 1.3 Ω cm² for the 8 Ω cm base resistivity. Two‐dimensional simulations of the electron current transport show that the electron current density in the front n⁺ diffused layer is around two orders of magnitude higher than in the base of the solar cell. The best efficiency of 21.3% was obtained for the solar cell with a 1 Ω cm specific base resistivity and a front surface field with sheet resistance of 148 Ω/sq. Copyright © 2008 John Wiley & Sons, Ltd.     

Modeling the potential of screen printed front junction CZ silicon solar cell with tunnel oxide passivated back contact

Carrier selective passivated contacts composed of thin oxide, n + polycrystalline Si and metal on top of a n‐Si absorber can significantly lower the recombination current density (J_orear ≤8 fA/cm²) under the contact while providing excellent specific contact resistance (5–10 mΩ‐cm²); 25.1% efficient small area cells with photolithography front contacts on boron doped selective emitter and Fz wafers have been achieved by Fraunhofer ISE using their tunnel oxide passivated contact (TOPCon) approach. This paper shows a methodology to model such passivated contact cells using Sentaurus device model, which involves replacing the TOPCon region by carrier selective electron and hole recombination velocities to match the measured J_orear of the TOPCon region as well as all the light IV values of the cell. We first validated the methodology by modeling a 24.9% reference cell. The model was then extended to assess the efficiency potential of large area TOPCon cells on commercial grade n‐type Cz material with screen‐printed front contacts. To use realistic input parameters, a 21% n‐type PERT cell was fabricated on Cz wafer (5 Ω‐cm, 1.5‐ms lifetime). Modeling showed that the cell efficiency will improve to only 21.6% if the back of this cell is replaced by the above TOPCon, and the performance is limited by the homogenous emitter. Efficiency was then modeled to improve to 22.6% with the implementation of selective emitter (150/20 Ω/sq). Finally, it is shown that screen printing of 40‐µm‐wide lines and improved bulk material (10 Ω‐cm, 3‐ms lifetime) can raise the single side TOPCon Cz cell efficiency to 23.2%. Copyright © 2016 John Wiley & Sons, Ltd.     

High efficiency inline diffused emitter (ILDE) solar cells on mono‐crystalline CZ silicon

High throughput, low cost, and high efficiency are the keys to reducing the cost of photovoltaic electricity. To realize high efficiency, the quality of emitter is critical. The emitter can be formed either by batch deposition in a tube using liquid POCl₃ source or by inline spray deposition of phosphoric acid (P₂O₅). The POCl₃ process has been optimized over the years to give reproducible performance, whereas the inline diffusion has not been systematically optimized. This paper reports on solar cell results with the inline emitters. Sheet resistance mapping tool has been used to quantify the emitter uniformity in conjunction with junction depth and phosphorus surface concentration to characterize the inline emitters. We have achieved average efficiencies of 17.1 and 17.4%, respectively, on 2 Ω‐cm textured CZ with 45 and 60 Ω/sq emitters. Average fill factor of 0.772 and ideality factor of 1.06 support the front contact firing optimization for the inline emitters. Personal computer one dimensional (PC1D) modeling of the 60 Ω/sq emitter showed efficiency of >18% is achievable by reducing the front surface recombination velocity (FSRV) from 120 000 to 80 000 cm/s and increasing the fill factor to 79.5%. Copyright © 2010 John Wiley & Sons, Ltd.     

Screen‐printed Emitter‐Wrap‐Through solar cell with single step side selective emitter with 18.8% efficiency

A fabrication process for Emitter‐Wrap‐Through solar cells on monocrystalline material with high quality gap passivation by wet thermal silicon dioxide is investigated. Masking and structuring steps are performed by screen‐printing technology. Via‐holes are created by an industrially applicable high‐speed laser drilling process. The cell structure features a selective emitter structure fabricated in a single high temperature step: a highly doped emitter at the via‐holes and the rear side, allowing for a low via‐hole resistivity as well as a low resistivity contact to screen‐printed pastes, and a moderately doped front side emitter exhibiting high quantum efficiency in the low wavelength range. Therefore a novel approach is applied depositing either doped or undoped PECVD silicon dioxide layers on the front side. It is shown that doping profiles advantageous for the EWT‐cell structure can be achieved. The screen‐printed aluminum paste is found to penetrate the underlying thermal dioxide layer at appropriate contact firing conditions leading to a zone of high recombination in the overlap region of aluminum and silicon dioxide. It is shown that conventional PECVD‐anti‐reflection silicon nitride acts as effective protection layer reducing the recombination in this region. Designated area conversion efficiencies up to 18.8% on FZ material are obtained applying the single step side selective emitter fabrication technique. Copyright © 2010 John Wiley & Sons, Ltd.     

Electrochemical nature of contact firing reactions for screen‐printed silicon solar cells: origin of “gray finger” phenomenon

Fire‐through Ag thick‐film metallization of crystalline Si (c‐Si) solar cells often yields macroscopically non‐uniform contact quality over the cell area, degrading the cell performance and causing cell‐to‐cell variations of the conversion efficiency in a cell production line. This study analyzes the root cause of the “gray finger” phenomenon, in which part of the fire‐through Ag contact gridlines of a c‐Si solar cell appears in gray or dark contrast in the electroluminescence images owing to high contact resistance. Few Ag crystallites were formed on the corrugated emitter surface at the contact interfaces underneath the gray fingers. The present results revealed that the gray finger phenomenon was caused by a short‐circuit spot that formed between the Ag gridlines and underlying Si emitter during contact firing. The electrochemical reactions involved in fire‐through Ag contact formation established a potential difference between the sintered Ag gridlines and Si emitter separated by molten glass. The molten glass acted as an electrolyte containing mobile Ag⁺ and O²⁻ ions during contact firing. Therefore, the short‐circuiting between the sintered Ag gridlines and Si emitter produced a galvanic cell during contact firing, which inhibited Ag crystallite formation at the contact interface along the gridlines in a short circuit and produced the gray fingers. The firing reactions in Ag thick‐film contact formation could be interpreted in terms of the mixed potential theory of corrosion. The degradation of cell performance because of the gray finger phenomenon was also evaluated for 6‐in. screen‐printed c‐Si solar cells. Copyright © 2016 John Wiley & Sons, Ltd.     

Thin Al2O3 passivated boron emitter of n‐type bifacial c‐Si solar cells with industrial process

We have presented thin Al₂O₃ (~4 nm) with SiN_x:H capped (~75 nm) films to effectively passivate the boron‐doped p⁺ emitter surfaces of the n‐type bifacial c‐Si solar cells with BBr₃ diffusion emitter and phosphorus ion‐implanted back surface field. The thin Al₂O₃ capped with SiN_x:H structure not only possesses the excellent field effect and chemical passivation, but also establishes a simple cell structure fully compatible with the existing production lines and processes for the low‐cost n‐type bifacial c‐Si solar cell industrialization. We have successfully achieved the large area (238.95 cm²) high efficiency of 20.89% (front) and 18.45% (rear) n‐type bifacial c‐Si solar cells by optimizing the peak sintering temperature and fine finger double printing technology. We have further shown that the conversion efficiency of the n‐type bifacial c‐Si solar cells can be improved to be over 21.3% by taking a reasonable high emitter sheet resistance. Copyright © 2017 John Wiley & Sons, Ltd.     

Development of high‐efficiency large‐area screen‐printed solar cells on direct kerfless epitaxially grown monocrystalline Si wafer and structure

This paper demonstrates the potential of epitaxially grown Si wafers with doped layers for high‐efficiency solar cells. Boron‐doped 239 cm² 180–200 µm thick 2 Ω‐cm wafers were grown with and without 15 µm thick p⁺ layer, with a doping in the range of 10¹⁷~10¹⁸ cm⁻³. A layer transfer process involving porous Si layer to lift off epi‐Si wafers from the reusable substrate was used. The pp⁺ wafers were converted into n⁺pp⁺ passivated emitter rear totally diffused (PERT) cells by forming an oxide‐passivated POCl₃‐diffused n⁺ emitter at the front, and oxide/nitride‐passivated epitaxially grown p⁺ BSF at the entire back, with local screen‐printed contacts. To demonstrate and quantify the benefit of the epi‐grown p⁺ layer, standard passivated emitter and rear cells (PERCs) with local BSF and contacts were also fabricated on p‐type epi‐Si wafers as well on commercial‐grade Cz wafers. Sentaurus 2D device model was used to assess the impact of the epi‐grown p⁺ layer, which showed an efficiency gain of ~0.5% for this PERT structure over the traditional PERC. This was validated by the cell results, which showed an efficiency of ~20.1% for the PERC, and ~20.3% for the PERT cell using epi‐Si wafers. Experimental data showed higher FF in PERT cells, largely because of the decrease in lateral resistance on the rear side. Efficiency gain, a result of higher FF, was greater than the recombination loss in the p⁺ layer because of the lightly doped thick p⁺ epi‐grown region used in this study. Copyright © 2016 John Wiley & Sons, Ltd.     

Catalytic materials manufactured by the polyol process for monolithic dye‐sensitized solar cells

Three types of screen‐printable catalytic pastes were successfully prepared to be used as counterelectrode for monolithic dye solar cells encapsulated with glass frit. The electroless bottom‐up method or so‐called polyol process has been applied to fabricate thermally stable SnO₂:Sb/Pt and carbon black/Pt nanocomposites. The catalytic and electric properties of these materials were compared with a new platinum‐free type of carbon counterelectrode. The layers containing low platinum amounts (less than 5 µg/cm²) exhibit a very low charge transfer resistance of about 0·4 Ω · cm². Also the conductive carbon layer shows an acceptable charge transfer resistance of 1·6 Ω · cm². Additionally the catalytic layer containing porous carbon black reveals excellent sheet resistance below 5 Ω/□; this feature has enabled to work out a low cost counterelectrode which combined suitable catalytic and conductive properties. The layers have been characterized using following methods: electrochemical impedance spectroscopy (EIS), field emission scanning electron microscopy (FE‐SEM), energy filter transmission electron microscopy (EF‐TEM) and inductively coupled plasma mass spectroscopy (ICP‐MS). Copyright © 2008 John Wiley & Sons, Ltd.     

High efficiency large area n‐type front junction silicon solar cells with boron emitter formed by screen printing technology

In this paper, we report on commercially viable screen printing (SP) technology to form boron emitters. A screen‐printed boron emitter and ion‐implanted phosphorus back surface field were formed simultaneously by a co‐annealing process. Front and back surfaces were passivated by chemically grown oxide capped with plasma‐enhanced chemical vapor deposition silicon nitride stack. Front and back contacts were formed by traditional SP and firing processes with silver/aluminum grid on front and local silver back contacts on the rear. This resulted in 19.6% efficient large area (239 cm²) n‐type solar cells with an open‐circuit voltage V_oc of 645 mV, short‐circuit current density J_sc of 38.6 mA/cm², and fill factor of 78.6%. This demonstrates the potential of this novel technology for production of low‐cost high‐efficiency n‐type silicon solar cells. Copyright © 2014 John Wiley & Sons, Ltd.     

High‐efficiency µc‐Si solar cells made by very high‐frequency plasma‐enhanced chemical vapor deposition

Microcrystalline silicon‐based single‐junction p–i–n solar cells have been fabricated by very high‐frequency plasma enhanced chemical vapor deposition using a showerhead cathode at high pressures and under silane depletion conditions. The i‐layers are made near the transition from amorphous to crystalline. It was found that, especially at high crystalline fractions, the open‐circuit voltage and fill factor are very sensitive to the morphology of the substrate. At an i‐layer deposition rate 0·45 nm/s, we have measured a stabilised efficiency of 10% (V_oc = 0·52 V, FF = 0·74) for a cell made on texture‐etched ZnO:Al. The performance is stable under light soaking. The defect density of the absorber layer is in the 10¹⁵ cm⁻³ range. In spite of the presence of oxygen contamination, good electrical properties and good infrared cell response are obtained. Copyright © 2006 John Wiley & Sons, Ltd.     

High‐efficiency solar cells on phosphorus gettered multicrystalline silicon substrates

Measurements of the dislocation density are compared with locally resolved measurements of carrier lifetime for p‐type multicrystalline silicon. A correlation between dislocation density and carrier recombination was found: high carrier lifetimes (>100 µs) were only measured in areas with low dislocation density (<10⁵ cm⁻²), in areas of high dislocation density (>10⁶ cm⁻²) relatively low lifetimes (<20 µs) were observed. In order to remove mobile impurities from the silicon, a phosphorus diffusion gettering process was applied. An increase of the carrier lifetime by about a factor of three was observed in lowly dislocated regions whereas in highly dislocated areas no gettering efficiency was observed. To test the effectiveness of the gettering in a solar cell manufacturing process, five different multicrystalline silicon materials from four manufacturers were phosphorus gettered. Base resistivity varied between 0·5 and 5 Ω cm for the boron‐ and gallium‐doped p‐type wafers which were used in this study. The high‐efficiency solar cell structure, which has led to the highest conversion efficiencies of multicrystalline silicon solar cells to date, was used to fabricate numerous solar cells with aperture areas of 1 and 4 cm². Efficiencies in the 20% range were achieved for all materials with an average value of 18%. Best efficiencies for 1 cm² (20·3%) and 4 cm² (19·8%) cells were achieved on 0·6 and 1·5 Ω cm, respectively. This proves that multicrystalline silicon of very different material specification can yield very high efficiencies if an appropriate cell process is applied. Copyright © 2006 John Wiley & Sons, Ltd.     

High voltage photovoltaic mini‐modules

This work describes the design, simulation, fabrication process, and characterization of high voltage photovoltaic mini‐modules using silicon on insulator (SOI) wafers. The mini‐modules are made of a number of small area photovoltaic cells (<1 mm²) monolithically connected in series. Isolation between cells is performed by means of anisotropic etching of the active layer of the SOI wafer. Measurements using standard sunlight (AM1·5 100 mW/cm²) confirm the viability of this technology to fabricate small area arrays showing open circuit voltages, V _oc, between 620 mV and 660 mV and photocurrent densities up to 22·3 mA/cm² for single cells of 0·225 mm² area and 10 µm active film thickness. Series connection scales up V _oc and the maximum power, P _m, from 625 mV and 21·2 µW, respectively, in a single cell to 103 V and 3·2 mW when 169 cells are connected in series in a 0·42 cm² module total area. Copyright © 2008 John Wiley & Sons, Ltd.     

Simulation and fabrication of heterojunction silicon solar cells from numerical computer and hot‐wire CVD

In this paper, we will present a Pc1D numerical simulation for heterojunction (HJ) silicon solar cells, and discuss their possibilities and limitations. By means of modeling and numerical computer simulation, the influence of emitter‐layer/intrinsic‐layer/crystalline‐Si heterostructures with different thickness and crystallinity on the solar cell performance is investigated and compared with hot wire chemical vapor deposition (HWCVD) experimental results. A new technique for characterization of n‐type microcrystalline silicon (n‐µc‐Si)/intrinsic amorphous silicon (i‐a‐Si)/crystalline silicon (c‐Si) heterojunction solar cells from Pc1D is developed. Results of numerical modeling as well as experimental data obtained using HWCVD on µc‐Si (n)/a‐Si (i)/c‐Si (p) heterojunction are presented. This work improves the understanding of HJ solar cells to derive arguments for design optimization. Some simulated parameters of solar cells were obtained: the best results for J_sc = 39·4 mA/cm², V_oc = 0·64 V, FF = 83%, and η = 21% have been achieved. After optimizing the deposition parameters of the n‐layer and the H₂ pretreatment of solar cell, the single‐side HJ solar cells with J_sc = 34·6 mA/cm², V_oc = 0·615 V, FF = 71%, and an efficiency of 15·2% have been achieved. The double‐side HJ solar cell with J_sc = 34·8 mA/cm², V_oc = 0·645 V, FF = 73%, and an efficiency of 16·4% has been fabricated. Copyright © 2009 John Wiley & Sons, Ltd.     

All‐screen‐printed back‐contact back‐junction silicon solar cells with aluminum‐alloyed emitter and demonstration of interconnection of point‐shaped metalized contacts

In the following, high‐efficiency back‐contact back‐junction silicon solar cells with aluminum‐alloyed emitter are described. First, the theoretical background for the cell concept is explained. To that purpose, the bulk lifetime and the front surface field characteristics are considered. Three different process sequences for the phosphorus‐diffused profiles on the front and back surfaces are depicted: One exhibits a shallow field, and two sequences have deeper, driven‐in profiles. For realizing high efficiencies, such cell structures must meet several prerequisites, such as firing‐stable front and rear passivations, and functional small screen‐printed Al structures. Furthermore, it must be possible to create contacts on the Si surfaces using the driven‐in P‐profiles. With such a structure, cell efficiencies of 20.0% are reached. An analysis of the series resistance and area‐weighted recombination is performed. The results are compared with the measured cell parameters. Two‐dimensional simulations show the efficiency potential when decreasing the width of the backside field and when a cell structure, which would inhibit a passivated aluminum‐alloyed p⁺‐emitter, is created. Also, an advanced concept is demonstrated where a point array of both polarities on the cell backside is interconnected externally on module level. To that purpose, the cell is soldered to a printed wiring circuit board by using a reflow soldering process. Copyright © 2013 John Wiley & Sons, Ltd.     

Large area tunnel oxide passivated rear contact n‐type Si solar cells with 21.2% efficiency

This paper reports on the implementation of carrier‐selective tunnel oxide passivated rear contact for high‐efficiency screen‐printed large area n‐type front junction crystalline Si solar cells. It is shown that the tunnel oxide grown in nitric acid at room temperature (25°C) and capped with n⁺ polysilicon layer provides excellent rear contact passivation with implied open‐circuit voltage iV_oc of 714 mV and saturation current density J_0b′ of 10.3 fA/cm² for the back surface field region. The durability of this passivation scheme is also investigated for a back‐end high temperature process. In combination with an ion‐implanted Al₂O₃‐passivated boron emitter and screen‐printed front metal grids, this passivated rear contact enabled 21.2% efficient front junction Si solar cells on 239 cm² commercial grade n‐type Czochralski wafers. Copyright © 2016 John Wiley & Sons, Ltd.